URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

#ifndef _AEMB_MAIN_HH #define _AEMB_MAIN_HH extern char __rodata_end, __data_start, __sdata_end; extern int main (); extern "C" int __main (void){ //initial_global_data char *src = &__rodata_end; //start of Data section in Rom char *dst = &__data_start; /* ROM has data at end of rodata; copy it. */ while (dst < &__sdata_end) { *dst++ = *src++; } main(); //call the main function return 0; } #endif

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [sw/] [aemb/] [__main.c] - Blame information for rev 48

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [sw/] [aemb/] [__main.c] - Blame information for rev 48