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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<title>aoOCS: drv_eth_vga_capture Module Reference</title>
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</div>
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<div class="header">
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  <div class="summary">
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<a href="#Inputs">Inputs</a> &#124;
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<a href="#Outputs">Outputs</a> &#124;
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<a href="#Inouts">Inouts</a> &#124;
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<a href="#Signals">Signals</a> &#124;
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<a href="#Module Instances">Module Instances</a> &#124;
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<a href="#Always Constructs">Always Constructs</a>  </div>
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  <div class="headertitle">
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<h1>drv_eth_vga_capture Module Reference</h1>  </div>
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</div>
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<div class="contents">
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<!-- doxytag: class="drv_eth_vga_capture" -->
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<p><p>DM9000A 10/100 Mbit Ethernet driver for a VGA frame grabber. </p>
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<a href="#_details">More...</a></p>
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<!-- startSectionHeader --><div class="dynheader">
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Inheritance diagram for drv_eth_vga_capture:<!-- endSectionHeader --></div>
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  <img src="classdrv__eth__vga__capture.png" usemap="#drv_eth_vga_capture_map" alt=""/>
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  <map id="drv_eth_vga_capture_map" name="drv_eth_vga_capture_map">
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<area href="classaoOCS.html" alt="aoOCS" shape="rect" coords="0,56,133,80"/>
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</map>
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 </div><!-- endSectionContent --></div>
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<p><a href="classdrv__eth__vga__capture-members.html">List of all members.</a></p>
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<table class="memberdecls">
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<tr><td colspan="2"><h2><a name="Always Constructs"></a>
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Always Constructs</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#aba39015d08a3c10b35fba8eb4414d008">ALWAYS_68</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__eth__vga__capture.html#a26c09de4c12b15a080f22caec2384eee">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__eth__vga__capture.html#a7b4e1c4a172b419f95f9874295abca61">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#afdf02062e063a6e1eb35038084a33d12">ALWAYS_69</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__eth__vga__capture.html#a26c09de4c12b15a080f22caec2384eee">clk_30</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__eth__vga__capture.html#a7b4e1c4a172b419f95f9874295abca61">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
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<tr><td colspan="2"><h2><a name="Inputs"></a>
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Inputs</h2></td></tr>
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 <tr><td colspan="2"><div class="groupHeader">Clock and reset</div></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a26c09de4c12b15a080f22caec2384eee">clk_30</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a4be6e1a59f945fb87af42e8d7336216a">clk_25</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a7b4e1c4a172b419f95f9874295abca61">reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Captured VGA output signals</div></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a8acf659337bff5e5bf6b7ab95da464a4">display_valid</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a1b7bef5ae7965541b6829e0582237a53">vga_r</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a3002998608bbca4b043ef32814a0e90c">vga_g</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a5c46fd036c0ceb4ca62ee992f3a3f8cd">vga_b</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td colspan="2"><div class="groupHeader">DM9000A Ethernet hardware interface</div></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a21b872000f4cc3cc38086275e5031edb">enet_irq</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td colspan="2"><h2><a name="Inouts"></a>
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Inouts</h2></td></tr>
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 <tr><td colspan="2"><div class="groupHeader">DM9000A Ethernet hardware interface</div></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a01507d79c6d97494ec37aa2d1816c0dc">enet_data</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td colspan="2"><h2><a name="Outputs"></a>
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Outputs</h2></td></tr>
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 <tr><td colspan="2"><div class="groupHeader">DM9000A Ethernet hardware interface</div></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a84472d11a61abbc3b23a0e969dbf7034">enet_clk_25</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#ad0ebcebdfa40bfad1f0e1cf767c5f948">enet_reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#acafc6c0c8dba9dc4e5b35d68f9ec30f7">enet_cs_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#acc5370f78bef4d859ab318c252e0d4d3">enet_ior_n</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#a101095dd45e6bf8d75d2eb42779185a3">enet_iow_n</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__eth__vga__capture.html#ac4e7f4f3150f9b367ba373fe2d093a1c">enet_cmd</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td></tr>
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<tr><td colspan="2"><h2><a name="Module Instances"></a>
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Module Instances</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classdrv__eth__vga__capture.html#a3305dae46003d5c68ca0e917b94aaf4c">altsyncram::ethernet_ram_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classdrv__eth__vga__capture.html#a59768c08add982f9d20148482217c411">scfifo::vga_fifo_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
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<tr><td colspan="2"><h2><a name="Signals"></a>
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Signals</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a6a9445d546ab0169a9fe4cb3704aa543">tx_active</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#aca885a3a5491cc14142eda9310673ed8">enet_data_oe</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#aaf032c46a012fcc50baedece317e4418">enet_data_out</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">5</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#aeade28ddee5ed1bb78359678e1ab0cf7">ram_addr</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#aa7984493bef70d30c53190e4c148de89">ram_q</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#ad99bee321744d2060f563e0e9fec7621">vga_line_number</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#abd391f89b94948281873e66dc755e8a5">last_display_valid</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#af66c55790fa554df4a256532b05f4a8c">select_line</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a6bf05ed0f0c28e625508269a958497ae">block_wrreq</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a38a0ce51d1dfba739092251226e2c642">fifo_wrreq</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a246788022ac009e7a0ed501c4368fa8d">start_load</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a23e64f8509cd5130837d5589d6144d0b">fifo_empty</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">11</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a4718b8c841f8694e680df02aae2b33a4">fifo_q</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#ad4ef489b0816e0c8849b5c3a588e1d11">fifo_rdreq</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a6ef0f10045357015c38f6fd3bc181d78">fifo_rd_cnt</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">11</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a762873b5a64a5eecb15b8721a83ef6f8">last_fifo_q</a> </td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__eth__vga__capture.html#a7349e4e8b9da301884c10edaf7642c49">state_counter</a> </td></tr>
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</table>
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<hr/><a name="_details"></a><h2>Detailed Description</h2>
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<p>DM9000A 10/100 Mbit Ethernet driver for a VGA frame grabber. </p>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00031">31</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<hr/><h2>Member Function Documentation</h2>
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<a class="anchor" id="aba39015d08a3c10b35fba8eb4414d008"></a><!-- doxytag: member="drv_eth_vga_capture::ALWAYS_68" ref="aba39015d08a3c10b35fba8eb4414d008" args="clk_30, reset_n" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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        <tr>
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          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_68          <td></td>
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          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__eth__vga__capture.html#a26c09de4c12b15a080f22caec2384eee">clk_30</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>
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        <tr>
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          <td class="paramkey"></td>
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          <td></td>
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          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__eth__vga__capture.html#a7b4e1c4a172b419f95f9874295abca61">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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</div>
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<div class="memdoc">
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00090">90</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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</div>
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</div>
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<a class="anchor" id="afdf02062e063a6e1eb35038084a33d12"></a><!-- doxytag: member="drv_eth_vga_capture::ALWAYS_69" ref="afdf02062e063a6e1eb35038084a33d12" args="clk_30, reset_n" -->
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<div class="memitem">
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<div class="memproto">
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      <table class="memname">
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          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_69          <td></td>
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          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__eth__vga__capture.html#a26c09de4c12b15a080f22caec2384eee">clk_30</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>
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          <td class="paramkey"></td>
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          <td></td>
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          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__eth__vga__capture.html#a7b4e1c4a172b419f95f9874295abca61">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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      </table>
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</div>
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<div class="memdoc">
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00138">138</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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</div>
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<hr/><h2>Member Data Documentation</h2>
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<a class="anchor" id="a26c09de4c12b15a080f22caec2384eee"></a><!-- doxytag: member="drv_eth_vga_capture::clk_30" ref="a26c09de4c12b15a080f22caec2384eee" args="" -->
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<div class="memitem">
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      <table class="memname">
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a26c09de4c12b15a080f22caec2384eee">clk_30</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00034">34</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a4be6e1a59f945fb87af42e8d7336216a"></a><!-- doxytag: member="drv_eth_vga_capture::clk_25" ref="a4be6e1a59f945fb87af42e8d7336216a" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a4be6e1a59f945fb87af42e8d7336216a">clk_25</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00035">35</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a7b4e1c4a172b419f95f9874295abca61"></a><!-- doxytag: member="drv_eth_vga_capture::reset_n" ref="a7b4e1c4a172b419f95f9874295abca61" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a7b4e1c4a172b419f95f9874295abca61">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
201 
 
202 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00036">36</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a8acf659337bff5e5bf6b7ab95da464a4"></a><!-- doxytag: member="drv_eth_vga_capture::display_valid" ref="a8acf659337bff5e5bf6b7ab95da464a4" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a8acf659337bff5e5bf6b7ab95da464a4">display_valid</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00041">41</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a1b7bef5ae7965541b6829e0582237a53"></a><!-- doxytag: member="drv_eth_vga_capture::vga_r" ref="a1b7bef5ae7965541b6829e0582237a53" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a1b7bef5ae7965541b6829e0582237a53">vga_r</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00042">42</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a3002998608bbca4b043ef32814a0e90c"></a><!-- doxytag: member="drv_eth_vga_capture::vga_g" ref="a3002998608bbca4b043ef32814a0e90c" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a3002998608bbca4b043ef32814a0e90c">vga_g</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00043">43</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a5c46fd036c0ceb4ca62ee992f3a3f8cd"></a><!-- doxytag: member="drv_eth_vga_capture::vga_b" ref="a5c46fd036c0ceb4ca62ee992f3a3f8cd" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a5c46fd036c0ceb4ca62ee992f3a3f8cd">vga_b</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">9</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00044">44</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a84472d11a61abbc3b23a0e969dbf7034"></a><!-- doxytag: member="drv_eth_vga_capture::enet_clk_25" ref="a84472d11a61abbc3b23a0e969dbf7034" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a84472d11a61abbc3b23a0e969dbf7034">enet_clk_25</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
276 
 
277 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00049">49</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="ad0ebcebdfa40bfad1f0e1cf767c5f948"></a><!-- doxytag: member="drv_eth_vga_capture::enet_reset_n" ref="ad0ebcebdfa40bfad1f0e1cf767c5f948" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#ad0ebcebdfa40bfad1f0e1cf767c5f948">enet_reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
291 
 
292 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00050">50</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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</div>
296 
<a class="anchor" id="acafc6c0c8dba9dc4e5b35d68f9ec30f7"></a><!-- doxytag: member="drv_eth_vga_capture::enet_cs_n" ref="acafc6c0c8dba9dc4e5b35d68f9ec30f7" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#acafc6c0c8dba9dc4e5b35d68f9ec30f7">enet_cs_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
306 
 
307 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00051">51</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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</div>
311 
<a class="anchor" id="a21b872000f4cc3cc38086275e5031edb"></a><!-- doxytag: member="drv_eth_vga_capture::enet_irq" ref="a21b872000f4cc3cc38086275e5031edb" args="" -->
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      <table class="memname">
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a21b872000f4cc3cc38086275e5031edb">enet_irq</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
321 
 
322 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00052">52</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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326 
<a class="anchor" id="acc5370f78bef4d859ab318c252e0d4d3"></a><!-- doxytag: member="drv_eth_vga_capture::enet_ior_n" ref="acc5370f78bef4d859ab318c252e0d4d3" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#acc5370f78bef4d859ab318c252e0d4d3">enet_ior_n</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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335 
<div class="memdoc">
336 
 
337 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00054">54</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a101095dd45e6bf8d75d2eb42779185a3"></a><!-- doxytag: member="drv_eth_vga_capture::enet_iow_n" ref="a101095dd45e6bf8d75d2eb42779185a3" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a101095dd45e6bf8d75d2eb42779185a3">enet_iow_n</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
351 
 
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00055">55</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="ac4e7f4f3150f9b367ba373fe2d093a1c"></a><!-- doxytag: member="drv_eth_vga_capture::enet_cmd" ref="ac4e7f4f3150f9b367ba373fe2d093a1c" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#ac4e7f4f3150f9b367ba373fe2d093a1c">enet_cmd</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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366 
 
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00056">56</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a01507d79c6d97494ec37aa2d1816c0dc"></a><!-- doxytag: member="drv_eth_vga_capture::enet_data" ref="a01507d79c6d97494ec37aa2d1816c0dc" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a01507d79c6d97494ec37aa2d1816c0dc">enet_data</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Inout]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00057">57</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a6a9445d546ab0169a9fe4cb3704aa543"></a><!-- doxytag: member="drv_eth_vga_capture::tx_active" ref="a6a9445d546ab0169a9fe4cb3704aa543" args="reg" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a6a9445d546ab0169a9fe4cb3704aa543">tx_active</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00064">64</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="aca885a3a5491cc14142eda9310673ed8"></a><!-- doxytag: member="drv_eth_vga_capture::enet_data_oe" ref="aca885a3a5491cc14142eda9310673ed8" args="reg" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#aca885a3a5491cc14142eda9310673ed8">enet_data_oe</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00066">66</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="aaf032c46a012fcc50baedece317e4418"></a><!-- doxytag: member="drv_eth_vga_capture::enet_data_out" ref="aaf032c46a012fcc50baedece317e4418" args="reg[15:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#aaf032c46a012fcc50baedece317e4418">enet_data_out</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[15:0]]</code></td>
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427 
<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00067">67</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="aeade28ddee5ed1bb78359678e1ab0cf7"></a><!-- doxytag: member="drv_eth_vga_capture::ram_addr" ref="aeade28ddee5ed1bb78359678e1ab0cf7" args="reg[5:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#aeade28ddee5ed1bb78359678e1ab0cf7">ram_addr</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[5:0]]</code></td>
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441 
 
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00071">71</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="aa7984493bef70d30c53190e4c148de89"></a><!-- doxytag: member="drv_eth_vga_capture::ram_q" ref="aa7984493bef70d30c53190e4c148de89" args="wire[15:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#aa7984493bef70d30c53190e4c148de89">ram_q</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>
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456 
 
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00072">72</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a3305dae46003d5c68ca0e917b94aaf4c"></a><!-- doxytag: member="drv_eth_vga_capture::altsyncram" ref="a3305dae46003d5c68ca0e917b94aaf4c" args="" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a3305dae46003d5c68ca0e917b94aaf4c">altsyncram</a></span> <b><span class="vhdlchar">ethernet_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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471 
 
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00074">74</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="ad99bee321744d2060f563e0e9fec7621"></a><!-- doxytag: member="drv_eth_vga_capture::vga_line_number" ref="ad99bee321744d2060f563e0e9fec7621" args="reg[8:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#ad99bee321744d2060f563e0e9fec7621">vga_line_number</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[8:0]]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00086">86</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#abd391f89b94948281873e66dc755e8a5">last_display_valid</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00087">87</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="af66c55790fa554df4a256532b05f4a8c"></a><!-- doxytag: member="drv_eth_vga_capture::select_line" ref="af66c55790fa554df4a256532b05f4a8c" args="reg[1:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#af66c55790fa554df4a256532b05f4a8c">select_line</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[1:0]]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00088">88</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a6bf05ed0f0c28e625508269a958497ae"></a><!-- doxytag: member="drv_eth_vga_capture::block_wrreq" ref="a6bf05ed0f0c28e625508269a958497ae" args="reg" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a6bf05ed0f0c28e625508269a958497ae">block_wrreq</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00089">89</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a38a0ce51d1dfba739092251226e2c642">fifo_wrreq</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00112">112</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a246788022ac009e7a0ed501c4368fa8d">start_load</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00113">113</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a23e64f8509cd5130837d5589d6144d0b">fifo_empty</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00115">115</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a4718b8c841f8694e680df02aae2b33a4">fifo_q</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[11:0]]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00116">116</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a59768c08add982f9d20148482217c411">scfifo</a></span> <b><span class="vhdlchar">vga_fifo_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00118">118</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="ad4ef489b0816e0c8849b5c3a588e1d11"></a><!-- doxytag: member="drv_eth_vga_capture::fifo_rdreq" ref="ad4ef489b0816e0c8849b5c3a588e1d11" args="reg" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#ad4ef489b0816e0c8849b5c3a588e1d11">fifo_rdreq</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00131">131</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a6ef0f10045357015c38f6fd3bc181d78">fifo_rd_cnt</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[1:0]]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00132">132</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a762873b5a64a5eecb15b8721a83ef6f8"></a><!-- doxytag: member="drv_eth_vga_capture::last_fifo_q" ref="a762873b5a64a5eecb15b8721a83ef6f8" args="reg[11:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a762873b5a64a5eecb15b8721a83ef6f8">last_fifo_q</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[11:0]]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00133">133</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<a class="anchor" id="a7349e4e8b9da301884c10edaf7642c49"></a><!-- doxytag: member="drv_eth_vga_capture::state_counter" ref="a7349e4e8b9da301884c10edaf7642c49" args="reg[15:0]" -->
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          <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__eth__vga__capture.html#a7349e4e8b9da301884c10edaf7642c49">state_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[15:0]]</code></td>
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<p>Definition at line <a class="el" href="drv__eth__vga__capture_8v_source.html#l00137">137</a> of file <a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a>.</p>
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<hr/>The documentation for this class was generated from the following file:<ul>
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<li><a class="el" href="drv__eth__vga__capture_8v_source.html">drv_eth_vga_capture.v</a></li>
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</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by&#160;
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<a href="http://www.doxygen.org/index.html">
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<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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