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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2010 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 10.0 Build 218 06/27/2010 SJ Web Edition
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# Date created = 23:00:23 November 02, 2010
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# audio_test_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone II"
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set_global_assignment -name DEVICE EP2C70F896C6
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set_global_assignment -name TOP_LEVEL_ENTITY audio_test
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 10.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:00:23 NOVEMBER 02, 2010"
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set_global_assignment -name LAST_QUARTUS_VERSION 10.0
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set_global_assignment -name VERILOG_FILE audio_test.v
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
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set_location_assignment PIN_J18 -to ac_sclk
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set_location_assignment PIN_H18 -to ac_sdat
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set_location_assignment PIN_D17 -to ac_xclk
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set_location_assignment PIN_E17 -to ac_bclk
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set_location_assignment PIN_F18 -to ac_dat
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set_location_assignment PIN_G18 -to ac_lr
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set_location_assignment PIN_R3 -to clk_50
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set_location_assignment PIN_AA23 -to reset_ext_n
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set_location_assignment PIN_AC13 -to pc_debug[0]
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set_location_assignment PIN_AB13 -to pc_debug[1]
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set_location_assignment PIN_AC12 -to pc_debug[2]
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set_location_assignment PIN_AB12 -to pc_debug[3]
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set_location_assignment PIN_AC11 -to pc_debug[4]
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set_location_assignment PIN_AD9 -to pc_debug[5]
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set_location_assignment PIN_AD8 -to pc_debug[6]
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set_location_assignment PIN_AJ7 -to pc_debug[7]
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
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set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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