Subversion Repositories bit_gpio

# TCL File Generated by Component Editor 9.0

# Thu Apr 23 11:35:45 CST 2009

# DO NOT MODIFY

# +-----------------------------------

# | 

# | gpio "gpio" v2.0

# | Thomas Chou 2009.04.23.11:35:45

# | generic gpio

# | 

# | /home/thomas/new2/gpio/t1proj/gpio.v

# | 

# |    ./gpio.v syn, sim

# | 

# +-----------------------------------

# +-----------------------------------

# | module gpio

# | 

set_module_property DESCRIPTION "generic gpio"

set_module_property NAME gpio

set_module_property VERSION 2.0

set_module_property INTERNAL false

set_module_property GROUP "Peripherals/Microcontroller Peripherals"

set_module_property AUTHOR "Thomas Chou"

set_module_property DISPLAY_NAME gpio

set_module_property TOP_LEVEL_HDL_FILE hdl/gpio.v

set_module_property TOP_LEVEL_HDL_MODULE gpio

set_module_property INSTANTIATE_IN_SYSTEM_MODULE true

set_module_property EDITABLE true

# | 

# +-----------------------------------

# +-----------------------------------

# | files

# | 

add_file hdl/gpio.v {SYNTHESIS SIMULATION}

# | 

# +-----------------------------------

# +-----------------------------------

# | parameters

# | 

add_parameter BIDIR_WIDTH INTEGER 8

set_parameter_property BIDIR_WIDTH DISPLAY_NAME BIDIR_WIDTH

set_parameter_property BIDIR_WIDTH UNITS None

set_parameter_property BIDIR_WIDTH DISPLAY_HINT "Total IO width"

set_parameter_property BIDIR_WIDTH AFFECTS_GENERATION true

set_parameter_property BIDIR_WIDTH IS_HDL_PARAMETER true

add_parameter INPUT_WIDTH INTEGER 4

set_parameter_property INPUT_WIDTH DISPLAY_NAME INPUT_WIDTH

set_parameter_property INPUT_WIDTH UNITS None

set_parameter_property INPUT_WIDTH DISPLAY_HINT "Bidir IO width"

set_parameter_property INPUT_WIDTH AFFECTS_GENERATION true

set_parameter_property INPUT_WIDTH IS_HDL_PARAMETER true

add_parameter ADDR_WIDTH INTEGER 4

set_parameter_property ADDR_WIDTH DISPLAY_NAME ADDR_WIDTH

set_parameter_property ADDR_WIDTH UNITS None

set_parameter_property ADDR_WIDTH DISPLAY_HINT "Address width"

set_parameter_property ADDR_WIDTH AFFECTS_GENERATION true

set_parameter_property ADDR_WIDTH IS_HDL_PARAMETER true

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# +-----------------------------------

# +-----------------------------------

# | connection point avalon_slave_0

# | 

add_interface avalon_slave_0 avalon end

set_interface_property avalon_slave_0 addressAlignment NATIVE

set_interface_property avalon_slave_0 bridgesToMaster ""

set_interface_property avalon_slave_0 burstOnBurstBoundariesOnly false

set_interface_property avalon_slave_0 holdTime 0

set_interface_property avalon_slave_0 isMemoryDevice false

set_interface_property avalon_slave_0 isNonVolatileStorage false

set_interface_property avalon_slave_0 linewrapBursts false

set_interface_property avalon_slave_0 maximumPendingReadTransactions 0

set_interface_property avalon_slave_0 printableDevice false

set_interface_property avalon_slave_0 readLatency 0

set_interface_property avalon_slave_0 readWaitTime 1

set_interface_property avalon_slave_0 setupTime 0

set_interface_property avalon_slave_0 timingUnits Cycles

set_interface_property avalon_slave_0 writeWaitTime 0

set_interface_property avalon_slave_0 ASSOCIATED_CLOCK clock_reset

set_interface_property avalon_slave_0 ENABLED true

add_interface_port avalon_slave_0 readdata readdata Output 2

add_interface_port avalon_slave_0 address address Input -1

add_interface_port avalon_slave_0 write_n write_n Input 1

add_interface_port avalon_slave_0 writedata writedata Input 2

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# +-----------------------------------

# +-----------------------------------

# | connection point clock_reset

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add_interface clock_reset clock end

set_interface_property clock_reset ptfSchematicName ""

set_interface_property clock_reset ENABLED true

add_interface_port clock_reset clk clk Input 1

add_interface_port clock_reset reset_n reset_n Input 1

# | 

# +-----------------------------------

# +-----------------------------------

# | connection point conduit_end

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add_interface conduit_end conduit end

set_interface_property conduit_end ASSOCIATED_CLOCK clock_reset

set_interface_property conduit_end ENABLED true

add_interface_port conduit_end bidir_port export Bidir -1

add_interface_port conduit_end input_port export Input -1

# | 

# +-----------------------------------