Subversion Repositories bustap-jtag

# Copyright (C) 1991-2006 Altera Corporation

# Your use of Altera Corporation's design tools, logic functions

# and other software and tools, and its AMPP partner logic

# functions, and any output files from any of the foregoing

# (including device programming or simulation files), and any

# associated documentation or information are expressly subject

# to the terms and conditions of the Altera Program License

# Subscription Agreement, Altera MegaCore Function License

# Agreement, or other applicable license agreement, including,

# without limitation, that your use is for the sole purpose of

# programming logic devices manufactured by Altera and sold by

# Altera or its authorized distributors.  Please refer to the

# applicable agreement for further details.

# The default values for assignments are stored in the file

#               up_monitor_assignment_defaults.qdf

# If this file doesn't exist, and for assignments not listed, see file

#               assignment_defaults.qdf

# Altera recommends that you do not modify this file. This

# file is updated automatically by the Quartus II software

# and any changes you make may be lost or overwritten.

set_global_assignment -name DEVICE Auto

set_global_assignment -name FAMILY "Cyclone III"

set_global_assignment -name TOP_LEVEL_ENTITY up_monitor_wrapper

set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.1

set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:33:38  JUNE 01, 2009"

set_global_assignment -name LAST_QUARTUS_VERSION "10.1 SP1"

set_global_assignment -name ENABLE_ADVANCED_IO_TIMING OFF

set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output

set_global_assignment -name VERILOG_FILE ../../rtl/up_monitor_wrapper.v

set_global_assignment -name VERILOG_FILE ../../rtl/up_monitor.v

set_global_assignment -name VERILOG_FILE ../../rtl/altera/virtual_jtag_addr_mask.v

set_global_assignment -name VERILOG_FILE ../../rtl/altera/virtual_jtag_adda_fifo.v

set_global_assignment -name VERILOG_FILE ../../rtl/altera/virtual_jtag_adda_trig.v

set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top

set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top

set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top

set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top