OpenCores
URL https://opencores.org/ocsvn/bustap-jtag/bustap-jtag/trunk

Subversion Repositories bustap-jtag

[/] [bustap-jtag/] [trunk/] [rtl/] [altera/] [jtag_sim_define.h] - Blame information for rev 10

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 10 ash_riple
`define USE_SIM_STIMULUS
2
 
3
`define FIFO_SLD_SIM_ACTION "((1,1,1,2))"
4
`define FIFO_SLD_SIM_N_SCAN 1
5
`define FIFO_SLD_SIM_T_LENG 2
6
 
7
`define ADDR_SLD_SIM_ACTION "((1,1,1,2))"
8
`define ADDR_SLD_SIM_N_SCAN 1
9
`define ADDR_SLD_SIM_T_LENG 2
10
 
11
`define TRIG_SLD_SIM_ACTION "((1,1,1,2))"
12
`define TRIG_SLD_SIM_N_SCAN 1
13
`define TRIG_SLD_SIM_T_LENG 2
14
 
15
 
16
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.