URL
https://opencores.org/ocsvn/cde/cde/trunk
[/] [cde/] [trunk/] [ip/] [sram/] [doc/] [html/] [cde_sram_dp.html] - Blame information for rev 2
Details |
Compare with Previous |
View Log
| Line No. |
Rev |
Author |
Line |
| 1 |
2 |
jt_eaton |
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
|
| 2 |
|
|
<HTML>
|
| 3 |
|
|
<HEAD>
|
| 4 |
|
|
<META HTTP-EQUIV="CONTENT-TYPE" CONTENT="text/html; charset=utf-8">
|
| 5 |
|
|
<TITLE>start</TITLE>
|
| 6 |
|
|
<META NAME="GENERATOR" CONTENT="LibreOffice 3.6 (Linux)">
|
| 7 |
|
|
<META NAME="CREATED" CONTENT="0;0">
|
| 8 |
|
|
<META NAME="CHANGEDBY" CONTENT="Ouabache Designworks">
|
| 9 |
|
|
<META NAME="CHANGED" CONTENT="20130817;15222100">
|
| 10 |
|
|
<META NAME="KEYWORDS" CONTENT="start">
|
| 11 |
|
|
<META NAME="Info 3" CONTENT="">
|
| 12 |
|
|
<META NAME="Info 4" CONTENT="">
|
| 13 |
|
|
<META NAME="date" CONTENT="2008-01-08T12:01:41-0500">
|
| 14 |
|
|
<META NAME="robots" CONTENT="index,follow">
|
| 15 |
|
|
<STYLE TYPE="text/css">
|
| 16 |
|
|
<!--
|
| 17 |
|
|
H2.ctl { font-family: "Lohit Hindi" }
|
| 18 |
|
|
-->
|
| 19 |
|
|
</STYLE>
|
| 20 |
|
|
</HEAD>
|
| 21 |
|
|
<BODY LANG="en-US" DIR="LTR">
|
| 22 |
|
|
<H1><A NAME="Datasheet"></A>SOCGEN Datasheet:</H1>
|
| 23 |
|
|
<DIV ID="toc__inside" DIR="LTR">
|
| 24 |
|
|
<UL>
|
| 25 |
|
|
<UL>
|
| 26 |
|
|
<LI><P STYLE="margin-bottom: 0in"><A HREF="#TheoryofOperation">Theory
|
| 27 |
|
|
of Operation</A></P>
|
| 28 |
|
|
</UL>
|
| 29 |
|
|
</UL>
|
| 30 |
|
|
</DIV>
|
| 31 |
|
|
<P><BR><BR>
|
| 32 |
|
|
</P>
|
| 33 |
|
|
<H2 CLASS="western"><A NAME="TheoryofOperation"></A><B>Theory of
|
| 34 |
|
|
Operation</B></H2>
|
| 35 |
|
|
<P>The synchronous ram modules provide a variety of memory storage
|
| 36 |
|
|
options. <BR>Both reads and writes are synchronous to the rising edge
|
| 37 |
|
|
of clk. <BR>Memory may be initialized from a bit file and later
|
| 38 |
|
|
overwritten by memory writes. <BR>If WRITETHRU is set to 1 then a
|
| 39 |
|
|
simultaneous read/write to the same address will read the new data.
|
| 40 |
|
|
<BR>If set to 0 it will return the old. <BR>Setting DEFAULT
|
| 41 |
|
|
determines the value of rdata when a read is not
|
| 42 |
|
|
occurring<BR><BR><BR><BR><IMG SRC="../png/sram_timing.png" NAME="graphics1" ALIGN=BOTTOM WIDTH=724 HEIGHT=544 BORDER=0><BR><B><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR></B><BR><BR>
|
| 43 |
|
|
</P>
|
| 44 |
|
|
</BODY>
|
| 45 |
|
|
</HTML>
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.