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[/] [cic/] [trunk/] [header/] [integrator.h] - Blame information for rev 2

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/*
 * This is a behavioral description for an integrator stage.
 * The integrator consists of adder and single delay element.
 * It should be noted that the output is asynchronous, i.e.,
 * as soon as the input changes the output has to change
 * instantaneously.
 */
 
SC_MODULE(integrator)
{
        /// Design entity
        sc_in<bool>     CLR;                    // Asynchronous active high reset
        sc_in<bool>     CLK;                    // Rising edge clock
        sc_in<double>   integratorIN;   // Integrator stage input
        sc_out<double>  integratorOUT;  // Integrator stage output
 
        /// Internal signals
        sc_signal<double> r_delay;              // Internal signal used for delay
 
        /// Constructor
        SC_CTOR(integrator)
        {
                SC_METHOD(algorithm);
                        sensitive << integratorIN << r_delay;
 
                SC_METHOD(delay);
                        sensitive << CLK.pos();
 
                integratorOUT.initialize(0);
        }
 
        /// Concurrent processes
        /*
         * This process emulates an adder stage. It adds the input
         * and the a delayed version of the output, i.e., the prvious
         * output sample.
         */
        void algorithm()
        {
                if (CLR.read() == true)
                {
 
                }
                else
                {
                        integratorOUT.write( integratorIN.read() + r_delay.read() );
                }
        }
 
        /*
         * This process emulates the recursive feedback from the
         * output to the input through a delay path.
         */
        void delay()
        {
                if (CLR.read() == true)
                {
                        r_delay.write(0);
                }
                else
                {
                        r_delay.write(integratorOUT.read());
                }
        }
};
 
 
/* Integrator Stage
 
                 ***
    --->* + *--------------->
                 ***                    |
                  ^                     |
                  |       *****         |
                  ----* z *<-----
                          *****
 
*/

Line No.	Rev	Author	Line
1	2	ahmed.shah	`/*`
2			`* This is a behavioral description for an integrator stage.`
3			`* The integrator consists of adder and single delay element.`
4			`* It should be noted that the output is asynchronous, i.e.,`
5			`* as soon as the input changes the output has to change`
6			`* instantaneously.`
7			`*/`
8
9			`SC_MODULE(integrator)`
10			`{`
11			`/// Design entity`
12			`sc_in<bool> CLR; // Asynchronous active high reset`
13			`sc_in<bool> CLK; // Rising edge clock`
14			`sc_in<double> integratorIN; // Integrator stage input`
15			`sc_out<double> integratorOUT; // Integrator stage output`
16
17			`/// Internal signals`
18			`sc_signal<double> r_delay; // Internal signal used for delay`
19
20			`/// Constructor`
21			`SC_CTOR(integrator)`
22			`{`
23			`SC_METHOD(algorithm);`
24			`sensitive << integratorIN << r_delay;`
25
26			`SC_METHOD(delay);`
27			`sensitive << CLK.pos();`
28
29			`integratorOUT.initialize(0);`
30			`}`
31
32			`/// Concurrent processes`
33			`/*`
34			`* This process emulates an adder stage. It adds the input`
35			`* and the a delayed version of the output, i.e., the prvious`
36			`* output sample.`
37			`*/`
38			`void algorithm()`
39			`{`
40			`if (CLR.read() == true)`
41			`{`
42
43			`}`
44			`else`
45			`{`
46			`integratorOUT.write( integratorIN.read() + r_delay.read() );`
47			`}`
48			`}`
49
50			`/*`
51			`* This process emulates the recursive feedback from the`
52			`* output to the input through a delay path.`
53			`*/`
54			`void delay()`
55			`{`
56			`if (CLR.read() == true)`
57			`{`
58			`r_delay.write(0);`
59			`}`
60			`else`
61			`{`
62			`r_delay.write(integratorOUT.read());`
63			`}`
64			`}`
65			`};`
66
67
68			`/* Integrator Stage`
69
70			`***`
71			`--->* + *--------------->`
72			`*** \|`
73			`^ \|`
74			`\| ***** \|`
75			`----* z *<-----`
76			`*****`
77
78			`*/`

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