URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [chip/] [xilinx_spartan_xc3S500e/] [1.0/] [xilinx_spartan_xc3S500e.1.0.xml] - Blame information for rev 147

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        TUT
        chip
        xilinx_spartan_xc3S500e
        1.0
        
                
                        eth
                        
                        
                        
                        false
                        8
                        little
                
        
        
                
                        
                                structural
                                
                                
                        
                
        
        
                
                        
                                Chip
                                HW
                                Parameterizable
                        
                
        


Line No.	Rev	Author	Line
1	145	lanttu
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4	147	lanttu
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6	145	lanttu
7			`TUT`
8			`chip`
9			`xilinx_spartan_xc3S500e`
10			`1.0`
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12
13			`eth`
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17			`false`
18			`8`
19			`little`
20
21
22
23
24
25			`structural`
26
27
28
29
30
31
32
33
34			`Chip`
35			`HW`
36			`Parameterizable`
37
38
39
40

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Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [chip/] [xilinx_spartan_xc3S500e/] [1.0/] [xilinx_spartan_xc3S500e.1.0.xml] - Blame information for rev 147