URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.accelerator/] [dct_to_hibi/] [1.0/] [dct_to_hibi.1.0.xml] - Blame information for rev 181

Details | Compare with Previous | View Log








        TUT
        ip.hwp.accelerator
        dct_to_hibi
        1.0
        DCT to Hibi. Connects dctQidct block to HIBI Wrapper
 
Input:
1.  Address to send the results to quant
2.  Address to send the results to idct (set unused address if you don't use this)
2. Control word for the current macroblock
    Control word structure: bit    6: chroma(1)/luma(0) NOT USED,
                                5: intra(1)/inter(0),
                                                   4..0: quantizer parameter (QP)
3. Then the DCT data ( 8x8x6 x 16-bit values = 384 x 16 bit )
 
Only 9b DCT data values are supported currently.
Send two DCT-values packed to upper and lower 16bits in the sigle hibi transmission.
 
<31------------------16--------------------0>  BIT index
            DCT_DATA_1         DCT_DATA_0     DATA
 
 
NOTE: If self release is used (use_self_rel_g=1) user gets the signal that dct_to_hibi is ready to receive data.
            By default self release is disabled and you user can send data to dct_to_hibi after quant results are received.
 
 
Outputs:
 Outputs are 16-bit words which are packed up to hibi. If hibi width is
 32b, then 2 16-bit words are combined into one hibi word.
 01. quant results: 1. 8*8 x 16bit values to quant result address
 02. idct  results: 1. 8*8 x 16bit values to idct  result address
 03. quant results: 2. 8*8 x 16bit values to quant result address
 04. idct  results: 2. 8*8 x 16bit values to idct  result address
 05. quant results: 3. 8*8 x 16bit values to quant result address
 06. idct  results: 3. 8*8 x 16bit values to idct  result address
 07. quant results: 4. 8*8 x 16bit values to quant result address
 08. idct  results: 4. 8*8 x 16bit values to idct  result address
 09. quant results: 5. 8*8 x 16bit values to quant result address
 10. idct  results: 5. 8*8 x 16bit values to idct  result address
 11. quant results: 6. 8*8 x 16bit values to quant result address
 12. quant results: 1 word with bits 5..0 determing if 8x8 quant blocks(1-6)
                    has all values zeros (except dc-component in intra)
 13. idct  results: 6. 8*8 x 16bit values to idct  result address
-
 Total amount of 16-bit values is: 384 per result address + 1 hibi word to
 quantization result address.
 
 With default parameter:
 Total of 193 words of data to quant address (if data_width_g = 32)
 Total of 192 words of data to idct address (if data_width_g = 32)

        
                
                        clk
                        Clock interface
                        
                        
                        
                        false
                        
                                
                                        
                                                CLK
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                clk
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        dct_if
                        Interface for connecting idctquant accelerator  
                        
                        
                        
                        false
                        
                                
                                        
                                                CHROMA_TO_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                chroma_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                DCT_READY4COL_FROM_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                dct_ready4col_in
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                IDCT_READY4COL_TO_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                idct_ready4col_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                INTRA_TO_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                intra_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                LOAD_QP_TO_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                loadQP_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                QP_TO_ACC
                                                
                                                        4
                                                        0
                                                
                                        
                                        
                                                QP_out
                                                
                                                        4
                                                        0
                                                
                                        
                                
                                
                                        
                                                WR_DCT_TO_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                wr_dct_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                WR_IDCT_FROM_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                wr_idct_in
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                WR_QUANT_FROM_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                wr_quant_in
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                QUANT_READY4COL_TO_ACC
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                quant_ready4col_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                DATA_DCT_TO_ACC
                                                
                                                        8
                                                        0
                                                
                                        
                                        
                                                data_dct_out
                                                
                                                        8
                                                        0
                                                
                                        
                                
                                
                                        
                                                DATA_IDCT_FROM_ACC
                                                
                                                        8
                                                        0
                                                
                                        
                                        
                                                data_idct_in
                                                
                                                        8
                                                        0
                                                
                                        
                                
                                
                                        
                                                DATA_QUANT_FROM_ACC
                                                
                                                        7
                                                        0
                                                
                                        
                                        
                                                data_quant_in
                                                
                                                        7
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        hibi_master
                        HIBI wrapper r4 version 2 master interface
                        
                        
                        
                        false
                        
                                
                                        
                                                AV
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                hibi_av_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                COMM
                                                
                                                        4
                                                        0
                                                
                                        
                                        
                                                hibi_comm_out
                                                
                                                        4
                                                        0
                                                
                                        
                                
                                
                                        
                                                DATA
                                                
                                                        31
                                                        0
                                                
                                        
                                        
                                                hibi_data_out
                                                
                                                        31
                                                        0
                                                
                                        
                                
                                
                                        
                                                RE
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                hibi_re_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                WE
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                hibi_we_out
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        rst_n
                        Active low reset input.
                        
                        
                        
                        false
                        
                                
                                        
                                                RESETn
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                rst_n
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        hibi_slave
                        
                        
                        
                                
                        
                        false
                        
                                
                                        
                                                AV
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                hibi_av_in
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                COMM
                                                
                                                        4
                                                        0
                                                
                                        
                                        
                                                hibi_comm_in
                                                
                                                        4
                                                        0
                                                
                                        
                                
                                
                                        
                                                DATA
                                                
                                                        31
                                                        0
                                                
                                        
                                        
                                                hibi_data_in
                                                
                                                        31
                                                        0
                                                
                                        
                                
                                
                                        
                                                EMPTY
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                hibi_empty_in
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                FULL
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                hibi_full_in
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
        
        
                
                        dct_mem_map
                        
                                dct_regs
                                0x0
                                7
                                32
                                register
                                
                                        quant_result_addr
                                        0
                                        0x0
                                        32
                                
                                
                                        idct_result_addr
                                        0
                                        0x1
                                        32
                                
                                
                                        ctrl_reg
                                        0
                                        0x2
                                        32
                                        
                                                QP
                                                Quant parameter
                                                0
                                                5
                                                false
                                                true
                                        
                                        
                                                intra_or_inter
                                                0=intra, 1=inter
                                                5
                                                1
                                                false
                                                true
                                        
                                        
                                                chroma_luma
                                                0=luma, 1=chroma
                                                6
                                                1
                                                false
                                                true
                                        
                                
                                
                                        dct_data
                                        0
                                        0x3
                                        32
                                
                        
                        32
                
        
        
                
                        
                                rtl
                                vhdl:quartus, modelsim:
                                dct_to_hibi
                                
                                        hdlSources
                                
                        
                
                
                        
                                QP_out
                                
                                        out
                                        
                                                4
                                                0
                                        
                                
                                
                        
                        
                                chroma_out
                                
                                        out
                                        
                                                0
                                                0
                                        
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                clk
                                
                                        in
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                data_dct_out
                                
                                        out
                                        
                                                8
                                                0
                                        
                                
                                
                        
                        
                                data_idct_in
                                
                                        in
                                        
                                                8
                                                0
                                        
                                        
                                                (others => '0')
                                        
                                
                                
                        
                        
                                data_quant_in
                                
                                        in
                                        
                                                7
                                                0
                                        
                                        
                                                (others => '0')
                                        
                                
                                
                        
                        
                                dct_ready4col_in
                                
                                        in
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                debug_out
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                hibi_av_in
                                
                                        in
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                hibi_av_out
                                
                                        out
                                
                                
                        
                        
                                hibi_comm_in
                                
                                        in
                                        
                                                4
                                                0
                                        
                                        
                                                (others => '0')
                                        
                                
                                
                        
                        
                                hibi_comm_out
                                
                                        out
                                        
                                                4
                                                0
                                        
                                
                                
                        
                        
                                hibi_data_in
                                
                                        in
                                        
                                                31
                                                0
                                        
                                        
                                                (others => '0')
                                        
                                
                                
                        
                        
                                hibi_data_out
                                
                                        out
                                        
                                                31
                                                0
                                        
                                
                                
                        
                        
                                hibi_empty_in
                                
                                        in
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                hibi_full_in
                                
                                        in
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                hibi_re_out
                                
                                        out
                                
                                
                        
                        
                                hibi_we_out
                                
                                        out
                                
                                
                        
                        
                                idct_ready4col_out
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                intra_out
                                
                                        out
                                
                                
                        
                        
                                loadQP_out
                                
                                        out
                                
                                
                        
                        
                                quant_ready4col_out
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                rst_n
                                
                                        in
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                wr_dct_out
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                wr_idct_in
                                
                                        in
                                        
                                                0
                                                0
                                        
                                        
                                                '0'
                                        
                                
                                
                        
                        
                                wr_quant_in
                                
                                        in
                                        
                                                0
                                                0
                                        
                                        
                                                '0'
                                        
                                
                                
                        
                
                
                        
                                comm_width_g
                                5
                        
                        
                                data_width_g
                                32
                        
                        
                                dct_width_g
                                Incoming data width(9b)
                                9
                        
                        
                                debug_w_g
                                1
                        
                        
                                idct_width_g
                                Data width after IDCT(9b)
                                9
                        
                        
                                own_address_g
                                Used for self-release
                                0
                        
                        
                                quant_width_g
                                Quantizated data width(8b)
                                8
                        
                        
                                rtm_address_g
                                Used for self-release
                                0
                        
                        
                                use_self_rel_g
                                Does it release itself from RTM?
                                0
                        
                
        
        
                
                        hdlSources
                        
                                hdl/cl_cnt.vhd
                                vhdlSource
                                false
                                dct_to_hibi
                        
                        
                                hdl/dct_to_hibi_v2.vhd
                                vhdlSource
                                false
                                dct_to_hibi
                        
                        
                                ../../dctqidct/1.0/hdl/dctQidct/IDCT_fifo.vhd
                                vhdlSource
                                false
                                dct_to_hibi
                        
                
                
                        Documentation
                        
                                doc/dct_to_hibi_ports.csv
                                csvFile
                                false
                        
                
        
        
                
                        
                                IP
                                HW
                                Mutable
                        
                        
                                
                                        dct_data_in
                                        
                                        
                                        
                                        packet
                                        in
                                        
                                        
                                
                                
                                        dct_data_out
                                        
                                        
                                        
                                        packet
                                        out
                                        
                                        
                                
                                
                                        block_count_in
                                        
                                        
                                        
                                        message
                                        in
                                        
                                        
                                
                        
                
        


Browse

Tools

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.accelerator/] [dct_to_hibi/] [1.0/] [dct_to_hibi.1.0.xml] - Blame information for rev 181

Line No.	Rev	Author	Line
1	145	lanttu
2
3
4
5
6
7			`TUT`
8			`ip.hwp.accelerator`
9			`dct_to_hibi`
10			`1.0`
11			`DCT to Hibi. Connects dctQidct block to HIBI Wrapper`
12
13			`Input:`
14	167	lanttu	`1. Address to send the results to quant`
15			`2. Address to send the results to idct (set unused address if you don't use this)`
16	145	lanttu	`2. Control word for the current macroblock`
17	181	lanttu	`Control word structure: bit 6: chroma(1)/luma(0) NOT USED,`
18	167	lanttu	`5: intra(1)/inter(0),`
19			`4..0: quantizer parameter (QP)`
20	145	lanttu	`3. Then the DCT data ( 8x8x6 x 16-bit values = 384 x 16 bit )`
21
22	167	lanttu	`Only 9b DCT data values are supported currently.`
23			`Send two DCT-values packed to upper and lower 16bits in the sigle hibi transmission.`
24	145	lanttu
25	167	lanttu	`<31------------------16--------------------0> BIT index`
26			`DCT_DATA_1 DCT_DATA_0 DATA`
27
28
29			`NOTE: If self release is used (use_self_rel_g=1) user gets the signal that dct_to_hibi is ready to receive data.`
30			`By default self release is disabled and you user can send data to dct_to_hibi after quant results are received.`
31
32
33	145	lanttu	`Outputs:`
34			`Outputs are 16-bit words which are packed up to hibi. If hibi width is`
35			`32b, then 2 16-bit words are combined into one hibi word.`
36			`01. quant results: 1. 8*8 x 16bit values to quant result address`
37			`02. idct results: 1. 8*8 x 16bit values to idct result address`
38			`03. quant results: 2. 8*8 x 16bit values to quant result address`
39			`04. idct results: 2. 8*8 x 16bit values to idct result address`
40			`05. quant results: 3. 8*8 x 16bit values to quant result address`
41			`06. idct results: 3. 8*8 x 16bit values to idct result address`
42			`07. quant results: 4. 8*8 x 16bit values to quant result address`
43			`08. idct results: 4. 8*8 x 16bit values to idct result address`
44			`09. quant results: 5. 8*8 x 16bit values to quant result address`
45			`10. idct results: 5. 8*8 x 16bit values to idct result address`
46			`11. quant results: 6. 8*8 x 16bit values to quant result address`
47			`12. quant results: 1 word with bits 5..0 determing if 8x8 quant blocks(1-6)`
48			`has all values zeros (except dc-component in intra)`
49			`13. idct results: 6. 8*8 x 16bit values to idct result address`
50			`-`
51			`Total amount of 16-bit values is: 384 per result address + 1 hibi word to`
52			`quantization result address.`
53
54			`With default parameter:`
55			`Total of 193 words of data to quant address (if data_width_g = 32)`
56			`Total of 192 words of data to idct address (if data_width_g = 32)`
57
58
59
60			`clk`
61			`Clock interface`
62
63
64
65			`false`
66
67
68
69			`CLK`
70
71			`0`
72			`0`
73
74
75
76			`clk`
77
78			`0`
79			`0`
80
81
82
83
84			`8`
85			`little`
86
87
88			`dct_if`
89			`Interface for connecting idctquant accelerator`
90
91
92
93			`false`
94
95
96
97			`CHROMA_TO_ACC`
98
99			`0`
100			`0`
101
102
103
104			`chroma_out`
105
106			`0`
107			`0`
108
109
110
111
112
113			`DCT_READY4COL_FROM_ACC`
114
115			`0`
116			`0`
117
118
119
120			`dct_ready4col_in`
121
122			`0`
123			`0`
124
125
126
127
128
129			`IDCT_READY4COL_TO_ACC`
130
131			`0`
132			`0`
133
134
135
136			`idct_ready4col_out`
137
138			`0`
139			`0`
140
141
142
143
144
145			`INTRA_TO_ACC`
146
147			`0`
148			`0`
149
150
151
152			`intra_out`
153
154			`0`
155			`0`
156
157
158
159
160
161			`LOAD_QP_TO_ACC`
162
163			`0`
164			`0`
165
166
167
168			`loadQP_out`
169
170			`0`
171			`0`
172
173
174
175
176
177			`QP_TO_ACC`
178
179			`4`
180			`0`
181
182
183
184			`QP_out`
185
186			`4`
187			`0`
188
189
190
191
192
193			`WR_DCT_TO_ACC`
194
195			`0`
196			`0`
197
198
199
200			`wr_dct_out`
201
202			`0`
203			`0`
204
205
206
207
208
209			`WR_IDCT_FROM_ACC`
210
211			`0`
212			`0`
213
214
215
216			`wr_idct_in`
217
218			`0`
219			`0`
220
221
222
223
224
225			`WR_QUANT_FROM_ACC`
226
227			`0`
228			`0`
229
230
231
232			`wr_quant_in`
233
234			`0`
235			`0`
236
237
238
239
240
241			`QUANT_READY4COL_TO_ACC`
242
243			`0`
244			`0`
245
246
247
248			`quant_ready4col_out`
249
250			`0`
251			`0`
252
253
254
255
256
257			`DATA_DCT_TO_ACC`
258
259			`8`
260			`0`
261
262
263
264			`data_dct_out`
265
266			`8`
267			`0`
268
269
270
271
272
273			`DATA_IDCT_FROM_ACC`
274
275			`8`
276			`0`
277
278
279
280			`data_idct_in`
281
282			`8`
283			`0`
284
285
286
287
288
289			`DATA_QUANT_FROM_ACC`
290
291			`7`
292			`0`
293
294
295
296			`data_quant_in`
297
298			`7`
299			`0`
300
301
302
303
304			`8`
305			`little`
306
307
308			`hibi_master`
309			`HIBI wrapper r4 version 2 master interface`
310
311
312
313			`false`
314
315
316
317			`AV`
318
319			`0`
320			`0`
321
322
323
324			`hibi_av_out`
325
326			`0`
327			`0`
328
329
330
331
332
333			`COMM`
334
335			`4`
336			`0`
337
338
339
340			`hibi_comm_out`
341
342			`4`
343			`0`
344
345
346
347
348
349			`DATA`
350
351			`31`
352			`0`
353
354
355
356			`hibi_data_out`
357
358			`31`
359			`0`
360
361
362
363
364
365			`RE`
366
367			`0`
368			`0`
369
370
371
372			`hibi_re_out`
373
374			`0`
375			`0`
376
377
378
379
380
381			`WE`
382
383			`0`
384			`0`
385
386
387
388			`hibi_we_out`
389
390			`0`
391			`0`
392
393
394
395
396			`8`
397			`little`
398
399
400			`rst_n`
401			`Active low reset input.`
402
403
404
405			`false`
406
407
408
409			`RESETn`
410
411			`0`
412			`0`
413
414
415
416			`rst_n`
417
418			`0`
419			`0`
420
421
422
423
424			`8`
425			`little`
426
427
428			`hibi_slave`
429
430
431	157	lanttu
432
433
434	145	lanttu	`false`
435
436
437
438			`AV`
439
440			`0`
441			`0`
442
443
444
445			`hibi_av_in`
446
447			`0`
448			`0`
449
450
451
452
453
454			`COMM`
455
456			`4`
457			`0`
458
459
460
461			`hibi_comm_in`
462
463			`4`
464			`0`
465
466
467
468
469
470			`DATA`
471
472			`31`
473			`0`
474
475
476
477			`hibi_data_in`
478
479			`31`
480			`0`
481
482
483
484
485
486			`EMPTY`
487
488			`0`
489			`0`
490
491
492
493			`hibi_empty_in`
494
495			`0`
496			`0`
497
498
499
500
501
502			`FULL`
503
504			`0`
505			`0`
506
507
508
509			`hibi_full_in`
510
511			`0`
512			`0`
513
514
515
516
517			`8`
518			`little`
519
520
521	157	lanttu
522
523			`dct_mem_map`
524
525			`dct_regs`
526			`0x0`
527	181	lanttu	`7`
528	157	lanttu	`32`
529			`register`
530
531			`quant_result_addr`
532			`0`
533			`0x0`
534			`32`
535
536
537			`idct_result_addr`
538			`0`
539			`0x1`
540			`32`
541
542
543			`ctrl_reg`
544			`0`
545			`0x2`
546			`32`
547
548			`QP`
549			`Quant parameter`
550			`0`
551			`5`
552			`false`
553			`true`
554
555
556			`intra_or_inter`
557			`0=intra, 1=inter`
558			`5`
559			`1`
560			`false`
561			`true`
562
563
564			`chroma_luma`
565			`0=luma, 1=chroma`
566			`6`
567			`1`
568			`false`
569			`true`
570
571
572
573			`dct_data`
574			`0`
575			`0x3`
576			`32`
577
578
579	181	lanttu	`32`
580	157	lanttu
581
582	145	lanttu
583
584
585			`rtl`
586			`vhdl:quartus, modelsim:`
587			`dct_to_hibi`
588
589			`hdlSources`
590
591
592
593
594
595			`QP_out`
596
597			`out`
598
599			`4`
600			`0`
601
602
603
604
605
606			`chroma_out`
607
608			`out`
609
610			`0`
611			`0`
612
613	159	lanttu
614			`'0'`
615
616	145	lanttu
617
618
619
620			`clk`
621
622			`in`
623	159	lanttu
624			`'0'`
625
626	145	lanttu
627
628
629
630			`data_dct_out`
631
632			`out`
633
634			`8`
635			`0`
636
637
638
639
640
641			`data_idct_in`
642
643			`in`
644
645			`8`
646			`0`
647
648	159	lanttu
649			`(others => '0')`
650
651	145	lanttu
652
653
654
655			`data_quant_in`
656
657			`in`
658
659			`7`
660			`0`
661
662	159	lanttu
663			`(others => '0')`
664
665	145	lanttu
666
667
668
669			`dct_ready4col_in`
670
671			`in`
672	159	lanttu
673			`'0'`
674
675	145	lanttu
676
677
678
679			`debug_out`
680
681			`out`
682
683			`0`
684			`0`
685
686
687
688
689
690			`hibi_av_in`
691
692			`in`
693	159	lanttu
694			`'0'`
695
696	145	lanttu
697
698
699
700			`hibi_av_out`
701
702			`out`
703
704
705
706
707			`hibi_comm_in`
708
709			`in`
710
711			`4`
712			`0`
713
714
715	159	lanttu	`(others => '0')`
716	145	lanttu
717
718
719
720
721			`hibi_comm_out`
722
723			`out`
724
725			`4`
726			`0`
727
728
729
730
731
732			`hibi_data_in`
733
734			`in`
735
736			`31`
737			`0`
738
739
740			`(others => '0')`
741
742
743
744
745
746			`hibi_data_out`
747
748			`out`
749
750			`31`
751			`0`
752
753
754
755
756
757			`hibi_empty_in`
758
759			`in`
760
761			`'0'`
762
763
764
765
766
767			`hibi_full_in`
768
769			`in`
770
771	159	lanttu	`'0'`
772	145	lanttu
773
774
775
776
777			`hibi_re_out`
778
779			`out`
780
781
782
783
784			`hibi_we_out`
785
786			`out`
787
788
789
790
791			`idct_ready4col_out`
792
793			`out`
794
795			`0`
796			`0`
797
798
799
800
801
802			`intra_out`
803
804			`out`
805
806
807
808
809			`loadQP_out`
810
811			`out`
812
813
814
815
816			`quant_ready4col_out`
817
818			`out`
819
820			`0`
821			`0`
822
823
824
825
826
827			`rst_n`
828
829			`in`
830	159	lanttu
831			`'0'`
832
833	145	lanttu
834
835
836
837			`wr_dct_out`
838
839			`out`
840
841			`0`
842			`0`
843
844
845
846
847
848			`wr_idct_in`
849
850			`in`
851
852			`0`
853			`0`
854
855	159	lanttu
856			`'0'`
857
858	145	lanttu
859
860
861
862			`wr_quant_in`
863
864			`in`
865
866			`0`
867			`0`
868
869	159	lanttu
870			`'0'`
871
872	145	lanttu
873
874
875
876
877
878			`comm_width_g`
879			`5`
880
881
882			`data_width_g`
883			`32`
884
885
886			`dct_width_g`
887			`Incoming data width(9b)`
888			`9`
889
890
891			`debug_w_g`
892			`1`
893
894
895			`idct_width_g`
896			`Data width after IDCT(9b)`
897			`9`
898
899
900			`own_address_g`
901			`Used for self-release`
902			`0`
903
904
905			`quant_width_g`
906			`Quantizated data width(8b)`
907			`8`
908
909
910			`rtm_address_g`
911			`Used for self-release`
912			`0`
913
914
915			`use_self_rel_g`
916			`Does it release itself from RTM?`
917	167	lanttu	`0`
918	145	lanttu
919
920
921
922
923			`hdlSources`
924
925			`hdl/cl_cnt.vhd`
926			`vhdlSource`
927			`false`
928			`dct_to_hibi`
929
930
931			`hdl/dct_to_hibi_v2.vhd`
932			`vhdlSource`
933			`false`
934			`dct_to_hibi`
935
936
937			`../../dctqidct/1.0/hdl/dctQidct/IDCT_fifo.vhd`
938			`vhdlSource`
939			`false`
940			`dct_to_hibi`
941
942
943
944			`Documentation`
945
946			`doc/dct_to_hibi_ports.csv`
947			`csvFile`
948			`false`
949
950
951
952
953
954
955			`IP`
956			`HW`
957			`Mutable`
958
959
960
961			`dct_data_in`
962
963
964
965			`packet`
966			`in`
967
968	181	lanttu
969	145	lanttu
970
971			`dct_data_out`
972
973
974
975			`packet`
976			`out`
977
978	181	lanttu
979	145	lanttu
980
981			`block_count_in`
982
983
984
985			`message`
986			`in`
987
988	181	lanttu
989	145	lanttu
990
991
992
993