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umairsiddi |
#--------------------------------------------------------------
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#-- HPC-16 Assembler
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#--------------------------------------------------------------
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#-- project: HPC-16 Microprocessor
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#--
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#-- ANTLR4 parser Listener
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#--
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#--
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#--
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#-- Author: M. Umair Siddiqui (umairsiddiqui@opencores.org)
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#---------------------------------------------------------------
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#------------------------------------------------------------------------------------
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#-- --
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#-- Copyright (c) 2015, M. Umair Siddiqui all rights reserved --
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#-- --
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#-- This file is part of HPC-16. --
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#-- --
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#-- HPC-16 is free software; you can redistribute it and/or modify --
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#-- it under the terms of the GNU Lesser General Public License as published by --
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#-- the Free Software Foundation; either version 2.1 of the License, or --
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#-- (at your option) any later version. --
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#-- --
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#-- HPC-16 is distributed in the hope that it will be useful, --
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#-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
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#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --
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#-- GNU Lesser General Public License for more details. --
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#-- --
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#-- You should have received a copy of the GNU Lesser General Public License --
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#-- along with HPC-16; if not, write to the Free Software --
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#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA --
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#-- --
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#------------------------------------------------------------------------------------
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import sys
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import re
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import math
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from antlr4 import *
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from HPC16Listener import HPC16Listener
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from MyHPC16ListenerUtil import MyHPC16ListenerUtil
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class MyHPC16Listener(HPC16Listener):
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def __init__(self, fout):
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self.debug = 1
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self.util = MyHPC16ListenerUtil(fout)
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super(MyHPC16Listener, self).__init__()
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# Enter a parse tree produced by HPC16Parser#prog.
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def enterProg(self, ctx):
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pass
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# Exit a parse tree produced by HPC16Parser#prog.
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def exitProg(self, ctx):
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self.util.cleanup()
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def enterStat(self, ctx):
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if self.debug:
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st = "#"
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for i in range(ctx.getChildCount()):
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st = st + " " + ctx.getChild(i).getText()
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self.util.write_info(st.rstrip())
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# Exit a parse tree produced by HPC16Parser#mov_reg_reg.
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def exitMov_reg_reg(self, ctx):
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err = False
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["mov_reg_reg"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#mov_sp_reg.
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def exitMov_sp_reg(self, ctx):
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err = False
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src = ctx.REG().getText()
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err = not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["mov_sp_reg"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#mov_reg_sp.
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def exitMov_reg_sp(self, ctx):
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err = False
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dest = ctx.REG().getText()
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err = not self.util.vld_reg(dest)
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if not err:
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ins = 0
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ins = int(self.util.opcode["mov_reg_sp"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#ld_reg_reg.
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def exitLd_reg_reg(self, ctx):
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err = False
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["ld_reg_reg"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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def enterLd_reg_reg_imm16(self, ctx):
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if self.debug:
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self.util.write_info("# ld %s, (%s + %s)" %
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(ctx.REG(0).getText(), ctx.REG(1).getText()), )
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# Exit a parse tree produced by HPC16Parser#ld_reg_reg_imm16.
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def exitLd_reg_reg_imm16(self, ctx):
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err = False
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src) or not self.util.vld_imm_val(imm, 2**16)
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if not err:
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ins = 0
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ins = int(self.util.opcode["ld_reg_reg_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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self.util.write_ins(imm)
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# Exit a parse tree produced by HPC16Parser#ld_reg_sp.
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def exitLd_reg_sp(self, ctx):
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err = False
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dest = ctx.REG().getText()
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err = not self.util.vld_reg(dest)
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if not err:
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ins = 0
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ins = int(self.util.opcode["ld_reg_sp"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#ld_reg_sp_imm16.
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def exitLd_reg_sp_imm16(self, ctx):
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err = False
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dest = ctx.REG().getText()
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
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if not err:
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ins = 0
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ins = int(self.util.opcode["ld_reg_sp_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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self.util.write_ins(ins)
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self.util.write_ins(imm)
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# Exit a parse tree produced by HPC16Parser#st_reg_reg.
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def exitSt_reg_reg(self, ctx):
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err = False
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src = ctx.REG(0).getText()
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dest = ctx.REG(1).getText()
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["st_reg_reg"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2) << 4
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ins = ins | int(self.util.regcode[dest], 2)
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#st_reg_reg_imm16.
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def exitSt_reg_reg_imm16(self, ctx):
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err = False
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src = ctx.REG(0).getText()
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dest = ctx.REG(1).getText()
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src) or not self.util.vld_imm_val(imm, 2**16)
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if not err:
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ins = 0
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ins = int(self.util.opcode["st_reg_reg_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2) << 4
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ins = ins | int(self.util.regcode[dest], 2)
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self.util.write_ins(ins)
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self.util.write_ins(imm)
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# Exit a parse tree produced by HPC16Parser#st_reg_sp.
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def exitSt_reg_sp(self, ctx):
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err = False
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src = ctx.REG().getText()
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err = not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["st_reg_sp"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2) << 4
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#st_reg_sp_imm16.
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def exitSt_reg_sp_imm16(self, ctx):
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err = False
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src = ctx.REG().getText()
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(src) or not self.util.vld_imm_val(imm, 2**16)
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if not err:
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ins = 0
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ins = int(self.util.opcode["st_reg_sp_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2) << 4
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self.util.write_ins(ins)
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self.util.write_ins(imm)
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# Exit a parse tree produced by HPC16Parser#lbzx_reg_reg.
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def exitLbzx_reg_reg(self, ctx):
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err = False
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["lbzx_reg_reg"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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# Exit a parse tree produced by HPC16Parser#lbzx_reg_reg_imm16.
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def exitLbzx_reg_reg_imm16(self, ctx):
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err = False
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src) or not self.util.vld_imm_val(imm, 2**16)
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if not err:
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ins = 0
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ins = int(self.util.opcode["lbzx_reg_reg_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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self.util.write_ins(imm)
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244 |
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# Exit a parse tree produced by HPC16Parser#lbsx_reg_reg.
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def exitLbsx_reg_reg(self, ctx):
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err = False
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
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if not err:
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ins = 0
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ins = int(self.util.opcode["lbsx_reg_reg"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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257 |
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# Exit a parse tree produced by HPC16Parser#lbsx_reg_reg_imm16.
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def exitLbsx_reg_reg_imm16(self, ctx):
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err = False
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260 |
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dest = ctx.REG(0).getText()
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src = ctx.REG(1).getText()
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src) or not self.util.vld_imm_val(imm, 2**16)
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264 |
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265 |
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if not err:
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ins = 0
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ins = int(self.util.opcode["lbsx_reg_reg_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[dest], 2) << 4
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ins = ins | int(self.util.regcode[src], 2)
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self.util.write_ins(ins)
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self.util.write_ins(imm)
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272 |
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273 |
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# Exit a parse tree produced by HPC16Parser#sb_reg_reg.
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def exitSb_reg_reg(self, ctx):
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275 |
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err = False
|
276 |
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src = ctx.REG(0).getText()
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dest = ctx.REG(1).getText()
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
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279 |
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if not err:
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280 |
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ins = 0
|
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ins = int(self.util.opcode["sb_reg_reg"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2) << 4
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ins = ins | int(self.util.regcode[dest], 2)
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284 |
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self.util.write_ins(ins)
|
285 |
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286 |
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# Exit a parse tree produced by HPC16Parser#sb_reg_reg_imm16.
|
287 |
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def exitSb_reg_reg_imm16(self, ctx):
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288 |
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err = False
|
289 |
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src = ctx.REG(0).getText()
|
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dest = ctx.REG(1).getText()
|
291 |
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imm = self.util.get_imm_val(ctx.IMM().getText())
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err = not self.util.vld_reg(dest) or not self.util.vld_reg(src) or not self.util.vld_imm_val(imm, 2**16)
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293 |
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294 |
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if not err:
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295 |
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ins = 0
|
296 |
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ins = int(self.util.opcode["sb_reg_reg_imm16"], 2) << 8
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ins = ins | int(self.util.regcode[src], 2) << 4
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298 |
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ins = ins | int(self.util.regcode[dest], 2)
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299 |
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self.util.write_ins(ins)
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300 |
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self.util.write_ins(imm)
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301 |
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302 |
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# Exit a parse tree produced by HPC16Parser#li_reg_imm16.
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303 |
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def exitLi_reg_imm16(self, ctx):
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304 |
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err = False
|
305 |
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dest = ctx.REG().getText()
|
306 |
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imm = self.util.get_imm_val(ctx.IMM().getText())
|
307 |
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err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
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308 |
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if not err:
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309 |
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ins = 0
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ins = int(self.util.opcode["li_reg_imm16"], 2) << 8
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311 |
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ins = ins | int(self.util.regcode[dest], 2) << 4
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312 |
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self.util.write_ins(ins)
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313 |
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self.util.write_ins(imm)
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314 |
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315 |
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316 |
|
|
# Exit a parse tree produced by HPC16Parser#li_sp_imm16.
|
317 |
|
|
def exitLi_sp_imm16(self, ctx):
|
318 |
|
|
err = False
|
319 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
320 |
|
|
err = not self.util.vld_imm_val(imm, 2**16)
|
321 |
|
|
if not err:
|
322 |
|
|
ins = 0
|
323 |
|
|
ins = int(self.util.opcode["li_sp_imm16"], 2) << 8
|
324 |
|
|
self.util.write_ins(ins)
|
325 |
|
|
self.util.write_ins(imm)
|
326 |
|
|
|
327 |
|
|
|
328 |
|
|
# Exit a parse tree produced by HPC16Parser#inc_reg.
|
329 |
|
|
def exitInc_reg(self, ctx):
|
330 |
|
|
err = False
|
331 |
|
|
dest = ctx.REG().getText()
|
332 |
|
|
err = not self.util.vld_reg(dest)
|
333 |
|
|
if not err:
|
334 |
|
|
ins = 0
|
335 |
|
|
ins = int(self.util.opcode["inc_reg"], 2) << 8
|
336 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
337 |
|
|
self.util.write_ins(ins)
|
338 |
|
|
|
339 |
|
|
# Exit a parse tree produced by HPC16Parser#dec_reg.
|
340 |
|
|
def exitDec_reg(self, ctx):
|
341 |
|
|
err = False
|
342 |
|
|
dest = ctx.REG().getText()
|
343 |
|
|
err = not self.util.vld_reg(dest)
|
344 |
|
|
if not err:
|
345 |
|
|
ins = 0
|
346 |
|
|
ins = int(self.util.opcode["dec_reg"], 2) << 8
|
347 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
348 |
|
|
self.util.write_ins(ins)
|
349 |
|
|
|
350 |
|
|
# Exit a parse tree produced by HPC16Parser#sub_reg_reg.
|
351 |
|
|
def exitSub_reg_reg(self, ctx):
|
352 |
|
|
err = False
|
353 |
|
|
dest = ctx.REG(0).getText()
|
354 |
|
|
src = ctx.REG(1).getText()
|
355 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
356 |
|
|
if not err:
|
357 |
|
|
ins = 0
|
358 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
359 |
|
|
ins = ins | int(self.util.alu_opcode["sub"], 2) << 8
|
360 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
361 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
362 |
|
|
self.util.write_ins(ins)
|
363 |
|
|
|
364 |
|
|
# Exit a parse tree produced by HPC16Parser#and_reg_reg.
|
365 |
|
|
def exitAnd_reg_reg(self, ctx):
|
366 |
|
|
err = False
|
367 |
|
|
dest = ctx.REG(0).getText()
|
368 |
|
|
src = ctx.REG(1).getText()
|
369 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
370 |
|
|
if not err:
|
371 |
|
|
ins = 0
|
372 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
373 |
|
|
ins = ins | int(self.util.alu_opcode["and"], 2) << 8
|
374 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
375 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
376 |
|
|
self.util.write_ins(ins)
|
377 |
|
|
|
378 |
|
|
|
379 |
|
|
# Exit a parse tree produced by HPC16Parser#add_reg_reg.
|
380 |
|
|
def exitAdd_reg_reg(self, ctx):
|
381 |
|
|
err = False
|
382 |
|
|
dest = ctx.REG(0).getText()
|
383 |
|
|
src = ctx.REG(1).getText()
|
384 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
385 |
|
|
if not err:
|
386 |
|
|
ins = 0
|
387 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
388 |
|
|
ins = ins | int(self.util.alu_opcode["add"], 2) << 8
|
389 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
390 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
391 |
|
|
self.util.write_ins(ins)
|
392 |
|
|
|
393 |
|
|
|
394 |
|
|
# Exit a parse tree produced by HPC16Parser#adc_reg_reg.
|
395 |
|
|
def exitAdc_reg_reg(self, ctx):
|
396 |
|
|
err = False
|
397 |
|
|
dest = ctx.REG(0).getText()
|
398 |
|
|
src = ctx.REG(1).getText()
|
399 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
400 |
|
|
if not err:
|
401 |
|
|
ins = 0
|
402 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
403 |
|
|
ins = ins | int(self.util.alu_opcode["adc"], 2) << 8
|
404 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
405 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
406 |
|
|
self.util.write_ins(ins)
|
407 |
|
|
|
408 |
|
|
# Exit a parse tree produced by HPC16Parser#sbb_reg_reg.
|
409 |
|
|
def exitSbb_reg_reg(self, ctx):
|
410 |
|
|
err = False
|
411 |
|
|
dest = ctx.REG(0).getText()
|
412 |
|
|
src = ctx.REG(1).getText()
|
413 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
414 |
|
|
if not err:
|
415 |
|
|
ins = 0
|
416 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
417 |
|
|
ins = ins | int(self.util.alu_opcode["sbb"], 2) << 8
|
418 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
419 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
420 |
|
|
self.util.write_ins(ins)
|
421 |
|
|
|
422 |
|
|
# Exit a parse tree produced by HPC16Parser#or_reg_reg.
|
423 |
|
|
def exitOr_reg_reg(self, ctx):
|
424 |
|
|
err = False
|
425 |
|
|
dest = ctx.REG(0).getText()
|
426 |
|
|
src = ctx.REG(1).getText()
|
427 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
428 |
|
|
if not err:
|
429 |
|
|
ins = 0
|
430 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
431 |
|
|
ins = ins | int(self.util.alu_opcode["or"], 2) << 8
|
432 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
433 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
434 |
|
|
self.util.write_ins(ins)
|
435 |
|
|
|
436 |
|
|
# Exit a parse tree produced by HPC16Parser#xor_reg_reg.
|
437 |
|
|
def exitXor_reg_reg(self, ctx):
|
438 |
|
|
err = False
|
439 |
|
|
dest = ctx.REG(0).getText()
|
440 |
|
|
src = ctx.REG(1).getText()
|
441 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
442 |
|
|
if not err:
|
443 |
|
|
ins = 0
|
444 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
445 |
|
|
ins = ins | int(self.util.alu_opcode["xor"], 2) << 8
|
446 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
447 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
448 |
|
|
self.util.write_ins(ins)
|
449 |
|
|
|
450 |
|
|
# Exit a parse tree produced by HPC16Parser#not_reg.
|
451 |
|
|
def exitNot_reg(self, ctx):
|
452 |
|
|
err = False
|
453 |
|
|
dest = ctx.REG().getText()
|
454 |
|
|
err = not self.util.vld_reg(dest)
|
455 |
|
|
if not err:
|
456 |
|
|
ins = 0
|
457 |
|
|
ins = int(self.util.opcode["alur"], 2) << 11
|
458 |
|
|
ins = ins | int(self.util.alu_opcode["not"], 2) << 8
|
459 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
460 |
|
|
self.util.write_ins(ins)
|
461 |
|
|
|
462 |
|
|
# Exit a parse tree produced by HPC16Parser#sub_reg_imm16.
|
463 |
|
|
def exitSub_reg_imm16(self, ctx):
|
464 |
|
|
err = False
|
465 |
|
|
dest = ctx.REG().getText()
|
466 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
467 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
468 |
|
|
if not err:
|
469 |
|
|
ins = 0
|
470 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
471 |
|
|
ins = ins | int(self.util.alu_opcode["sub"], 2) << 8
|
472 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
473 |
|
|
self.util.write_ins(ins)
|
474 |
|
|
self.util.write_ins(imm)
|
475 |
|
|
|
476 |
|
|
# Exit a parse tree produced by HPC16Parser#and_reg_imm16.
|
477 |
|
|
def exitAnd_reg_imm16(self, ctx):
|
478 |
|
|
err = False
|
479 |
|
|
dest = ctx.REG().getText()
|
480 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
481 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
482 |
|
|
if not err:
|
483 |
|
|
ins = 0
|
484 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
485 |
|
|
ins = ins | int(self.util.alu_opcode["and"], 2) << 8
|
486 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
487 |
|
|
self.util.write_ins(ins)
|
488 |
|
|
self.util.write_ins(imm)
|
489 |
|
|
|
490 |
|
|
# Exit a parse tree produced by HPC16Parser#add_reg_imm16.
|
491 |
|
|
def exitAdd_reg_imm16(self, ctx):
|
492 |
|
|
err = False
|
493 |
|
|
dest = ctx.REG().getText()
|
494 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
495 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
496 |
|
|
if not err:
|
497 |
|
|
ins = 0
|
498 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
499 |
|
|
ins = ins | int(self.util.alu_opcode["add"], 2) << 8
|
500 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
501 |
|
|
self.util.write_ins(ins)
|
502 |
|
|
self.util.write_ins(imm)
|
503 |
|
|
|
504 |
|
|
# Exit a parse tree produced by HPC16Parser#adc_reg_imm16.
|
505 |
|
|
def exitAdc_reg_imm16(self, ctx):
|
506 |
|
|
err = False
|
507 |
|
|
dest = ctx.REG().getText()
|
508 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
509 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
510 |
|
|
if not err:
|
511 |
|
|
ins = 0
|
512 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
513 |
|
|
ins = ins | int(self.util.alu_opcode["adc"], 2) << 8
|
514 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
515 |
|
|
self.util.write_ins(ins)
|
516 |
|
|
self.util.write_ins(imm)
|
517 |
|
|
|
518 |
|
|
# Exit a parse tree produced by HPC16Parser#sbb_reg_imm16.
|
519 |
|
|
def exitSbb_reg_imm16(self, ctx):
|
520 |
|
|
err = False
|
521 |
|
|
dest = ctx.REG().getText()
|
522 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
523 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
524 |
|
|
if not err:
|
525 |
|
|
ins = 0
|
526 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
527 |
|
|
ins = ins | int(self.util.alu_opcode["sbb"], 2) << 8
|
528 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
529 |
|
|
self.util.write_ins(ins)
|
530 |
|
|
self.util.write_ins(imm)
|
531 |
|
|
|
532 |
|
|
|
533 |
|
|
# Exit a parse tree produced by HPC16Parser#or_reg_imm16.
|
534 |
|
|
def exitOr_reg_imm16(self, ctx):
|
535 |
|
|
err = False
|
536 |
|
|
dest = ctx.REG().getText()
|
537 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
538 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
539 |
|
|
if not err:
|
540 |
|
|
ins = 0
|
541 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
542 |
|
|
ins = ins | int(self.util.alu_opcode["or"], 2) << 8
|
543 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
544 |
|
|
self.util.write_ins(ins)
|
545 |
|
|
self.util.write_ins(imm)
|
546 |
|
|
|
547 |
|
|
# Exit a parse tree produced by HPC16Parser#xor_reg_imm16.
|
548 |
|
|
def exitXor_reg_imm16(self, ctx):
|
549 |
|
|
err = False
|
550 |
|
|
dest = ctx.REG().getText()
|
551 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
552 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
553 |
|
|
if not err:
|
554 |
|
|
ins = 0
|
555 |
|
|
ins = int(self.util.opcode["alui"], 2) << 11
|
556 |
|
|
ins = ins | int(self.util.alu_opcode["xor"], 2) << 8
|
557 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
558 |
|
|
self.util.write_ins(ins)
|
559 |
|
|
self.util.write_ins(imm)
|
560 |
|
|
|
561 |
|
|
|
562 |
|
|
# Exit a parse tree produced by HPC16Parser#add_sp_imm16.
|
563 |
|
|
def exitAdd_sp_imm16(self, ctx):
|
564 |
|
|
err = False
|
565 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
566 |
|
|
err = not self.util.vld_imm_val(imm, 2**16)
|
567 |
|
|
if not err:
|
568 |
|
|
ins = 0
|
569 |
|
|
ins = int(self.util.opcode["add_sp_imm16"], 2) << 8
|
570 |
|
|
self.util.write_ins(ins)
|
571 |
|
|
self.util.write_ins(imm)
|
572 |
|
|
|
573 |
|
|
# Exit a parse tree produced by HPC16Parser#sub_sp_imm16.
|
574 |
|
|
def exitSub_sp_imm16(self, ctx):
|
575 |
|
|
err = False
|
576 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
577 |
|
|
err = not self.util.vld_imm_val(imm, 2**16)
|
578 |
|
|
if not err:
|
579 |
|
|
ins = 0
|
580 |
|
|
ins = int(self.util.opcode["sub_sp_imm16"], 2) << 8
|
581 |
|
|
self.util.write_ins(ins)
|
582 |
|
|
self.util.write_ins(imm)
|
583 |
|
|
|
584 |
|
|
# Exit a parse tree produced by HPC16Parser#cmp_reg_reg.
|
585 |
|
|
def exitCmp_reg_reg(self, ctx):
|
586 |
|
|
err = False
|
587 |
|
|
dest = ctx.REG(0).getText()
|
588 |
|
|
src = ctx.REG(1).getText()
|
589 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
|
590 |
|
|
if not err:
|
591 |
|
|
ins = 0
|
592 |
|
|
ins = int(self.util.opcode["cmp_reg_reg"], 2) << 8
|
593 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
594 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
595 |
|
|
self.util.write_ins(ins)
|
596 |
|
|
|
597 |
|
|
# Exit a parse tree produced by HPC16Parser#test_reg_reg.
|
598 |
|
|
def exitTest_reg_reg(self, ctx):
|
599 |
|
|
err = False
|
600 |
|
|
dest = ctx.REG(0).getText()
|
601 |
|
|
src = ctx.REG(1).getText()
|
602 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_reg(src)
|
603 |
|
|
if not err:
|
604 |
|
|
ins = 0
|
605 |
|
|
ins = int(self.util.opcode["test_reg_reg"], 2) << 8
|
606 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
607 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
608 |
|
|
self.util.write_ins(ins)
|
609 |
|
|
|
610 |
|
|
# Exit a parse tree produced by HPC16Parser#cmp_reg_imm16.
|
611 |
|
|
def exitCmp_reg_imm16(self, ctx):
|
612 |
|
|
err = False
|
613 |
|
|
dest = ctx.REG().getText()
|
614 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
615 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
616 |
|
|
if not err:
|
617 |
|
|
ins = 0
|
618 |
|
|
ins = int(self.util.opcode["cmp_reg_imm16"], 2) << 8
|
619 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
620 |
|
|
self.util.write_ins(ins)
|
621 |
|
|
self.util.write_ins(imm)
|
622 |
|
|
|
623 |
|
|
# Exit a parse tree produced by HPC16Parser#test_reg_imm16.
|
624 |
|
|
def exitTest_reg_imm16(self, ctx):
|
625 |
|
|
err = False
|
626 |
|
|
dest = ctx.REG().getText()
|
627 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
628 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**16)
|
629 |
|
|
if not err:
|
630 |
|
|
ins = 0
|
631 |
|
|
ins = int(self.util.opcode["test_reg_imm16"], 2) << 8
|
632 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
633 |
|
|
self.util.write_ins(ins)
|
634 |
|
|
self.util.write_ins(imm)
|
635 |
|
|
|
636 |
|
|
|
637 |
|
|
# Exit a parse tree produced by HPC16Parser#sll_reg_reg.
|
638 |
|
|
def exitSll_reg_reg(self, ctx):
|
639 |
|
|
err = False
|
640 |
|
|
dest = ctx.REG(0).getText()
|
641 |
|
|
src = ctx.REG(1).getText()
|
642 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
643 |
|
|
if not err:
|
644 |
|
|
ins = 0
|
645 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
646 |
|
|
ins = ins | int(self.util.shift_opcode["sll"], 2) << 8
|
647 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
648 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
649 |
|
|
self.util.write_ins(ins)
|
650 |
|
|
|
651 |
|
|
# Exit a parse tree produced by HPC16Parser#slr_reg_reg.
|
652 |
|
|
def exitSlr_reg_reg(self, ctx):
|
653 |
|
|
err = False
|
654 |
|
|
dest = ctx.REG(0).getText()
|
655 |
|
|
src = ctx.REG(1).getText()
|
656 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
657 |
|
|
if not err:
|
658 |
|
|
ins = 0
|
659 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
660 |
|
|
ins = ins | int(self.util.shift_opcode["slr"], 2) << 8
|
661 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
662 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
663 |
|
|
self.util.write_ins(ins)
|
664 |
|
|
|
665 |
|
|
# Exit a parse tree produced by HPC16Parser#sal_reg_reg.
|
666 |
|
|
def exitSal_reg_reg(self, ctx):
|
667 |
|
|
err = False
|
668 |
|
|
dest = ctx.REG(0).getText()
|
669 |
|
|
src = ctx.REG(1).getText()
|
670 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
671 |
|
|
if not err:
|
672 |
|
|
ins = 0
|
673 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
674 |
|
|
ins = ins | int(self.util.shift_opcode["sal"], 2) << 8
|
675 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
676 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
677 |
|
|
self.util.write_ins(ins)
|
678 |
|
|
|
679 |
|
|
# Exit a parse tree produced by HPC16Parser#sar_reg_reg.
|
680 |
|
|
def exitSar_reg_reg(self, ctx):
|
681 |
|
|
err = False
|
682 |
|
|
dest = ctx.REG(0).getText()
|
683 |
|
|
src = ctx.REG(1).getText()
|
684 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
685 |
|
|
if not err:
|
686 |
|
|
ins = 0
|
687 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
688 |
|
|
ins = ins | int(self.util.shift_opcode["sar"], 2) << 8
|
689 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
690 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
691 |
|
|
self.util.write_ins(ins)
|
692 |
|
|
|
693 |
|
|
# Exit a parse tree produced by HPC16Parser#rol_reg_reg.
|
694 |
|
|
def exitRol_reg_reg(self, ctx):
|
695 |
|
|
err = False
|
696 |
|
|
dest = ctx.REG(0).getText()
|
697 |
|
|
src = ctx.REG(1).getText()
|
698 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
699 |
|
|
if not err:
|
700 |
|
|
ins = 0
|
701 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
702 |
|
|
ins = ins | int(self.util.shift_opcode["rol"], 2) << 8
|
703 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
704 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
705 |
|
|
self.util.write_ins(ins)
|
706 |
|
|
|
707 |
|
|
|
708 |
|
|
# Exit a parse tree produced by HPC16Parser#ror_reg_reg.
|
709 |
|
|
def exitRor_reg_reg(self, ctx):
|
710 |
|
|
err = False
|
711 |
|
|
dest = ctx.REG(0).getText()
|
712 |
|
|
src = ctx.REG(1).getText()
|
713 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
714 |
|
|
if not err:
|
715 |
|
|
ins = 0
|
716 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
717 |
|
|
ins = ins | int(self.util.shift_opcode["ror"], 2) << 8
|
718 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
719 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
720 |
|
|
self.util.write_ins(ins)
|
721 |
|
|
|
722 |
|
|
|
723 |
|
|
# Exit a parse tree produced by HPC16Parser#rcl_reg_reg.
|
724 |
|
|
def exitRcl_reg_reg(self, ctx):
|
725 |
|
|
err = False
|
726 |
|
|
dest = ctx.REG(0).getText()
|
727 |
|
|
src = ctx.REG(1).getText()
|
728 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
729 |
|
|
if not err:
|
730 |
|
|
ins = 0
|
731 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
732 |
|
|
ins = ins | int(self.util.shift_opcode["rcl"], 2) << 8
|
733 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
734 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
735 |
|
|
self.util.write_ins(ins)
|
736 |
|
|
|
737 |
|
|
# Exit a parse tree produced by HPC16Parser#rcr_reg_reg.
|
738 |
|
|
def exitRcr_reg_reg(self, ctx):
|
739 |
|
|
err = False
|
740 |
|
|
dest = ctx.REG(0).getText()
|
741 |
|
|
src = ctx.REG(1).getText()
|
742 |
|
|
err = not self.util.vld_reg(dest) and not self.util.vld_reg(src)
|
743 |
|
|
if not err:
|
744 |
|
|
ins = 0
|
745 |
|
|
ins = int(self.util.opcode["shiftr"], 2) << 11
|
746 |
|
|
ins = ins | int(self.util.shift_opcode["rcr"], 2) << 8
|
747 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
748 |
|
|
ins = ins | int(self.util.regcode[src], 2)
|
749 |
|
|
self.util.write_ins(ins)
|
750 |
|
|
|
751 |
|
|
|
752 |
|
|
# Exit a parse tree produced by HPC16Parser#sll_reg_imm4.
|
753 |
|
|
def exitSll_reg_imm4(self, ctx):
|
754 |
|
|
err = False
|
755 |
|
|
dest = ctx.REG().getText()
|
756 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
757 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
758 |
|
|
if not err:
|
759 |
|
|
ins = 0
|
760 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
761 |
|
|
ins = ins | int(self.util.shift_opcode["sll"], 2) << 8
|
762 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
763 |
|
|
ins = ins | imm
|
764 |
|
|
self.util.write_ins(ins)
|
765 |
|
|
|
766 |
|
|
# Exit a parse tree produced by HPC16Parser#slr_reg_imm4.
|
767 |
|
|
def exitSlr_reg_imm4(self, ctx):
|
768 |
|
|
err = False
|
769 |
|
|
dest = ctx.REG().getText()
|
770 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
771 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
772 |
|
|
if not err:
|
773 |
|
|
ins = 0
|
774 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
775 |
|
|
ins = ins | int(self.util.shift_opcode["slr"], 2) << 8
|
776 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
777 |
|
|
ins = ins | imm
|
778 |
|
|
self.util.write_ins(ins)
|
779 |
|
|
|
780 |
|
|
# Exit a parse tree produced by HPC16Parser#sal_reg_imm4.
|
781 |
|
|
def exitSal_reg_imm4(self, ctx):
|
782 |
|
|
err = False
|
783 |
|
|
dest = ctx.REG().getText()
|
784 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
785 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
786 |
|
|
if not err:
|
787 |
|
|
ins = 0
|
788 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
789 |
|
|
ins = ins | int(self.util.shift_opcode["sal"], 2) << 8
|
790 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
791 |
|
|
ins = ins | imm
|
792 |
|
|
self.util.write_ins(ins)
|
793 |
|
|
|
794 |
|
|
# Exit a parse tree produced by HPC16Parser#sar_reg_imm4.
|
795 |
|
|
def exitSar_reg_imm4(self, ctx):
|
796 |
|
|
err = False
|
797 |
|
|
dest = ctx.REG().getText()
|
798 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
799 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
800 |
|
|
if not err:
|
801 |
|
|
ins = 0
|
802 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
803 |
|
|
ins = ins | int(self.util.shift_opcode["sar"], 2) << 8
|
804 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
805 |
|
|
ins = ins | imm
|
806 |
|
|
self.util.write_ins(ins)
|
807 |
|
|
|
808 |
|
|
# Exit a parse tree produced by HPC16Parser#rol_reg_imm4.
|
809 |
|
|
def exitRol_reg_imm4(self, ctx):
|
810 |
|
|
err = False
|
811 |
|
|
dest = ctx.REG().getText()
|
812 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
813 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
814 |
|
|
if not err:
|
815 |
|
|
ins = 0
|
816 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
817 |
|
|
ins = ins | int(self.util.shift_opcode["rol"], 2) << 8
|
818 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
819 |
|
|
ins = ins | imm
|
820 |
|
|
self.util.write_ins(ins)
|
821 |
|
|
|
822 |
|
|
# Exit a parse tree produced by HPC16Parser#ror_reg_imm4.
|
823 |
|
|
def exitRor_reg_imm4(self, ctx):
|
824 |
|
|
err = False
|
825 |
|
|
dest = ctx.REG().getText()
|
826 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
827 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
828 |
|
|
if not err:
|
829 |
|
|
ins = 0
|
830 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
831 |
|
|
ins = ins | int(self.util.shift_opcode["ror"], 2) << 8
|
832 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
833 |
|
|
ins = ins | imm
|
834 |
|
|
self.util.write_ins(ins)
|
835 |
|
|
|
836 |
|
|
|
837 |
|
|
# Exit a parse tree produced by HPC16Parser#rcl_reg_imm4.
|
838 |
|
|
def exitRcl_reg_imm4(self, ctx):
|
839 |
|
|
err = False
|
840 |
|
|
dest = ctx.REG().getText()
|
841 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
842 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
843 |
|
|
if not err:
|
844 |
|
|
ins = 0
|
845 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
846 |
|
|
ins = ins | int(self.util.shift_opcode["rcl"], 2) << 8
|
847 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
848 |
|
|
ins = ins | imm
|
849 |
|
|
self.util.write_ins(ins)
|
850 |
|
|
|
851 |
|
|
|
852 |
|
|
# Exit a parse tree produced by HPC16Parser#rcr_reg_imm4.
|
853 |
|
|
def exitRcr_reg_imm4(self, ctx):
|
854 |
|
|
err = False
|
855 |
|
|
dest = ctx.REG().getText()
|
856 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
857 |
|
|
err = not self.util.vld_reg(dest) or not self.util.vld_imm_val(imm, 2**4)
|
858 |
|
|
if not err:
|
859 |
|
|
ins = 0
|
860 |
|
|
ins = int(self.util.opcode["shifti"], 2) << 11
|
861 |
|
|
ins = ins | int(self.util.shift_opcode["rcr"], 2) << 8
|
862 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
863 |
|
|
ins = ins | imm
|
864 |
|
|
self.util.write_ins(ins)
|
865 |
|
|
|
866 |
|
|
|
867 |
|
|
# Exit a parse tree produced by HPC16Parser#push_reg.
|
868 |
|
|
def exitPush_reg(self, ctx):
|
869 |
|
|
err = False
|
870 |
|
|
dest = ctx.REG().getText()
|
871 |
|
|
err = not self.util.vld_reg(dest)
|
872 |
|
|
if not err:
|
873 |
|
|
ins = 0
|
874 |
|
|
ins = int(self.util.opcode["push_reg"], 2) << 8
|
875 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
876 |
|
|
self.util.write_ins(ins)
|
877 |
|
|
|
878 |
|
|
# Exit a parse tree produced by HPC16Parser#pushf.
|
879 |
|
|
def exitPushf(self, ctx):
|
880 |
|
|
ins = 0
|
881 |
|
|
ins = int(self.util.opcode["pushf"], 2) << 8
|
882 |
|
|
self.util.write_ins(ins)
|
883 |
|
|
|
884 |
|
|
# Exit a parse tree produced by HPC16Parser#pop_reg.
|
885 |
|
|
def exitPop_reg(self, ctx):
|
886 |
|
|
err = False
|
887 |
|
|
dest = ctx.REG().getText()
|
888 |
|
|
err = not self.util.vld_reg(dest)
|
889 |
|
|
if not err:
|
890 |
|
|
ins = 0
|
891 |
|
|
ins = int(self.util.opcode["pop_reg"], 2) << 8
|
892 |
|
|
ins = ins | int(self.util.regcode[dest], 2) << 4
|
893 |
|
|
self.util.write_ins(ins)
|
894 |
|
|
|
895 |
|
|
|
896 |
|
|
# Exit a parse tree produced by HPC16Parser#popf.
|
897 |
|
|
def exitPopf(self, ctx):
|
898 |
|
|
ins = 0
|
899 |
|
|
ins = int(self.util.opcode["popf"], 2) << 8
|
900 |
|
|
self.util.write_ins(ins)
|
901 |
|
|
|
902 |
|
|
|
903 |
|
|
# Exit a parse tree produced by HPC16Parser#acall_reg.
|
904 |
|
|
def exitAcall_reg(self, ctx):
|
905 |
|
|
err = False
|
906 |
|
|
dest = ctx.REG().getText()
|
907 |
|
|
err = not self.util.vld_reg(dest)
|
908 |
|
|
if not err:
|
909 |
|
|
ins = 0
|
910 |
|
|
ins = int(self.util.opcode["acall_reg"], 2) << 8
|
911 |
|
|
ins = ins | int(self.util.regcode[dest], 2)
|
912 |
|
|
self.util.write_ins(ins)
|
913 |
|
|
|
914 |
|
|
|
915 |
|
|
# Exit a parse tree produced by HPC16Parser#call_reg.
|
916 |
|
|
def exitCall_reg(self, ctx):
|
917 |
|
|
err = False
|
918 |
|
|
dest = ctx.REG().getText()
|
919 |
|
|
err = not self.util.vld_reg(dest)
|
920 |
|
|
if not err:
|
921 |
|
|
ins = 0
|
922 |
|
|
ins = int(self.util.opcode["call_reg"], 2) << 8
|
923 |
|
|
ins = ins | int(self.util.regcode[dest], 2)
|
924 |
|
|
self.util.write_ins(ins)
|
925 |
|
|
|
926 |
|
|
|
927 |
|
|
|
928 |
|
|
# Exit a parse tree produced by HPC16Parser#call_imm11.
|
929 |
|
|
def exitCall_imm11(self, ctx):
|
930 |
|
|
err = False
|
931 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
932 |
|
|
err = not self.util.vld_imm_val(imm, 2**11)
|
933 |
|
|
if not err:
|
934 |
|
|
ins = 0
|
935 |
|
|
ins = int(self.util.opcode["call_imm11"], 2) << 11
|
936 |
|
|
ins = ins | imm
|
937 |
|
|
self.util.write_ins(ins)
|
938 |
|
|
|
939 |
|
|
|
940 |
|
|
# Exit a parse tree produced by HPC16Parser#ret.
|
941 |
|
|
def exitRet(self, ctx):
|
942 |
|
|
ins = 0
|
943 |
|
|
ins = int(self.util.opcode["ret"], 2) << 11
|
944 |
|
|
self.util.write_ins(ins)
|
945 |
|
|
|
946 |
|
|
# Exit a parse tree produced by HPC16Parser#iret.
|
947 |
|
|
def exitIret(self, ctx):
|
948 |
|
|
ins = 0
|
949 |
|
|
ins = int(self.util.opcode["iret"], 2) << 11
|
950 |
|
|
self.util.write_ins(ins)
|
951 |
|
|
|
952 |
|
|
# Exit a parse tree produced by HPC16Parser#clc.
|
953 |
|
|
def exitClc(self, ctx):
|
954 |
|
|
ins = 0
|
955 |
|
|
ins = int(self.util.opcode["clc"], 2) << 8
|
956 |
|
|
self.util.write_ins(ins)
|
957 |
|
|
|
958 |
|
|
# Exit a parse tree produced by HPC16Parser#slc.
|
959 |
|
|
def exitStc(self, ctx):
|
960 |
|
|
ins = 0
|
961 |
|
|
ins = int(self.util.opcode["stc"], 2) << 8
|
962 |
|
|
self.util.write_ins(ins)
|
963 |
|
|
|
964 |
|
|
# Exit a parse tree produced by HPC16Parser#cmc.
|
965 |
|
|
def exitCmc(self, ctx):
|
966 |
|
|
ins = 0
|
967 |
|
|
ins = int(self.util.opcode["cmc"], 2) << 8
|
968 |
|
|
self.util.write_ins(ins)
|
969 |
|
|
|
970 |
|
|
# Exit a parse tree produced by HPC16Parser#cli.
|
971 |
|
|
def exitCli(self, ctx):
|
972 |
|
|
ins = 0
|
973 |
|
|
ins = int(self.util.opcode["cli"], 2) << 8
|
974 |
|
|
self.util.write_ins(ins)
|
975 |
|
|
|
976 |
|
|
# Exit a parse tree produced by HPC16Parser#sti.
|
977 |
|
|
def exitSti(self, ctx):
|
978 |
|
|
ins = 0
|
979 |
|
|
ins = int(self.util.opcode["sti"], 2) << 8
|
980 |
|
|
self.util.write_ins(ins)
|
981 |
|
|
|
982 |
|
|
# Exit a parse tree produced by HPC16Parser#int_imm4.
|
983 |
|
|
def exitInt_imm4(self, ctx):
|
984 |
|
|
err = False
|
985 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
986 |
|
|
err = not self.util.vld_imm_val(imm, 2**4)
|
987 |
|
|
if not err:
|
988 |
|
|
ins = 0
|
989 |
|
|
ins = int(self.util.opcode["int_imm4"], 2) << 11
|
990 |
|
|
ins = ins | imm
|
991 |
|
|
self.util.write_ins(ins)
|
992 |
|
|
|
993 |
|
|
# Exit a parse tree produced by HPC16Parser#into.
|
994 |
|
|
def exitInto(self, ctx):
|
995 |
|
|
ins = 0
|
996 |
|
|
ins = int(self.util.opcode["into"], 2) << 11
|
997 |
|
|
self.util.write_ins(ins)
|
998 |
|
|
|
999 |
|
|
# Exit a parse tree produced by HPC16Parser#ajmp.
|
1000 |
|
|
def exitAjmp(self, ctx):
|
1001 |
|
|
err = False
|
1002 |
|
|
dest = ctx.REG().getText()
|
1003 |
|
|
err = not self.util.vld_reg(dest)
|
1004 |
|
|
if not err:
|
1005 |
|
|
ins = 0
|
1006 |
|
|
ins = int(self.util.opcode["ajmp"], 2) << 8
|
1007 |
|
|
ins = ins | int(self.util.regcode[dest], 2)
|
1008 |
|
|
self.util.write_ins(ins)
|
1009 |
|
|
|
1010 |
|
|
|
1011 |
|
|
# Exit a parse tree produced by HPC16Parser#jmp_reg.
|
1012 |
|
|
def exitJmp_reg(self, ctx):
|
1013 |
|
|
err = False
|
1014 |
|
|
dest = ctx.REG().getText()
|
1015 |
|
|
err = not self.util.vld_reg(dest)
|
1016 |
|
|
if not err:
|
1017 |
|
|
ins = 0
|
1018 |
|
|
ins = int(self.util.opcode["jmp_reg"], 2) << 8
|
1019 |
|
|
ins = ins | int(self.util.regcode[dest], 2)
|
1020 |
|
|
self.util.write_ins(ins)
|
1021 |
|
|
|
1022 |
|
|
# Exit a parse tree produced by HPC16Parser#jmp_imm11.
|
1023 |
|
|
def exitJmp_imm11(self, ctx):
|
1024 |
|
|
err = False
|
1025 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1026 |
|
|
err = not self.util.vld_imm_val(imm, 2**11)
|
1027 |
|
|
if not err:
|
1028 |
|
|
ins = 0
|
1029 |
|
|
ins = int(self.util.opcode["jmp_imm11"], 2) << 11
|
1030 |
|
|
ins = ins | imm
|
1031 |
|
|
self.util.write_ins(ins)
|
1032 |
|
|
|
1033 |
|
|
# Exit a parse tree produced by HPC16Parser#nop.
|
1034 |
|
|
def exitNop(self, ctx):
|
1035 |
|
|
ins = 0
|
1036 |
|
|
ins = int(self.util.opcode["nop"], 2) << 11
|
1037 |
|
|
self.util.write_ins(ins)
|
1038 |
|
|
|
1039 |
|
|
# Exit a parse tree produced by HPC16Parser#halt.
|
1040 |
|
|
def exitHalt(self, ctx):
|
1041 |
|
|
ins = 0
|
1042 |
|
|
ins = int(self.util.opcode["halt"], 2) << 11
|
1043 |
|
|
self.util.write_ins(ins)
|
1044 |
|
|
|
1045 |
|
|
# Exit a parse tree produced by HPC16Parser#jo_imm7.
|
1046 |
|
|
def exitJo_imm7(self, ctx):
|
1047 |
|
|
err = False
|
1048 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1049 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1050 |
|
|
if not err:
|
1051 |
|
|
ins = 0
|
1052 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1053 |
|
|
ins = ins | (imm >> 4) << 8
|
1054 |
|
|
ins = ins | int(self.util.jcc_opcode["jo"], 2) << 4
|
1055 |
|
|
ins = ins | (imm & 0x0f)
|
1056 |
|
|
self.util.write_ins(ins)
|
1057 |
|
|
|
1058 |
|
|
# Exit a parse tree produced by HPC16Parser#jno_imm7.
|
1059 |
|
|
def exitJno_imm7(self, ctx):
|
1060 |
|
|
err = False
|
1061 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1062 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1063 |
|
|
if not err:
|
1064 |
|
|
ins = 0
|
1065 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1066 |
|
|
ins = ins | (imm >> 4) << 8
|
1067 |
|
|
ins = ins | int(self.util.jcc_opcode["jno"], 2) << 4
|
1068 |
|
|
ins = ins | (imm & 0x0f)
|
1069 |
|
|
self.util.write_ins(ins)
|
1070 |
|
|
|
1071 |
|
|
# Exit a parse tree produced by HPC16Parser#jb_imm7.
|
1072 |
|
|
def exitJb_imm7(self, ctx):
|
1073 |
|
|
err = False
|
1074 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1075 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1076 |
|
|
if not err:
|
1077 |
|
|
ins = 0
|
1078 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1079 |
|
|
ins = ins | (imm >> 4) << 8
|
1080 |
|
|
ins = ins | int(self.util.jcc_opcode["jb"], 2) << 4
|
1081 |
|
|
ins = ins | (imm & 0x0f)
|
1082 |
|
|
self.util.write_ins(ins)
|
1083 |
|
|
|
1084 |
|
|
# Exit a parse tree produced by HPC16Parser#jnae_imm7.
|
1085 |
|
|
def exitJnae_imm7(self, ctx):
|
1086 |
|
|
err = False
|
1087 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1088 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1089 |
|
|
if not err:
|
1090 |
|
|
ins = 0
|
1091 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1092 |
|
|
ins = ins | (imm >> 4) << 8
|
1093 |
|
|
ins = ins | int(self.util.jcc_opcode["jnae"], 2) << 4
|
1094 |
|
|
ins = ins | (imm & 0x0f)
|
1095 |
|
|
self.util.write_ins(ins)
|
1096 |
|
|
|
1097 |
|
|
# Exit a parse tree produced by HPC16Parser#jnb_imm7.
|
1098 |
|
|
def exitJnb_imm7(self, ctx):
|
1099 |
|
|
err = False
|
1100 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1101 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1102 |
|
|
if not err:
|
1103 |
|
|
ins = 0
|
1104 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1105 |
|
|
ins = ins | (imm >> 4) << 8
|
1106 |
|
|
ins = ins | int(self.util.jcc_opcode["jnb"], 2) << 4
|
1107 |
|
|
ins = ins | (imm & 0x0f)
|
1108 |
|
|
self.util.write_ins(ins)
|
1109 |
|
|
|
1110 |
|
|
|
1111 |
|
|
# Exit a parse tree produced by HPC16Parser#jae_imm7.
|
1112 |
|
|
def exitJae_imm7(self, ctx):
|
1113 |
|
|
err = False
|
1114 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1115 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1116 |
|
|
if not err:
|
1117 |
|
|
ins = 0
|
1118 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1119 |
|
|
ins = ins | (imm >> 4) << 8
|
1120 |
|
|
ins = ins | int(self.util.jcc_opcode["jae"], 2) << 4
|
1121 |
|
|
ins = ins | (imm & 0x0f)
|
1122 |
|
|
self.util.write_ins(ins)
|
1123 |
|
|
|
1124 |
|
|
|
1125 |
|
|
|
1126 |
|
|
# Exit a parse tree produced by HPC16Parser#je_imm7.
|
1127 |
|
|
def exitJe_imm7(self, ctx):
|
1128 |
|
|
err = False
|
1129 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1130 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1131 |
|
|
if not err:
|
1132 |
|
|
ins = 0
|
1133 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1134 |
|
|
ins = ins | (imm >> 4) << 8
|
1135 |
|
|
ins = ins | int(self.util.jcc_opcode["je"], 2) << 4
|
1136 |
|
|
ins = ins | (imm & 0x0f)
|
1137 |
|
|
self.util.write_ins(ins)
|
1138 |
|
|
|
1139 |
|
|
# Exit a parse tree produced by HPC16Parser#jz_imm7.
|
1140 |
|
|
def exitJz_imm7(self, ctx):
|
1141 |
|
|
err = False
|
1142 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1143 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1144 |
|
|
if not err:
|
1145 |
|
|
ins = 0
|
1146 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1147 |
|
|
ins = ins | (imm >> 4) << 8
|
1148 |
|
|
ins = ins | int(self.util.jcc_opcode["jz"], 2) << 4
|
1149 |
|
|
ins = ins | (imm & 0x0f)
|
1150 |
|
|
self.util.write_ins(ins)
|
1151 |
|
|
|
1152 |
|
|
# Exit a parse tree produced by HPC16Parser#jne_imm7.
|
1153 |
|
|
def exitJne_imm7(self, ctx):
|
1154 |
|
|
err = False
|
1155 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1156 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1157 |
|
|
if not err:
|
1158 |
|
|
ins = 0
|
1159 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1160 |
|
|
ins = ins | (imm >> 4) << 8
|
1161 |
|
|
ins = ins | int(self.util.jcc_opcode["jne"], 2) << 4
|
1162 |
|
|
ins = ins | (imm & 0x0f)
|
1163 |
|
|
self.util.write_ins(ins)
|
1164 |
|
|
|
1165 |
|
|
# Exit a parse tree produced by HPC16Parser#jnz_imm7.
|
1166 |
|
|
def exitJnz_imm7(self, ctx):
|
1167 |
|
|
err = False
|
1168 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1169 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1170 |
|
|
if not err:
|
1171 |
|
|
ins = 0
|
1172 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1173 |
|
|
ins = ins | (imm >> 4) << 8
|
1174 |
|
|
ins = ins | int(self.util.jcc_opcode["jnz"], 2) << 4
|
1175 |
|
|
ins = ins | (imm & 0x0f)
|
1176 |
|
|
self.util.write_ins(ins)
|
1177 |
|
|
|
1178 |
|
|
# Exit a parse tree produced by HPC16Parser#jbe_imm7.
|
1179 |
|
|
def exitJbe_imm7(self, ctx):
|
1180 |
|
|
err = False
|
1181 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1182 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1183 |
|
|
if not err:
|
1184 |
|
|
ins = 0
|
1185 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1186 |
|
|
ins = ins | (imm >> 4) << 8
|
1187 |
|
|
ins = ins | int(self.util.jcc_opcode["jbe"], 2) << 4
|
1188 |
|
|
ins = ins | (imm & 0x0f)
|
1189 |
|
|
self.util.write_ins(ins)
|
1190 |
|
|
|
1191 |
|
|
# Exit a parse tree produced by HPC16Parser#jna_imm7.
|
1192 |
|
|
def exitJna_imm7(self, ctx):
|
1193 |
|
|
err = False
|
1194 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1195 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1196 |
|
|
if not err:
|
1197 |
|
|
ins = 0
|
1198 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1199 |
|
|
ins = ins | (imm >> 4) << 8
|
1200 |
|
|
ins = ins | int(self.util.jcc_opcode["jna"], 2) << 4
|
1201 |
|
|
ins = ins | (imm & 0x0f)
|
1202 |
|
|
self.util.write_ins(ins)
|
1203 |
|
|
|
1204 |
|
|
# Exit a parse tree produced by HPC16Parser#jnbe_imm7.
|
1205 |
|
|
def exitJnbe_imm7(self, ctx):
|
1206 |
|
|
err = False
|
1207 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1208 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1209 |
|
|
if not err:
|
1210 |
|
|
ins = 0
|
1211 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1212 |
|
|
ins = ins | (imm >> 4) << 8
|
1213 |
|
|
ins = ins | int(self.util.jcc_opcode["jnbe"], 2) << 4
|
1214 |
|
|
ins = ins | (imm & 0x0f)
|
1215 |
|
|
self.util.write_ins(ins)
|
1216 |
|
|
|
1217 |
|
|
# Exit a parse tree produced by HPC16Parser#ja_imm7.
|
1218 |
|
|
def exitJa_imm7(self, ctx):
|
1219 |
|
|
err = False
|
1220 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1221 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1222 |
|
|
if not err:
|
1223 |
|
|
ins = 0
|
1224 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1225 |
|
|
ins = ins | (imm >> 4) << 8
|
1226 |
|
|
ins = ins | int(self.util.jcc_opcode["ja"], 2) << 4
|
1227 |
|
|
ins = ins | (imm & 0x0f)
|
1228 |
|
|
self.util.write_ins(ins)
|
1229 |
|
|
|
1230 |
|
|
# Exit a parse tree produced by HPC16Parser#js_imm7.
|
1231 |
|
|
def exitJs_imm7(self, ctx):
|
1232 |
|
|
err = False
|
1233 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1234 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1235 |
|
|
if not err:
|
1236 |
|
|
ins = 0
|
1237 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1238 |
|
|
ins = ins | (imm >> 4) << 8
|
1239 |
|
|
ins = ins | int(self.util.jcc_opcode["js"], 2) << 4
|
1240 |
|
|
ins = ins | (imm & 0x0f)
|
1241 |
|
|
self.util.write_ins(ins)
|
1242 |
|
|
|
1243 |
|
|
# Exit a parse tree produced by HPC16Parser#jns_imm7.
|
1244 |
|
|
def exitJns_imm7(self, ctx):
|
1245 |
|
|
err = False
|
1246 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1247 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1248 |
|
|
if not err:
|
1249 |
|
|
ins = 0
|
1250 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1251 |
|
|
ins = ins | (imm >> 4) << 8
|
1252 |
|
|
ins = ins | int(self.util.jcc_opcode["jns"], 2) << 4
|
1253 |
|
|
ins = ins | (imm & 0x0f)
|
1254 |
|
|
self.util.write_ins(ins)
|
1255 |
|
|
|
1256 |
|
|
# Exit a parse tree produced by HPC16Parser#jl_imm7.
|
1257 |
|
|
def exitJl_imm7(self, ctx):
|
1258 |
|
|
err = False
|
1259 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1260 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1261 |
|
|
if not err:
|
1262 |
|
|
ins = 0
|
1263 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1264 |
|
|
ins = ins | (imm >> 4) << 8
|
1265 |
|
|
ins = ins | int(self.util.jcc_opcode["jl"], 2) << 4
|
1266 |
|
|
ins = ins | (imm & 0x0f)
|
1267 |
|
|
self.util.write_ins(ins)
|
1268 |
|
|
|
1269 |
|
|
# Exit a parse tree produced by HPC16Parser#jnge_imm7.
|
1270 |
|
|
def exitJnge_imm7(self, ctx):
|
1271 |
|
|
err = False
|
1272 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1273 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1274 |
|
|
if not err:
|
1275 |
|
|
ins = 0
|
1276 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1277 |
|
|
ins = ins | (imm >> 4) << 8
|
1278 |
|
|
ins = ins | int(self.util.jcc_opcode["jnge"], 2) << 4
|
1279 |
|
|
ins = ins | (imm & 0x0f)
|
1280 |
|
|
self.util.write_ins(ins)
|
1281 |
|
|
|
1282 |
|
|
# Exit a parse tree produced by HPC16Parser#jnl_imm7.
|
1283 |
|
|
def exitJnl_imm7(self, ctx):
|
1284 |
|
|
err = False
|
1285 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1286 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1287 |
|
|
if not err:
|
1288 |
|
|
ins = 0
|
1289 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1290 |
|
|
ins = ins | (imm >> 4) << 8
|
1291 |
|
|
ins = ins | int(self.util.jcc_opcode["jnl"], 2) << 4
|
1292 |
|
|
ins = ins | (imm & 0x0f)
|
1293 |
|
|
self.util.write_ins(ins)
|
1294 |
|
|
|
1295 |
|
|
|
1296 |
|
|
# Exit a parse tree produced by HPC16Parser#jge_imm7.
|
1297 |
|
|
def exitJge_imm7(self, ctx):
|
1298 |
|
|
err = False
|
1299 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1300 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1301 |
|
|
if not err:
|
1302 |
|
|
ins = 0
|
1303 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1304 |
|
|
ins = ins | (imm >> 4) << 8
|
1305 |
|
|
ins = ins | int(self.util.jcc_opcode["jge"], 2) << 4
|
1306 |
|
|
ins = ins | (imm & 0x0f)
|
1307 |
|
|
self.util.write_ins(ins)
|
1308 |
|
|
|
1309 |
|
|
|
1310 |
|
|
# Exit a parse tree produced by HPC16Parser#jle_imm7.
|
1311 |
|
|
def exitJle_imm7(self, ctx):
|
1312 |
|
|
err = False
|
1313 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1314 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1315 |
|
|
if not err:
|
1316 |
|
|
ins = 0
|
1317 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1318 |
|
|
ins = ins | (imm >> 4) << 8
|
1319 |
|
|
ins = ins | int(self.util.jcc_opcode["jle"], 2) << 4
|
1320 |
|
|
ins = ins | (imm & 0x0f)
|
1321 |
|
|
self.util.write_ins(ins)
|
1322 |
|
|
|
1323 |
|
|
|
1324 |
|
|
# Exit a parse tree produced by HPC16Parser#jng_imm7.
|
1325 |
|
|
def exitJng_imm7(self, ctx):
|
1326 |
|
|
err = False
|
1327 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1328 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1329 |
|
|
if not err:
|
1330 |
|
|
ins = 0
|
1331 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1332 |
|
|
ins = ins | (imm >> 4) << 8
|
1333 |
|
|
ins = ins | int(self.util.jcc_opcode["jng"], 2) << 4
|
1334 |
|
|
ins = ins | (imm & 0x0f)
|
1335 |
|
|
self.util.write_ins(ins)
|
1336 |
|
|
|
1337 |
|
|
|
1338 |
|
|
# Exit a parse tree produced by HPC16Parser#jnle_imm7.
|
1339 |
|
|
def exitJnle_imm7(self, ctx):
|
1340 |
|
|
err = False
|
1341 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1342 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1343 |
|
|
if not err:
|
1344 |
|
|
ins = 0
|
1345 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1346 |
|
|
ins = ins | (imm >> 4) << 8
|
1347 |
|
|
ins = ins | int(self.util.jcc_opcode["jnle"], 2) << 4
|
1348 |
|
|
ins = ins | (imm & 0x0f)
|
1349 |
|
|
self.util.write_ins(ins)
|
1350 |
|
|
|
1351 |
|
|
# Exit a parse tree produced by HPC16Parser#jg_imm7.
|
1352 |
|
|
def exitJg_imm7(self, ctx):
|
1353 |
|
|
err = False
|
1354 |
|
|
imm = self.util.get_imm_val(ctx.IMM().getText())
|
1355 |
|
|
err = not self.util.vld_imm_val(imm, 2**7)
|
1356 |
|
|
if not err:
|
1357 |
|
|
ins = 0
|
1358 |
|
|
ins = int(self.util.opcode["jcc"], 2) << 11
|
1359 |
|
|
ins = ins | (imm >> 4) << 8
|
1360 |
|
|
ins = ins | int(self.util.jcc_opcode["jg"], 2) << 4
|
1361 |
|
|
ins = ins | (imm & 0x0f)
|
1362 |
|
|
self.util.write_ins(ins)
|
1363 |
|
|
|
1364 |
|
|
|