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dimamali |
--
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-- Device: LXT971A
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-- Package: LQFP
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-- File Name: 971A_lqfp.bsdl
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--
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-- Revision History
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-- 1.0 - Tim Jackson (4/29/2002)
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-- Legacy file 971Alqfp.txt renamed to 971A_lqfp.bsdl.
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-- Updated attribute IDCODE_REGISTER to handle revision ids 1
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-- and 2 and their appropriate jedec continuation codes.
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-- Changed PWRDWN to a compliance enable and added a design
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-- warning to that effect.
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--
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-- Notes
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-- This file has successfully compiled on the Agilent Technologies 3070
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-- BSDL compiler.
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--
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-- Disclaimer
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-- Intel Corporation ("Intel") hereby grants the user of this BSDL file
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-- ("User") a non-exclusive, nontransferable license to use the file
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-- under the following terms. User may only to use the BSDL file and
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-- is not granted rights to sell, copy (except as needed to run the BSDL
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-- file), rent, lease or sub-license the BSDL file in whole or in part,
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-- or in modified form to anyone. User may modify the BSDL file to suit
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-- its specific applications, but rights to derivative works and such
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-- modifications shall belong to Intel. This BSDL file is provided on an
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-- "AS IS" basis and Intel makes absolutely no warranty with respect to
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-- the information contained herein. INTEL DISCLAIMS AND USER WAIVES
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-- ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING WARRANTIES OF
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-- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND ANY WARRANTY
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-- OF NON-INFRINGEMENT OF THE INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD
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-- PARTY. THE ENTIRE RISK AS TO QUALITY AND PERFORMANCE IS WITH USER.
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-- ACCORDINGLY, IN NO EVENT SHALL INTEL BE LIABLE FOR ANY DIRECT OR
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-- INDIRECT DAMAGES, WHETHER IN CONTRACT OR TORT, INCLUDING, WITHOUT
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-- LIMITATION, LOST PROFITS, BUSINESS INTERRUPTION, OR LOST INFORMATION)
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-- ARISING OUT OF THE USE OF OR INABILITY TO USE THE FILE, EVEN IF INTEL
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-- HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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--
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-- This file is the legal property of Copyright (c) 2002, Intel
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-- Corporation.
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--
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entity shark is
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generic (PHYSICAL_PIN_MAP : string := "LQFP64");
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port (
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GND : linkage bit_vector (1 to 7);
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VCCIO : linkage bit_vector (1 to 2);
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VCCA : linkage bit_vector (1 to 2);
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| 50 |
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VCCD : linkage bit ;
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| 51 |
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NC : linkage bit_vector (1 to 3);
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| 52 |
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XI : linkage bit ;
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XO : linkage bit ;
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MDDIS : in bit ;
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| 55 |
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Reset : in bit ;
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| 56 |
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TXSLEW0: in bit ;
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| 57 |
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TXSLEW1: in bit ;
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| 58 |
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ADDR0 : in bit ;
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| 59 |
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ADDR1 : in bit ;
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| 60 |
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ADDR2 : in bit ;
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| 61 |
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ADDR3 : in bit ;
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| 62 |
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ADDR4 : in bit ;
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| 63 |
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RBIAS : linkage bit ;
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| 64 |
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TPFOP : linkage bit ;
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| 65 |
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TPFON : linkage bit ;
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| 66 |
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TPFIP : linkage bit ;
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| 67 |
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TPFIN : linkage bit ;
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SD_TP : in bit ;
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| 69 |
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TDI : in bit ;
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| 70 |
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TDO : out bit ;
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| 71 |
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TMS : in bit ;
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| 72 |
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TCK : in bit ;
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| 73 |
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TRST : in bit ;
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| 74 |
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SLEEP : in bit ;
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| 75 |
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PAUSE : in bit ;
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| 76 |
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TEST0 : in bit ;
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| 77 |
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TEST1 : in bit ;
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| 78 |
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LEDCFG2: inout bit ;
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| 79 |
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LEDCFG1: inout bit ;
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| 80 |
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LEDCFG0: inout bit ;
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PWRDWN : in bit ;
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| 82 |
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MDIO : inout bit ;
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| 83 |
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MDC : in bit ;
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RXD3 : out bit ;
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RXD2 : out bit ;
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RXD1 : out bit ;
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| 87 |
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RXD0 : out bit ;
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| 88 |
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RX_DV : out bit ;
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| 89 |
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RX_CLK : out bit ;
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| 90 |
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RX_ER : out bit ;
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TX_ER : in bit ;
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TX_CLK : out bit ;
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| 93 |
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TX_EN : in bit ;
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| 94 |
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TXD0 : in bit ;
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| 95 |
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TXD1 : in bit ;
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| 96 |
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TXD2 : in bit ;
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| 97 |
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TXD3 : in bit ;
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| 98 |
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COL : out bit ;
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| 99 |
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CRS : out bit ;
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MDINT : out bit
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);
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use STD_1149_1_1994.all;
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use LXT971A_BSCAN.all;
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attribute COMPONENT_CONFORMANCE of shark: entity is "STD_1149_1_1993";
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-- Pin mappings
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attribute PIN_MAP of shark: entity is PHYSICAL_PIN_MAP;
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constant LQFP64: PIN_MAP_STRING:=
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"GND : (7,11,18,25,41,50,61),"&
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"VCCIO : (8,40) ,"&
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"VCCA : (21,22) ,"&
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"VCCD : 51 ,"&
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"NC : (9,10,44) ,"&
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"XI : 1 ,"&
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"XO : 2 ,"&
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"MDDIS : 3 ,"&
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"Reset : 4 ,"&
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"TXSLEW0: 5 ,"&
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"TXSLEW1: 6 ,"&
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"ADDR0 : 12 ,"&
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"ADDR1 : 13 ,"&
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"ADDR2 : 14 ,"&
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"ADDR3 : 15 ,"&
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"ADDR4 : 16 ,"&
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"RBIAS : 17 ,"&
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"TPFOP : 19 ,"&
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"TPFON : 20 ,"&
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"TPFIP : 23 ,"&
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"TPFIN : 24 ,"&
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"SD_TP : 26 ,"&
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"TDI : 27 ,"&
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"TDO : 28 ,"&
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"TMS : 29 ,"&
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"TCK : 30 ,"&
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"TRST : 31 ,"&
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"SLEEP : 32 ,"&
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"PAUSE : 33 ,"&
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"TEST0 : 34 ,"&
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"TEST1 : 35 ,"&
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"LEDCFG2: 36 ,"&
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"LEDCFG1: 37 ,"&
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"LEDCFG0: 38 ,"&
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"PWRDWN : 39 ,"&
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"MDIO : 42 ,"&
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"MDC : 43 ,"&
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"RXD3 : 45 ,"&
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"RXD2 : 46 ,"&
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"RXD1 : 47 ,"&
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"RXD0 : 48 ,"&
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"RX_DV : 49 ,"&
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"RX_CLK : 52 ,"&
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"RX_ER : 53 ,"&
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"TX_ER : 54 ,"&
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"TX_CLK : 55 ,"&
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"TX_EN : 56 ,"&
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"TXD0 : 57 ,"&
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"TXD1 : 58 ,"&
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"TXD2 : 59 ,"&
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"TXD3 : 60 ,"&
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"COL : 62 ,"&
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"CRS : 63 ,"&
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"MDINT : 64 ";
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| 170 |
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-- IEEE 1149.1 pin definition
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attribute TAP_SCAN_RESET of TRST : signal is true;
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attribute TAP_SCAN_IN of TDI : signal is true;
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attribute TAP_SCAN_MODE of TMS : signal is true;
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attribute TAP_SCAN_OUT of TDO : signal is true;
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attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
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-- IEEE 1149.1 compliance enable
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attribute COMPLIANCE_PATTERNS of shark: entity is
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"(PWRDWN) (0)";
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-- IEEE 1149.1 definition for LV Software TAP
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attribute INSTRUCTION_LENGTH of shark: entity is 16;
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attribute INSTRUCTION_OPCODE of shark: entity is
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"IDCODE (1111111111111110)," &
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"BYPASS (1111111111111111)," &
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"EXTEST (0000000000000000,1111111111101000)," &
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"SAMPLE (1111111111111000)," &
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"HIGHZ (1111111111001111)," &
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"CLAMP (1111111111101111)" ;
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attribute INSTRUCTION_CAPTURE of shark: entity is "xxxxxxxxxxxxxx01";
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attribute IDCODE_REGISTER of shark: entity is
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"0001" & -- revision id 1
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"0000001111001011" & -- part number
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"11101111110" & -- manufacturer's ID
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"1," & -- required by 1149.1
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"0010" & -- revision id 2
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"0000001111001011" & -- part number
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"00001111110" & -- manufacturer's ID
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"1"; -- required by 1149.1
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attribute REGISTER_ACCESS of shark: entity is
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"BYPASS (HIGHZ, CLAMP) " ;
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--Boundary scan definition
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attribute BOUNDARY_LENGTH of shark: entity is 40;
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attribute BOUNDARY_REGISTER of shark: entity is
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-- num cell port function safe [ccell disval rslt]
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" 0 (BC_2 , MDDIS , input , X ) ,"&
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" 1 (BC_2 , Reset , input , X ) ,"&
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" 2 (BC_2 , TXSLEW0 , input , X ) ,"&
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" 3 (BC_2 , TXSLEW1 , input , X ) ,"&
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" 4 (BC_2 , ADDR0 , input , X ) ,"&
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" 5 (BC_2 , ADDR1 , input , X ) ,"&
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" 6 (BC_2 , ADDR2 , input , X ) ,"&
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" 7 (BC_2 , ADDR3 , input , X ) ,"&
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" 8 (BC_2 , ADDR4 , input , X ) ,"&
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" 9 (BC_2 , SD_TP , input , X ) ,"&
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" 10 (BC_2 , SLEEP , input , X ) ,"&
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" 11 (BC_2 , PAUSE , input , X ) ,"&
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" 12 (BC_2 , TEST0 , input , X ) ,"&
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" 13 (BC_2 , TEST1 , input , X ) ,"&
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" 14 (BC_2 , * , control , 1 ) ,"&
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" 15 (LV_BC_7 , LEDCFG2 , bidir , X , 14 , 1 , Z ),"&
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" 16 (LV_BC_7 , LEDCFG1 , bidir , X , 14 , 1 , Z ),"&
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" 17 (LV_BC_7 , LEDCFG0 , bidir , X , 14 , 1 , Z ),"&
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" 18 (BC_2 , * , internal , 0 ) ,"&
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" 19 (LV_BC_7 , MDIO , bidir , X , 14 , 1 , Z ),"&
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" 20 (BC_2 , MDC , input , X ) ,"&
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" 21 (BC_2 , * , internal , X ) ,"&
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" 22 (BC_2 , RXD3 , output3 , X , 14 , 1 , Z ),"&
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" 23 (BC_2 , RXD2 , output3 , X , 14 , 1 , Z ),"&
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" 24 (BC_2 , RXD1 , output3 , X , 14 , 1 , Z ),"&
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| 237 |
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" 25 (BC_2 , RXD0 , output3 , X , 14 , 1 , Z ),"&
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" 26 (BC_2 , RX_DV , output3 , X , 14 , 1 , Z ),"&
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| 239 |
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" 27 (BC_2 , RX_CLK , output3 , X , 14 , 1 , Z ),"&
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| 240 |
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" 28 (BC_2 , RX_ER , output3 , X , 14 , 1 , Z ),"&
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" 29 (BC_2 , TX_ER , input , X ) ,"&
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" 30 (BC_2 , TX_CLK , output3 , X , 14 , 1 , Z ),"&
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| 243 |
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" 31 (BC_2 , TX_EN , input , X ) ,"&
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" 32 (BC_2 , TXD0 , input , X ) ,"&
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| 245 |
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" 33 (BC_2 , TXD1 , input , X ) ,"&
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| 246 |
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" 34 (BC_2 , TXD2 , input , X ) ,"&
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| 247 |
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" 35 (BC_2 , TXD3 , input , X ) ,"&
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| 248 |
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" 36 (BC_2 , * , internal , 0 ) ,"&
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| 249 |
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" 37 (BC_2 , COL , output3 , X , 14 , 1 , Z ),"&
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| 250 |
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" 38 (BC_2 , CRS , output3 , X , 14 , 1 , Z ),"&
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" 39 (BC_2 , MDINT , output3 , X , 14 , 1 , Z ) ";
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| 252 |
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| 253 |
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-- 1149.1 Design Warnings
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attribute DESIGN_WARNING of shark: entity is
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| 255 |
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"PWRDWN pin should be kept low to allow proper operation" &
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| 256 |
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"of TAP circuitry. There is a compliance enable on this" &
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| 257 |
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"pin to force the safe value. The boundary scan cell" &
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| 258 |
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"associated with the PWRDWN pin has been changed to an" &
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| 259 |
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"internal pin. It is cell number 18 in the boundary scan" &
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| 260 |
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"register description and has a safe value of 0 specified";
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| 261 |
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end shark;
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