| 1 |
2 |
dimamali |
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| 2 |
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NET "clk" LOC = "AJ15" | IOSTANDARD = LVCMOS25;
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| 3 |
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NET "clk" TNM_NET = "clk";
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| 4 |
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TIMESPEC "TS_clk" = PERIOD "clk" 10.00 ns HIGH 50 %;
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| 5 |
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| 6 |
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NET "clkm" TNM_NET = "clkm";
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| 7 |
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NET "clkml" TNM_NET = "clkml";
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| 8 |
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NET "clkvga" TNM_NET = "clkvga";
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| 9 |
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TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
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| 10 |
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TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
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| 11 |
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TIMESPEC "TS_clkm_clkvga" = FROM "clkm" TO "clkvga" TIG;
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| 12 |
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TIMESPEC "TS_clkvga" = PERIOD "clkvga" 15.00 ns HIGH 50 %;
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| 13 |
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NET "ddrlock" TIG;
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| 14 |
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#NET ddr_clk_fb_out FEEDBACK = 1.0 NET ddr_clk_fb;
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| 15 |
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#NET "ddrsp0.ddr0/ddr_phy0/ddr_phy0/xc2v.ddr_phy0/rclk270b" TNM_NET = "rclk270b";
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| 16 |
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NET "ddrsp0.ddr0/ddr_phy0/ddr_phy0/xc2v.ddr_phy0/rclk90b" TNM_NET = "rclk90b";
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| 17 |
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#TIMEGRP "rclk270b_rise" = RISING "rclk270b";
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| 18 |
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TIMEGRP "rclk270b_rise" = FALLING "rclk90b";
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| 19 |
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TIMEGRP "clkml_rise" = RISING "clkml";
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| 20 |
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TIMESPEC "TS_rclk270b_clkml_rise" = FROM "rclk270b_rise" TO "clkml_rise" 4.300;
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| 21 |
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| 22 |
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INST "ddrsp0.ddr0/ddr_phy0/ddr_phy0/xc2v.ddr_phy0/nops.read_dll" LOC = DCM_X1Y1;
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| 23 |
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INST "ddrsp0.ddr0/ddr_phy0/ddr_phy0/xc2v.ddr_phy0/ps.read_dll" LOC = DCM_X1Y1;
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| 24 |
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INST "ddrsp0.ddr0/ddr_phy0/ddr_phy0/xc2v.ddr_phy0/dll" LOC = DCM_X2Y1;
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| 25 |
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| 26 |
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NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb";
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| 27 |
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TIMESPEC "TS_ddr_clk_fb" = PERIOD "ddr_clk_fb" 8.00 ns HIGH 50 %;
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| 28 |
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| 29 |
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NET erx_clk PERIOD = 40.000 ;
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| 30 |
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OFFSET = in : 10.000 : BEFORE erx_clk ;
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| 31 |
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NET etx_clk PERIOD = 40.000 ;
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| 32 |
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OFFSET = out : 20.000 : AFTER etx_clk ;
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| 33 |
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OFFSET = in : 10.000 : BEFORE etx_clk ;
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| 34 |
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| 35 |
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NET "resetn" LOC = "AH5" | IOSTANDARD = LVTTL;
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| 36 |
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| 37 |
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#NET "SW_0" LOC = "AC11" | IOSTANDARD = LVCMOS25;
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| 38 |
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NET "dsuen" LOC = "AC11" | IOSTANDARD = LVCMOS25;
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| 39 |
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#NET "SW_1" LOC = "AD11" | IOSTANDARD = LVCMOS25;
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| 40 |
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#NET "SW_2" LOC = "AF8" | IOSTANDARD = LVCMOS25;
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| 41 |
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#NET "SW_3" LOC = "AF9" | IOSTANDARD = LVCMOS25;
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| 42 |
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| 43 |
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NET "txd" LOC = "AE7" | IOSTANDARD = LVCMOS25;
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| 44 |
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NET "rxd" LOC = "AJ8" | IOSTANDARD = LVCMOS25;
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| 45 |
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#NET "RS232_DSR_OUT" LOC = "AD10" | IOSTANDARD = LVCMOS25;
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| 46 |
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#NET "RS232_CTS_OUT" LOC = "AE8" | IOSTANDARD = LVCMOS25;
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| 47 |
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#NET "RS232_RTS_IN" LOC = "AK8" | IOSTANDARD = LVCMOS25;
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| 48 |
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| 49 |
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#NET "PB_ENTER" LOC = "AG5";
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| 50 |
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NET "dsubre" LOC = "AG5" | IOSTANDARD = LVTTL;
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| 51 |
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#NET "PB_UP" LOC = "AH4";
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| 52 |
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#NET "PB_DOWN" LOC = "AG3";
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| 53 |
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#NET "PB_LEFT" LOC = "AH1";
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| 54 |
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#NET "PB_RIGHT" LOC = "AH2";
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| 55 |
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| 56 |
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NET "ps2clk(0)" LOC = "AG2" | IOSTANDARD = LVTTL;
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| 57 |
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NET "ps2data(0)" LOC = "AG1" | IOSTANDARD = LVTTL;
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| 58 |
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NET "ps2clk(1)" LOC = "AD6" | IOSTANDARD = LVTTL;
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| 59 |
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NET "ps2data(1)" LOC = "AD5" | IOSTANDARD = LVTTL;
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| 60 |
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| 61 |
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#NET "LED_0" LOC = "AC4" | IOSTANDARD = LVTTL;
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| 62 |
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NET "dsuact" LOC = "AC4" | IOSTANDARD = LVTTL;
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| 63 |
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#NET "LED_1" LOC = "AC3" | IOSTANDARD = LVTTL;
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| 64 |
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NET "errorn" LOC = "AC3" | IOSTANDARD = LVTTL;
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| 65 |
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#NET "LED_2" LOC = "AA6" | IOSTANDARD = LVTTL;
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| 66 |
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NET "led_rx" LOC = "AA6" | IOSTANDARD = LVTTL;
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| 67 |
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#NET "LED_3" LOC = "AA5" | IOSTANDARD = LVTTL;
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| 68 |
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NET "led_tx" LOC = "AA5" | IOSTANDARD = LVTTL;
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| 69 |
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| 70 |
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| 71 |
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NET etx_slew(0) LOC=B3 | IOSTANDARD = LVTTL;
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| 72 |
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NET etx_slew(1) LOC=A3 | IOSTANDARD = LVTTL;
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| 73 |
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NET eresetn LOC=G6 | IOSTANDARD = LVTTL;
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| 74 |
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NET erx_crs LOC=C5 | IOSTANDARD = LVTTL;
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| 75 |
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NET etxd(3) LOC=C2 | IOSTANDARD = LVTTL;
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| 76 |
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NET etxd(2) LOC=C1 | IOSTANDARD = LVTTL;
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| 77 |
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NET etxd(1) LOC=J8 | IOSTANDARD = LVTTL;
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| 78 |
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NET etxd(0) LOC=J7 | IOSTANDARD = LVTTL;
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| 79 |
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NET etx_en LOC=C4 | IOSTANDARD = LVTTL;
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| 80 |
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NET etx_clk LOC=D3 | IOSTANDARD = LVTTL;
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| 81 |
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NET erx_er LOC=J2 | IOSTANDARD = LVTTL;
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| 82 |
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NET erx_clk LOC=M8 | IOSTANDARD = LVTTL;
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| 83 |
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NET erx_dv LOC=M7 | IOSTANDARD = LVTTL;
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| 84 |
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NET erxd(0) LOC=K6 | IOSTANDARD = LVTTL;
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| 85 |
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NET erxd(1) LOC=K5 | IOSTANDARD = LVTTL;
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| 86 |
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NET erxd(2) LOC=J1 | IOSTANDARD = LVTTL;
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| 87 |
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NET erxd(3) LOC=K1 | IOSTANDARD = LVTTL;
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| 88 |
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NET emdc LOC=M6 | IOSTANDARD = LVTTL;
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| 89 |
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NET emdio LOC=M5 | IOSTANDARD = LVTTL;
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| 90 |
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NET erx_col LOC=D5 | IOSTANDARD = LVTTL;
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| 91 |
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NET etx_er LOC=H2 | IOSTANDARD = LVTTL;
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| 92 |
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| 93 |
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NET "ddr_dq(*)" IOSTANDARD = SSTL2_II;
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| 94 |
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#NET "SDRAM_CB(*)" IOSTANDARD = SSTL2_II;
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| 95 |
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NET "ddr_dqs(*)" IOSTANDARD = SSTL2_II;
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| 96 |
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NET "ddr_dm(*)" IOSTANDARD = SSTL2_II;
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| 97 |
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NET "ddr_clk(*)" IOSTANDARD = SSTL2_II;
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| 98 |
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NET "ddr_clkb(*)" IOSTANDARD = SSTL2_II;
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| 99 |
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NET "ddr_ad(*)" IOSTANDARD = SSTL2_II;
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| 100 |
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NET "ddr_ba*" IOSTANDARD = SSTL2_II;
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| 101 |
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NET "ddr_rasb" IOSTANDARD = SSTL2_II;
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| 102 |
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NET "ddr_casb" IOSTANDARD = SSTL2_II;
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| 103 |
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NET "ddr_web" IOSTANDARD = SSTL2_II;
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| 104 |
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NET "ddr_csb(*)" IOSTANDARD = SSTL2_II;
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| 105 |
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NET "ddr_cke(*)" IOSTANDARD = SSTL2_II;
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| 106 |
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| 107 |
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| 108 |
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NET "ddr_clk_fb_out" LOC = "G23" | IOSTANDARD = SSTL2_II;
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| 109 |
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NET "ddr_clk_fb" LOC = "C16" | IOSTANDARD = SSTL2_II;
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| 110 |
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| 111 |
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NET "ddr_clk(2)" LOC = "AB23" ;
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| 112 |
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NET "ddr_clkb(2)" LOC = "AB24" ;
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| 113 |
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NET "ddr_clk(1)" LOC = "AD29" ;
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| 114 |
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NET "ddr_clkb(1)" LOC = "AD30" ;
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| 115 |
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NET "ddr_clk(0)" LOC = "AC27" ;
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| 116 |
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NET "ddr_clkb(0)" LOC = "AC28" ;
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| 117 |
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NET "ddr_cke(0)" LOC = "R26" ;
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| 118 |
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NET "ddr_cke(1)" LOC = "R25" ;
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| 119 |
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NET "ddr_csb(0)" LOC = "R24" ;
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| 120 |
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NET "ddr_csb(1)" LOC = "R23" ;
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| 121 |
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NET "ddr_rasb" LOC = "N29" ;
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| 122 |
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NET "ddr_casb" LOC = "L27" ;
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| 123 |
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NET "ddr_web" LOC = "N26" ;
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| 124 |
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NET "ddr_ba(0)" LOC = "M26" ;
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| 125 |
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NET "ddr_ba(1)" LOC = "K26" ;
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| 126 |
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| 127 |
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NET "ddr_ad(13)" LOC = "M23" ;
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| 128 |
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NET "ddr_ad(12)" LOC = "M24" ;
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| 129 |
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NET "ddr_ad(11)" LOC = "F30" ;
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| 130 |
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NET "ddr_ad(10)" LOC = "F28" ;
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| 131 |
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NET "ddr_ad(9)" LOC = "K24" ;
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| 132 |
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NET "ddr_ad(8)" LOC = "J24" ;
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| 133 |
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NET "ddr_ad(7)" LOC = "D26" ;
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| 134 |
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NET "ddr_ad(6)" LOC = "G26" ;
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| 135 |
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NET "ddr_ad(5)" LOC = "G25" ;
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| 136 |
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NET "ddr_ad(4)" LOC = "K30" ;
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| 137 |
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NET "ddr_ad(3)" LOC = "M29" ;
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| 138 |
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NET "ddr_ad(2)" LOC = "L26" ;
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| 139 |
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NET "ddr_ad(1)" LOC = "N25" ;
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| 140 |
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NET "ddr_ad(0)" LOC = "M25" ;
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| 141 |
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| 142 |
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#############################################
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| 143 |
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# NET REQUIRED FOR XMIL IMPLEMENTATION
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| 144 |
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#############################################
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| 145 |
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#NET "RST_DQS_DIV" LOC = "P27" ;
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| 146 |
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#NET "RST_DQS_DIV" LOC = "P26" ;
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| 147 |
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| 148 |
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NET "ddr_dqs(7)" LOC = "AH26" ;
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| 149 |
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NET "ddr_dm(7)" LOC = "W25" ;
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| 150 |
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NET "ddr_dq(63)" LOC = "AH29" ;
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| 151 |
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NET "ddr_dq(62)" LOC = "AH27" ;
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| 152 |
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NET "ddr_dq(61)" LOC = "AG28" ;
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| 153 |
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NET "ddr_dq(60)" LOC = "AD25" ;
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| 154 |
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NET "ddr_dq(59)" LOC = "AD26" ;
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| 155 |
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NET "ddr_dq(58)" LOC = "AG29" ;
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| 156 |
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NET "ddr_dq(57)" LOC = "AG30" ;
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| 157 |
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NET "ddr_dq(56)" LOC = "AF25" ;
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| 158 |
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| 159 |
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NET "ddr_dqs(6)" LOC = "AC25" ;
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| 160 |
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NET "ddr_dm(6)" LOC = "W26" ;
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| 161 |
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NET "ddr_dq(55)" LOC = "AF29" ;
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| 162 |
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NET "ddr_dq(54)" LOC = "AF30" ;
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| 163 |
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NET "ddr_dq(53)" LOC = "AD27" ;
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| 164 |
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NET "ddr_dq(52)" LOC = "AD28" ;
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| 165 |
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NET "ddr_dq(51)" LOC = "AA23" ;
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| 166 |
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NET "ddr_dq(50)" LOC = "AA24" ;
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| 167 |
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NET "ddr_dq(49)" LOC = "AE29" ;
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| 168 |
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NET "ddr_dq(48)" LOC = "AB25" ;
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| 169 |
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| 170 |
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NET "ddr_dqs(5)" LOC = "AA25" ;
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| 171 |
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NET "ddr_dm(5)" LOC = "W27" ;
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| 172 |
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NET "ddr_dq(47)" LOC = "AC29" ;
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| 173 |
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NET "ddr_dq(46)" LOC = "AB27" ;
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| 174 |
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NET "ddr_dq(45)" LOC = "AB28" ;
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| 175 |
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NET "ddr_dq(44)" LOC = "W23" ;
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| 176 |
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NET "ddr_dq(43)" LOC = "W24" ;
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| 177 |
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NET "ddr_dq(42)" LOC = "AA27" ;
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| 178 |
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NET "ddr_dq(41)" LOC = "AA28" ;
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| 179 |
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NET "ddr_dq(40)" LOC = "Y26" ;
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| 180 |
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| 181 |
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NET "ddr_dqs(4)" LOC = "V23" ;
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| 182 |
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NET "ddr_dm(4)" LOC = "W28" ;
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| 183 |
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NET "ddr_dq(39)" LOC = "AA29" ;
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| 184 |
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NET "ddr_dq(38)" LOC = "Y29" ;
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| 185 |
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NET "ddr_dq(37)" LOC = "V25" ;
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| 186 |
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NET "ddr_dq(36)" LOC = "V26" ;
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| 187 |
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NET "ddr_dq(35)" LOC = "U23" ;
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| 188 |
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NET "ddr_dq(34)" LOC = "U24" ;
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| 189 |
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NET "ddr_dq(33)" LOC = "Y30" ;
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| 190 |
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NET "ddr_dq(32)" LOC = "V27" ;
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| 191 |
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| 192 |
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#NET "ddr_dqs(8)" LOC = "T23" ;
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| 193 |
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#NET "ddr_dm(8)" LOC = "U22" ;
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| 194 |
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#NET "SDRAM_CB(7)" LOC = "U28" ;
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| 195 |
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#NET "SDRAM_CB(6)" LOC = "T27" ;
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| 196 |
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#NET "SDRAM_CB(5)" LOC = "T28" ;
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| 197 |
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#NET "SDRAM_CB(4)" LOC = "T25" ;
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| 198 |
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#NET "SDRAM_CB(3)" LOC = "T26" ;
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| 199 |
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#NET "SDRAM_CB(2)" LOC = "V30" ;
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| 200 |
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#NET "SDRAM_CB(1)" LOC = "U30" ;
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| 201 |
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#NET "SDRAM_CB(0)" LOC = "R28" ;
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| 202 |
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| 203 |
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NET "ddr_dqs(3)" LOC = "P29" ;
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| 204 |
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NET "ddr_dm(3)" LOC = "T22" ;
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| 205 |
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NET "ddr_dq(31)" LOC = "N28" ;
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| 206 |
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NET "ddr_dq(30)" LOC = "N27" ;
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| 207 |
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NET "ddr_dq(29)" LOC = "P24" ;
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| 208 |
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NET "ddr_dq(28)" LOC = "P23" ;
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| 209 |
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NET "ddr_dq(27)" LOC = "P30" ;
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| 210 |
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NET "ddr_dq(26)" LOC = "M28" ;
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| 211 |
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NET "ddr_dq(25)" LOC = "M27" ;
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| 212 |
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NET "ddr_dq(24)" LOC = "R22" ;
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| 213 |
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| 214 |
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NET "ddr_dqs(2)" LOC = "M30" ;
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| 215 |
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NET "ddr_dm(2)" LOC = "W29" ;
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| 216 |
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NET "ddr_dq(23)" LOC = "K28" ;
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| 217 |
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NET "ddr_dq(22)" LOC = "K27" ;
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| 218 |
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NET "ddr_dq(21)" LOC = "N24" ;
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| 219 |
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NET "ddr_dq(20)" LOC = "N23" ;
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| 220 |
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NET "ddr_dq(19)" LOC = "L29" ;
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| 221 |
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NET "ddr_dq(18)" LOC = "K29" ;
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| 222 |
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NET "ddr_dq(17)" LOC = "J28" ;
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| 223 |
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NET "ddr_dq(16)" LOC = "J27" ;
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| 224 |
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| 225 |
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NET "ddr_dqs(1)" LOC = "J29" ;
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| 226 |
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NET "ddr_dm(1)" LOC = "V29" ;
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| 227 |
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NET "ddr_dq(15)" LOC = "H28" ;
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| 228 |
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NET "ddr_dq(14)" LOC = "H27" ;
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| 229 |
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NET "ddr_dq(13)" LOC = "L24" ;
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| 230 |
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NET "ddr_dq(12)" LOC = "L23" ;
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| 231 |
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NET "ddr_dq(11)" LOC = "G30" ;
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| 232 |
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NET "ddr_dq(10)" LOC = "G28" ;
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| 233 |
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NET "ddr_dq(9)" LOC = "G27" ;
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| 234 |
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NET "ddr_dq(8)" LOC = "J26" ;
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| 235 |
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| 236 |
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NET "ddr_dqs(0)" LOC = "E30" ;
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| 237 |
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NET "ddr_dm(0)" LOC = "U26" ;
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| 238 |
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NET "ddr_dq(7)" LOC = "E28" ;
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| 239 |
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NET "ddr_dq(6)" LOC = "E27" ;
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| 240 |
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NET "ddr_dq(5)" LOC = "H26" ;
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| 241 |
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NET "ddr_dq(4)" LOC = "H25" ;
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| 242 |
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NET "ddr_dq(3)" LOC = "D30" ;
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| 243 |
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NET "ddr_dq(2)" LOC = "D29" ;
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| 244 |
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NET "ddr_dq(1)" LOC = "D28" ;
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| 245 |
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NET "ddr_dq(0)" LOC = "C27" ;
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| 246 |
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| 247 |
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#NET "SDRAM_SDA" LOC = "AF23";
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| 248 |
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#NET "SDRAM_SCL" LOC = "AF22";
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| 249 |
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| 250 |
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#NET "SDRAM_SDA" IOSTANDARD = LVCMOS25;
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| 251 |
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#NET "SDRAM_SCL" IOSTANDARD = LVCMOS25;
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| 252 |
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| 253 |
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| 254 |
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NET "vid_vsync" LOC = "D11";
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| 255 |
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NET "vid_hsync" LOC = "B8";
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| 256 |
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NET "vid_blankn" LOC = "A8";
|
| 257 |
|
|
NET "vid_syncn" LOC = "G12";
|
| 258 |
|
|
NET "vid_clock" LOC = "H12";
|
| 259 |
|
|
|
| 260 |
|
|
NET "vid_r(7)" LOC = "H10";
|
| 261 |
|
|
NET "vid_r(6)" LOC = "C7";
|
| 262 |
|
|
NET "vid_r(5)" LOC = "D7";
|
| 263 |
|
|
NET "vid_r(4)" LOC = "F10";
|
| 264 |
|
|
NET "vid_r(3)" LOC = "F9";
|
| 265 |
|
|
NET "vid_r(2)" LOC = "G9";
|
| 266 |
|
|
NET "vid_r(1)" LOC = "H9";
|
| 267 |
|
|
NET "vid_r(0)" LOC = "G8";
|
| 268 |
|
|
|
| 269 |
|
|
NET "vid_g(7)" LOC = "E11";
|
| 270 |
|
|
NET "vid_g(6)" LOC = "G11";
|
| 271 |
|
|
NET "vid_g(5)" LOC = "H11";
|
| 272 |
|
|
NET "vid_g(4)" LOC = "C8";
|
| 273 |
|
|
NET "vid_g(3)" LOC = "D8";
|
| 274 |
|
|
NET "vid_g(2)" LOC = "D10";
|
| 275 |
|
|
NET "vid_g(1)" LOC = "E10";
|
| 276 |
|
|
NET "vid_g(0)" LOC = "G10";
|
| 277 |
|
|
|
| 278 |
|
|
NET "vid_b(7)" LOC = "E14";
|
| 279 |
|
|
NET "vid_b(6)" LOC = "D14";
|
| 280 |
|
|
NET "vid_b(5)" LOC = "D13";
|
| 281 |
|
|
NET "vid_b(4)" LOC = "C13";
|
| 282 |
|
|
NET "vid_b(3)" LOC = "J15";
|
| 283 |
|
|
NET "vid_b(2)" LOC = "H15";
|
| 284 |
|
|
NET "vid_b(1)" LOC = "E15";
|
| 285 |
|
|
NET "vid_b(0)" LOC = "D15";
|
| 286 |
|
|
|
