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dimamali |
------------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2003, Gaisler Research
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-----------------------------------------------------------------------------
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-- Package: netcomp
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-- File: netcomp.vhd
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-- Author: Jiri Gaisler - Gaisler Research
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-- Description: Delcation of netlists componnets
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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library grlib;
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use grlib.amba.all;
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use work.gencomp.all;
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package netcomp is
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---------------------------------------------------------------------------
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-- netlists ---------------------------------------------------------------
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---------------------------------------------------------------------------
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component grusbhc_net is
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generic (
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tech : integer := 0;
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nports : integer range 1 to 15 := 1;
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ehcgen : integer range 0 to 1 := 1;
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uhcgen : integer range 0 to 1 := 1;
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n_cc : integer range 1 to 15 := 1;
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n_pcc : integer range 1 to 15 := 1;
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prr : integer range 0 to 1 := 0;
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portroute1 : integer := 0;
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portroute2 : integer := 0;
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endian_conv : integer range 0 to 1 := 1;
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be_regs : integer range 0 to 1 := 0;
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be_desc : integer range 0 to 1 := 0;
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uhcblo : integer range 0 to 255 := 2;
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bwrd : integer range 1 to 256 := 16;
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utm_type : integer range 0 to 2 := 2;
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vbusconf : integer range 0 to 3 := 3;
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ramtest : integer range 0 to 1 := 0;
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urst_time : integer := 250;
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oepol : integer range 0 to 1 := 0;
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scantest : integer := 0;
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memtech : integer range 0 to NTECH := DEFMEMTECH
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);
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port (
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clk : in std_ulogic;
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uclk : in std_ulogic;
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rst : in std_ulogic;
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-- EHC apb_slv_in_type unwrapped
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ehc_apbsi_psel : in std_ulogic;
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ehc_apbsi_penable : in std_ulogic;
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ehc_apbsi_paddr : in std_logic_vector(31 downto 0);
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ehc_apbsi_pwrite : in std_ulogic;
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ehc_apbsi_pwdata : in std_logic_vector(31 downto 0);
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ehc_apbsi_testen : in std_ulogic;
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ehc_apbsi_testrst : in std_ulogic;
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ehc_apbsi_scanen : in std_ulogic;
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-- EHC apb_slv_out_type unwrapped
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ehc_apbso_prdata : out std_logic_vector(31 downto 0);
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ehc_apbso_pirq : out std_ulogic;
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-- EHC/UHC ahb_mst_in_type unwrapped
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ahbmi_hgrant : in std_logic_vector(n_cc*uhcgen downto 0);
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ahbmi_hready : in std_ulogic;
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ahbmi_hresp : in std_logic_vector(1 downto 0);
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ahbmi_hrdata : in std_logic_vector(31 downto 0);
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ahbmi_hcache : in std_ulogic;
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ahbmi_testen : in std_ulogic;
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ahbmi_testrst : in std_ulogic;
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ahbmi_scanen : in std_ulogic;
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-- UHC ahb_slv_in_type unwrapped
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uhc_ahbsi_hsel : in std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbsi_haddr : in std_logic_vector(31 downto 0);
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uhc_ahbsi_hwrite : in std_ulogic;
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uhc_ahbsi_htrans : in std_logic_vector(1 downto 0);
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uhc_ahbsi_hsize : in std_logic_vector(2 downto 0);
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uhc_ahbsi_hwdata : in std_logic_vector(31 downto 0);
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uhc_ahbsi_hready : in std_ulogic;
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uhc_ahbsi_testen : in std_ulogic;
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uhc_ahbsi_testrst : in std_ulogic;
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uhc_ahbsi_scanen : in std_ulogic;
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-- EHC ahb_mst_out_type_unwrapped
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ehc_ahbmo_hbusreq : out std_ulogic;
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ehc_ahbmo_hlock : out std_ulogic;
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ehc_ahbmo_htrans : out std_logic_vector(1 downto 0);
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ehc_ahbmo_haddr : out std_logic_vector(31 downto 0);
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ehc_ahbmo_hwrite : out std_ulogic;
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ehc_ahbmo_hsize : out std_logic_vector(2 downto 0);
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ehc_ahbmo_hburst : out std_logic_vector(2 downto 0);
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ehc_ahbmo_hprot : out std_logic_vector(3 downto 0);
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ehc_ahbmo_hwdata : out std_logic_vector(31 downto 0);
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-- UHC ahb_mst_out_vector_type unwrapped
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uhc_ahbmo_hbusreq : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hlock : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbmo_htrans : out std_logic_vector((n_cc*2)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_haddr : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hwrite : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hsize : out std_logic_vector((n_cc*3)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hburst : out std_logic_vector((n_cc*3)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hprot : out std_logic_vector((n_cc*4)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hwdata : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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-- UHC ahb_slv_out_vector_type unwrapped
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uhc_ahbso_hready : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbso_hresp : out std_logic_vector((n_cc*2)*uhcgen downto 1*uhcgen);
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uhc_ahbso_hrdata : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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uhc_ahbso_hsplit : out std_logic_vector((n_cc*16)*uhcgen downto 1*uhcgen);
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uhc_ahbso_hcache : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbso_hirq : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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-- grusb_out_type_vector unwrapped
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xcvrsel : out std_logic_vector(((nports*2)-1) downto 0);
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termsel : out std_logic_vector((nports-1) downto 0);
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opmode : out std_logic_vector(((nports*2)-1) downto 0);
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txvalid : out std_logic_vector((nports-1) downto 0);
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drvvbus : out std_logic_vector((nports-1) downto 0);
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dataho : out std_logic_vector(((nports*8)-1) downto 0);
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validho : out std_logic_vector((nports-1) downto 0);
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stp : out std_logic_vector((nports-1) downto 0);
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datao : out std_logic_vector(((nports*8)-1) downto 0);
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utm_rst : out std_logic_vector((nports-1) downto 0);
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dctrlo : out std_logic_vector((nports-1) downto 0);
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suspendm : out std_ulogic;
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dbus16_8 : out std_ulogic;
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dppulldown : out std_ulogic;
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dmpulldown : out std_ulogic;
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idpullup : out std_ulogic;
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dischrgvbus : out std_ulogic;
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chrgvbus : out std_ulogic;
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txbitstuffenable : out std_ulogic;
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txbitstuffenableh : out std_ulogic;
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fslsserialmode : out std_ulogic;
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txenablen : out std_ulogic;
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txdat : out std_ulogic;
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txse0 : out std_ulogic;
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-- grusb_in_type_vector unwrapped
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linestate : in std_logic_vector(((nports*2)-1) downto 0);
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txready : in std_logic_vector((nports-1) downto 0);
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rxvalid : in std_logic_vector((nports-1) downto 0);
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rxactive : in std_logic_vector((nports-1) downto 0);
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rxerror : in std_logic_vector((nports-1) downto 0);
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vbusvalid : in std_logic_vector((nports-1) downto 0);
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datahi : in std_logic_vector(((nports*8)-1) downto 0);
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validhi : in std_logic_vector((nports-1) downto 0);
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hostdisc : in std_logic_vector((nports-1) downto 0);
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nxt : in std_logic_vector((nports-1) downto 0);
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dir : in std_logic_vector((nports-1) downto 0);
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datai : in std_logic_vector(((nports*8)-1) downto 0);
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-- EHC transaction buffer signals
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mbc20_tb_addr : out std_logic_vector(8 downto 0);
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mbc20_tb_data : out std_logic_vector(31 downto 0);
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mbc20_tb_en : out std_ulogic;
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mbc20_tb_wel : out std_ulogic;
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mbc20_tb_weh : out std_ulogic;
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tb_mbc20_data : in std_logic_vector(31 downto 0);
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pe20_tb_addr : out std_logic_vector(8 downto 0);
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pe20_tb_data : out std_logic_vector(31 downto 0);
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pe20_tb_en : out std_ulogic;
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pe20_tb_wel : out std_ulogic;
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pe20_tb_weh : out std_ulogic;
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tb_pe20_data : in std_logic_vector(31 downto 0);
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-- EHC packet buffer signals
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mbc20_pb_addr : out std_logic_vector(8 downto 0);
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mbc20_pb_data : out std_logic_vector(31 downto 0);
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mbc20_pb_en : out std_ulogic;
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mbc20_pb_we : out std_ulogic;
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pb_mbc20_data : in std_logic_vector(31 downto 0);
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sie20_pb_addr : out std_logic_vector(8 downto 0);
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sie20_pb_data : out std_logic_vector(31 downto 0);
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sie20_pb_en : out std_ulogic;
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sie20_pb_we : out std_ulogic;
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pb_sie20_data : in std_logic_vector(31 downto 0);
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-- UHC packet buffer signals
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sie11_pb_addr : out std_logic_vector((n_cc*9)*uhcgen downto 1*uhcgen);
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sie11_pb_data : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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sie11_pb_en : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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sie11_pb_we : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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pb_sie11_data : in std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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mbc11_pb_addr : out std_logic_vector((n_cc*9)*uhcgen downto 1*uhcgen);
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mbc11_pb_data : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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mbc11_pb_en : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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mbc11_pb_we : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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pb_mbc11_data : in std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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bufsel : out std_ulogic);
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end component;
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component grspwc_net
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generic(
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tech : integer := 0;
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sysfreq : integer := 40000;
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usegen : integer range 0 to 1 := 1;
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nsync : integer range 1 to 2 := 1;
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rmap : integer range 0 to 1 := 0;
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rmapcrc : integer range 0 to 1 := 0;
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fifosize1 : integer range 4 to 32 := 32;
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fifosize2 : integer range 16 to 64 := 64;
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rxunaligned : integer range 0 to 1 := 0;
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rmapbufs : integer range 2 to 8 := 4;
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scantest : integer range 0 to 1 := 0
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);
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port(
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rst : in std_ulogic;
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clk : in std_ulogic;
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txclk : in std_ulogic;
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--ahb mst in
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hgrant : in std_ulogic;
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hready : in std_ulogic;
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hresp : in std_logic_vector(1 downto 0);
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hrdata : in std_logic_vector(31 downto 0);
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223 |
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--ahb mst out
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hbusreq : out std_ulogic;
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hlock : out std_ulogic;
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htrans : out std_logic_vector(1 downto 0);
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227 |
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haddr : out std_logic_vector(31 downto 0);
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hwrite : out std_ulogic;
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229 |
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hsize : out std_logic_vector(2 downto 0);
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230 |
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hburst : out std_logic_vector(2 downto 0);
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231 |
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hprot : out std_logic_vector(3 downto 0);
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hwdata : out std_logic_vector(31 downto 0);
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233 |
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--apb slv in
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psel : in std_ulogic;
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penable : in std_ulogic;
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236 |
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paddr : in std_logic_vector(31 downto 0);
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237 |
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pwrite : in std_ulogic;
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pwdata : in std_logic_vector(31 downto 0);
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239 |
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--apb slv out
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prdata : out std_logic_vector(31 downto 0);
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241 |
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--spw in
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242 |
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di : in std_logic_vector(1 downto 0);
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243 |
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si : in std_logic_vector(1 downto 0);
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244 |
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--spw out
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245 |
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do : out std_logic_vector(1 downto 0);
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so : out std_logic_vector(1 downto 0);
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247 |
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--time iface
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248 |
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tickin : in std_ulogic;
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249 |
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tickout : out std_ulogic;
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250 |
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--irq
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251 |
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irq : out std_logic;
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252 |
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--misc
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253 |
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clkdiv10 : in std_logic_vector(7 downto 0);
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254 |
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dcrstval : in std_logic_vector(9 downto 0);
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255 |
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timerrstval : in std_logic_vector(11 downto 0);
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256 |
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--rmapen
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257 |
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rmapen : in std_ulogic;
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258 |
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--clk bufs
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259 |
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rxclki : in std_logic_vector(1 downto 0);
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260 |
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nrxclki : in std_logic_vector(1 downto 0);
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261 |
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rxclko : out std_logic_vector(1 downto 0);
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262 |
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--rx ahb fifo
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263 |
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rxrenable : out std_ulogic;
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264 |
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rxraddress : out std_logic_vector(4 downto 0);
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265 |
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rxwrite : out std_ulogic;
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266 |
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rxwdata : out std_logic_vector(31 downto 0);
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267 |
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rxwaddress : out std_logic_vector(4 downto 0);
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268 |
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rxrdata : in std_logic_vector(31 downto 0);
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269 |
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--tx ahb fifo
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270 |
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txrenable : out std_ulogic;
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271 |
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txraddress : out std_logic_vector(4 downto 0);
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272 |
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txwrite : out std_ulogic;
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273 |
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txwdata : out std_logic_vector(31 downto 0);
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274 |
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txwaddress : out std_logic_vector(4 downto 0);
|
275 |
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txrdata : in std_logic_vector(31 downto 0);
|
276 |
|
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--nchar fifo
|
277 |
|
|
ncrenable : out std_ulogic;
|
278 |
|
|
ncraddress : out std_logic_vector(5 downto 0);
|
279 |
|
|
ncwrite : out std_ulogic;
|
280 |
|
|
ncwdata : out std_logic_vector(8 downto 0);
|
281 |
|
|
ncwaddress : out std_logic_vector(5 downto 0);
|
282 |
|
|
ncrdata : in std_logic_vector(8 downto 0);
|
283 |
|
|
--rmap buf
|
284 |
|
|
rmrenable : out std_ulogic;
|
285 |
|
|
rmraddress : out std_logic_vector(7 downto 0);
|
286 |
|
|
rmwrite : out std_ulogic;
|
287 |
|
|
rmwdata : out std_logic_vector(7 downto 0);
|
288 |
|
|
rmwaddress : out std_logic_vector(7 downto 0);
|
289 |
|
|
rmrdata : in std_logic_vector(7 downto 0);
|
290 |
|
|
linkdis : out std_ulogic;
|
291 |
|
|
testclk : in std_ulogic := '0';
|
292 |
|
|
testrst : in std_ulogic := '0';
|
293 |
|
|
testen : in std_ulogic := '0'
|
294 |
|
|
);
|
295 |
|
|
end component;
|
296 |
|
|
|
297 |
|
|
component grlfpw_net
|
298 |
|
|
generic (tech : integer := 0;
|
299 |
|
|
pclow : integer range 0 to 2 := 2;
|
300 |
|
|
dsu : integer range 0 to 1 := 1;
|
301 |
|
|
disas : integer range 0 to 2 := 0;
|
302 |
|
|
pipe : integer range 0 to 2 := 0
|
303 |
|
|
);
|
304 |
|
|
port (
|
305 |
|
|
rst : in std_ulogic; -- Reset
|
306 |
|
|
clk : in std_ulogic;
|
307 |
|
|
holdn : in std_ulogic; -- pipeline hold
|
308 |
|
|
cpi_flush : in std_ulogic; -- pipeline flush
|
309 |
|
|
cpi_exack : in std_ulogic; -- FP exception acknowledge
|
310 |
|
|
cpi_a_rs1 : in std_logic_vector(4 downto 0);
|
311 |
|
|
cpi_d_pc : in std_logic_vector(31 downto 0);
|
312 |
|
|
cpi_d_inst : in std_logic_vector(31 downto 0);
|
313 |
|
|
cpi_d_cnt : in std_logic_vector(1 downto 0);
|
314 |
|
|
cpi_d_trap : in std_ulogic;
|
315 |
|
|
cpi_d_annul : in std_ulogic;
|
316 |
|
|
cpi_d_pv : in std_ulogic;
|
317 |
|
|
cpi_a_pc : in std_logic_vector(31 downto 0);
|
318 |
|
|
cpi_a_inst : in std_logic_vector(31 downto 0);
|
319 |
|
|
cpi_a_cnt : in std_logic_vector(1 downto 0);
|
320 |
|
|
cpi_a_trap : in std_ulogic;
|
321 |
|
|
cpi_a_annul : in std_ulogic;
|
322 |
|
|
cpi_a_pv : in std_ulogic;
|
323 |
|
|
cpi_e_pc : in std_logic_vector(31 downto 0);
|
324 |
|
|
cpi_e_inst : in std_logic_vector(31 downto 0);
|
325 |
|
|
cpi_e_cnt : in std_logic_vector(1 downto 0);
|
326 |
|
|
cpi_e_trap : in std_ulogic;
|
327 |
|
|
cpi_e_annul : in std_ulogic;
|
328 |
|
|
cpi_e_pv : in std_ulogic;
|
329 |
|
|
cpi_m_pc : in std_logic_vector(31 downto 0);
|
330 |
|
|
cpi_m_inst : in std_logic_vector(31 downto 0);
|
331 |
|
|
cpi_m_cnt : in std_logic_vector(1 downto 0);
|
332 |
|
|
cpi_m_trap : in std_ulogic;
|
333 |
|
|
cpi_m_annul : in std_ulogic;
|
334 |
|
|
cpi_m_pv : in std_ulogic;
|
335 |
|
|
cpi_x_pc : in std_logic_vector(31 downto 0);
|
336 |
|
|
cpi_x_inst : in std_logic_vector(31 downto 0);
|
337 |
|
|
cpi_x_cnt : in std_logic_vector(1 downto 0);
|
338 |
|
|
cpi_x_trap : in std_ulogic;
|
339 |
|
|
cpi_x_annul : in std_ulogic;
|
340 |
|
|
cpi_x_pv : in std_ulogic;
|
341 |
|
|
cpi_lddata : in std_logic_vector(31 downto 0); -- load data
|
342 |
|
|
cpi_dbg_enable : in std_ulogic;
|
343 |
|
|
cpi_dbg_write : in std_ulogic;
|
344 |
|
|
cpi_dbg_fsr : in std_ulogic; -- FSR access
|
345 |
|
|
cpi_dbg_addr : in std_logic_vector(4 downto 0);
|
346 |
|
|
cpi_dbg_data : in std_logic_vector(31 downto 0);
|
347 |
|
|
cpo_data : out std_logic_vector(31 downto 0); -- store data
|
348 |
|
|
cpo_exc : out std_logic; -- FP exception
|
349 |
|
|
cpo_cc : out std_logic_vector(1 downto 0); -- FP condition codes
|
350 |
|
|
cpo_ccv : out std_ulogic; -- FP condition codes valid
|
351 |
|
|
cpo_ldlock : out std_logic; -- FP pipeline hold
|
352 |
|
|
cpo_holdn : out std_ulogic;
|
353 |
|
|
cpo_dbg_data : out std_logic_vector(31 downto 0);
|
354 |
|
|
|
355 |
|
|
rfi1_rd1addr : out std_logic_vector(3 downto 0);
|
356 |
|
|
rfi1_rd2addr : out std_logic_vector(3 downto 0);
|
357 |
|
|
rfi1_wraddr : out std_logic_vector(3 downto 0);
|
358 |
|
|
rfi1_wrdata : out std_logic_vector(31 downto 0);
|
359 |
|
|
rfi1_ren1 : out std_ulogic;
|
360 |
|
|
rfi1_ren2 : out std_ulogic;
|
361 |
|
|
rfi1_wren : out std_ulogic;
|
362 |
|
|
|
363 |
|
|
rfi2_rd1addr : out std_logic_vector(3 downto 0);
|
364 |
|
|
rfi2_rd2addr : out std_logic_vector(3 downto 0);
|
365 |
|
|
rfi2_wraddr : out std_logic_vector(3 downto 0);
|
366 |
|
|
rfi2_wrdata : out std_logic_vector(31 downto 0);
|
367 |
|
|
rfi2_ren1 : out std_ulogic;
|
368 |
|
|
rfi2_ren2 : out std_ulogic;
|
369 |
|
|
rfi2_wren : out std_ulogic;
|
370 |
|
|
|
371 |
|
|
rfo1_data1 : in std_logic_vector(31 downto 0);
|
372 |
|
|
rfo1_data2 : in std_logic_vector(31 downto 0);
|
373 |
|
|
rfo2_data1 : in std_logic_vector(31 downto 0);
|
374 |
|
|
rfo2_data2 : in std_logic_vector(31 downto 0)
|
375 |
|
|
);
|
376 |
|
|
end component;
|
377 |
|
|
|
378 |
|
|
component grfpw_net
|
379 |
|
|
generic (tech : integer := 0;
|
380 |
|
|
pclow : integer range 0 to 2 := 2;
|
381 |
|
|
dsu : integer range 0 to 2 := 1;
|
382 |
|
|
disas : integer range 0 to 2 := 0;
|
383 |
|
|
pipe : integer range 0 to 2 := 0
|
384 |
|
|
);
|
385 |
|
|
port (
|
386 |
|
|
rst : in std_ulogic; -- Reset
|
387 |
|
|
clk : in std_ulogic;
|
388 |
|
|
holdn : in std_ulogic; -- pipeline hold
|
389 |
|
|
cpi_flush : in std_ulogic; -- pipeline flush
|
390 |
|
|
cpi_exack : in std_ulogic; -- FP exception acknowledge
|
391 |
|
|
cpi_a_rs1 : in std_logic_vector(4 downto 0);
|
392 |
|
|
cpi_d_pc : in std_logic_vector(31 downto 0);
|
393 |
|
|
cpi_d_inst : in std_logic_vector(31 downto 0);
|
394 |
|
|
cpi_d_cnt : in std_logic_vector(1 downto 0);
|
395 |
|
|
cpi_d_trap : in std_ulogic;
|
396 |
|
|
cpi_d_annul : in std_ulogic;
|
397 |
|
|
cpi_d_pv : in std_ulogic;
|
398 |
|
|
cpi_a_pc : in std_logic_vector(31 downto 0);
|
399 |
|
|
cpi_a_inst : in std_logic_vector(31 downto 0);
|
400 |
|
|
cpi_a_cnt : in std_logic_vector(1 downto 0);
|
401 |
|
|
cpi_a_trap : in std_ulogic;
|
402 |
|
|
cpi_a_annul : in std_ulogic;
|
403 |
|
|
cpi_a_pv : in std_ulogic;
|
404 |
|
|
cpi_e_pc : in std_logic_vector(31 downto 0);
|
405 |
|
|
cpi_e_inst : in std_logic_vector(31 downto 0);
|
406 |
|
|
cpi_e_cnt : in std_logic_vector(1 downto 0);
|
407 |
|
|
cpi_e_trap : in std_ulogic;
|
408 |
|
|
cpi_e_annul : in std_ulogic;
|
409 |
|
|
cpi_e_pv : in std_ulogic;
|
410 |
|
|
cpi_m_pc : in std_logic_vector(31 downto 0);
|
411 |
|
|
cpi_m_inst : in std_logic_vector(31 downto 0);
|
412 |
|
|
cpi_m_cnt : in std_logic_vector(1 downto 0);
|
413 |
|
|
cpi_m_trap : in std_ulogic;
|
414 |
|
|
cpi_m_annul : in std_ulogic;
|
415 |
|
|
cpi_m_pv : in std_ulogic;
|
416 |
|
|
cpi_x_pc : in std_logic_vector(31 downto 0);
|
417 |
|
|
cpi_x_inst : in std_logic_vector(31 downto 0);
|
418 |
|
|
cpi_x_cnt : in std_logic_vector(1 downto 0);
|
419 |
|
|
cpi_x_trap : in std_ulogic;
|
420 |
|
|
cpi_x_annul : in std_ulogic;
|
421 |
|
|
cpi_x_pv : in std_ulogic;
|
422 |
|
|
cpi_lddata : in std_logic_vector(31 downto 0); -- load data
|
423 |
|
|
cpi_dbg_enable : in std_ulogic;
|
424 |
|
|
cpi_dbg_write : in std_ulogic;
|
425 |
|
|
cpi_dbg_fsr : in std_ulogic; -- FSR access
|
426 |
|
|
cpi_dbg_addr : in std_logic_vector(4 downto 0);
|
427 |
|
|
cpi_dbg_data : in std_logic_vector(31 downto 0);
|
428 |
|
|
cpo_data : out std_logic_vector(31 downto 0); -- store data
|
429 |
|
|
cpo_exc : out std_logic; -- FP exception
|
430 |
|
|
cpo_cc : out std_logic_vector(1 downto 0); -- FP condition codes
|
431 |
|
|
cpo_ccv : out std_ulogic; -- FP condition codes valid
|
432 |
|
|
cpo_ldlock : out std_logic; -- FP pipeline hold
|
433 |
|
|
cpo_holdn : out std_ulogic;
|
434 |
|
|
cpo_dbg_data : out std_logic_vector(31 downto 0);
|
435 |
|
|
|
436 |
|
|
rfi1_rd1addr : out std_logic_vector(3 downto 0);
|
437 |
|
|
rfi1_rd2addr : out std_logic_vector(3 downto 0);
|
438 |
|
|
rfi1_wraddr : out std_logic_vector(3 downto 0);
|
439 |
|
|
rfi1_wrdata : out std_logic_vector(31 downto 0);
|
440 |
|
|
rfi1_ren1 : out std_ulogic;
|
441 |
|
|
rfi1_ren2 : out std_ulogic;
|
442 |
|
|
rfi1_wren : out std_ulogic;
|
443 |
|
|
|
444 |
|
|
rfi2_rd1addr : out std_logic_vector(3 downto 0);
|
445 |
|
|
rfi2_rd2addr : out std_logic_vector(3 downto 0);
|
446 |
|
|
rfi2_wraddr : out std_logic_vector(3 downto 0);
|
447 |
|
|
rfi2_wrdata : out std_logic_vector(31 downto 0);
|
448 |
|
|
rfi2_ren1 : out std_ulogic;
|
449 |
|
|
rfi2_ren2 : out std_ulogic;
|
450 |
|
|
rfi2_wren : out std_ulogic;
|
451 |
|
|
|
452 |
|
|
rfo1_data1 : in std_logic_vector(31 downto 0);
|
453 |
|
|
rfo1_data2 : in std_logic_vector(31 downto 0);
|
454 |
|
|
rfo2_data1 : in std_logic_vector(31 downto 0);
|
455 |
|
|
rfo2_data2 : in std_logic_vector(31 downto 0)
|
456 |
|
|
);
|
457 |
|
|
end component;
|
458 |
|
|
|
459 |
|
|
component leon3ft_net
|
460 |
|
|
generic (
|
461 |
|
|
hindex : integer := 0;
|
462 |
|
|
fabtech : integer range 0 to NTECH := DEFFABTECH;
|
463 |
|
|
memtech : integer range 0 to NTECH := DEFMEMTECH;
|
464 |
|
|
nwindows : integer range 2 to 32 := 8;
|
465 |
|
|
dsu : integer range 0 to 1 := 0;
|
466 |
|
|
fpu : integer range 0 to 31 := 0;
|
467 |
|
|
v8 : integer range 0 to 63 := 0;
|
468 |
|
|
cp : integer range 0 to 1 := 0;
|
469 |
|
|
mac : integer range 0 to 1 := 0;
|
470 |
|
|
pclow : integer range 0 to 2 := 2;
|
471 |
|
|
notag : integer range 0 to 1 := 0;
|
472 |
|
|
nwp : integer range 0 to 4 := 0;
|
473 |
|
|
icen : integer range 0 to 1 := 0;
|
474 |
|
|
irepl : integer range 0 to 2 := 2;
|
475 |
|
|
isets : integer range 1 to 4 := 1;
|
476 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
477 |
|
|
isetsize : integer range 1 to 256 := 1;
|
478 |
|
|
isetlock : integer range 0 to 1 := 0;
|
479 |
|
|
dcen : integer range 0 to 1 := 0;
|
480 |
|
|
drepl : integer range 0 to 2 := 2;
|
481 |
|
|
dsets : integer range 1 to 4 := 1;
|
482 |
|
|
dlinesize : integer range 4 to 8 := 4;
|
483 |
|
|
dsetsize : integer range 1 to 256 := 1;
|
484 |
|
|
dsetlock : integer range 0 to 1 := 0;
|
485 |
|
|
dsnoop : integer range 0 to 6 := 0;
|
486 |
|
|
ilram : integer range 0 to 1 := 0;
|
487 |
|
|
ilramsize : integer range 1 to 512 := 1;
|
488 |
|
|
ilramstart : integer range 0 to 255 := 16#8e#;
|
489 |
|
|
dlram : integer range 0 to 1 := 0;
|
490 |
|
|
dlramsize : integer range 1 to 512 := 1;
|
491 |
|
|
dlramstart : integer range 0 to 255 := 16#8f#;
|
492 |
|
|
mmuen : integer range 0 to 1 := 0;
|
493 |
|
|
itlbnum : integer range 2 to 64 := 8;
|
494 |
|
|
dtlbnum : integer range 2 to 64 := 8;
|
495 |
|
|
tlb_type : integer range 0 to 3 := 1;
|
496 |
|
|
tlb_rep : integer range 0 to 1 := 0;
|
497 |
|
|
lddel : integer range 1 to 2 := 2;
|
498 |
|
|
disas : integer range 0 to 2 := 0;
|
499 |
|
|
tbuf : integer range 0 to 64 := 0;
|
500 |
|
|
pwd : integer range 0 to 2 := 2; -- power-down
|
501 |
|
|
svt : integer range 0 to 1 := 1; -- single vector trapping
|
502 |
|
|
rstaddr : integer := 0;
|
503 |
|
|
smp : integer range 0 to 15 := 0; -- support SMP systems
|
504 |
|
|
iuft : integer range 0 to 4 := 0;
|
505 |
|
|
fpft : integer range 0 to 4 := 0;
|
506 |
|
|
cmft : integer range 0 to 1 := 0;
|
507 |
|
|
cached : integer := 0;
|
508 |
|
|
scantest : integer := 0
|
509 |
|
|
);
|
510 |
|
|
|
511 |
|
|
port (
|
512 |
|
|
clk : in std_ulogic;
|
513 |
|
|
gclk : in std_ulogic;
|
514 |
|
|
rstn : in std_ulogic;
|
515 |
|
|
ahbi : in ahb_mst_in_type;
|
516 |
|
|
ahbo : out ahb_mst_out_type;
|
517 |
|
|
ahbsi : in ahb_slv_in_type;
|
518 |
|
|
ahbso : in ahb_slv_out_vector;
|
519 |
|
|
irqi_irl: in std_logic_vector(3 downto 0);
|
520 |
|
|
irqi_rst: in std_ulogic;
|
521 |
|
|
irqi_run: in std_ulogic;
|
522 |
|
|
|
523 |
|
|
irqo_intack: out std_ulogic;
|
524 |
|
|
irqo_irl: out std_logic_vector(3 downto 0);
|
525 |
|
|
irqo_pwd: out std_ulogic;
|
526 |
|
|
|
527 |
|
|
dbgi_dsuen: in std_ulogic; -- DSU enable
|
528 |
|
|
dbgi_denable: in std_ulogic; -- diagnostic register access enable
|
529 |
|
|
dbgi_dbreak: in std_ulogic; -- debug break-in
|
530 |
|
|
dbgi_step: in std_ulogic; -- single step
|
531 |
|
|
dbgi_halt: in std_ulogic; -- halt processor
|
532 |
|
|
dbgi_reset: in std_ulogic; -- reset processor
|
533 |
|
|
dbgi_dwrite: in std_ulogic; -- read/write
|
534 |
|
|
dbgi_daddr: in std_logic_vector(23 downto 2); -- diagnostic address
|
535 |
|
|
dbgi_ddata: in std_logic_vector(31 downto 0); -- diagnostic data
|
536 |
|
|
dbgi_btrapa: in std_ulogic; -- break on IU trap
|
537 |
|
|
dbgi_btrape: in std_ulogic; -- break on IU trap
|
538 |
|
|
dbgi_berror: in std_ulogic; -- break on IU error mode
|
539 |
|
|
dbgi_bwatch: in std_ulogic; -- break on IU watchpoint
|
540 |
|
|
dbgi_bsoft: in std_ulogic; -- break on software breakpoint (TA 1)
|
541 |
|
|
dbgi_tenable: in std_ulogic;
|
542 |
|
|
dbgi_timer: in std_logic_vector(30 downto 0);
|
543 |
|
|
|
544 |
|
|
dbgo_data: out std_logic_vector(31 downto 0);
|
545 |
|
|
dbgo_crdy: out std_ulogic;
|
546 |
|
|
dbgo_dsu: out std_ulogic;
|
547 |
|
|
dbgo_dsumode: out std_ulogic;
|
548 |
|
|
dbgo_error: out std_ulogic;
|
549 |
|
|
dbgo_halt: out std_ulogic;
|
550 |
|
|
dbgo_pwd: out std_ulogic;
|
551 |
|
|
dbgo_idle: out std_ulogic;
|
552 |
|
|
dbgo_ipend: out std_ulogic;
|
553 |
|
|
dbgo_icnt: out std_ulogic
|
554 |
|
|
);
|
555 |
|
|
|
556 |
|
|
end component;
|
557 |
|
|
|
558 |
|
|
component ftmctrl_net
|
559 |
|
|
generic (
|
560 |
|
|
hindex : integer := 0;
|
561 |
|
|
pindex : integer := 0;
|
562 |
|
|
romaddr : integer := 16#000#;
|
563 |
|
|
rommask : integer := 16#E00#;
|
564 |
|
|
ioaddr : integer := 16#200#;
|
565 |
|
|
iomask : integer := 16#E00#;
|
566 |
|
|
ramaddr : integer := 16#400#;
|
567 |
|
|
rammask : integer := 16#C00#;
|
568 |
|
|
paddr : integer := 0;
|
569 |
|
|
pmask : integer := 16#fff#;
|
570 |
|
|
wprot : integer := 0;
|
571 |
|
|
invclk : integer := 0;
|
572 |
|
|
fast : integer := 0;
|
573 |
|
|
romasel : integer := 28;
|
574 |
|
|
sdrasel : integer := 29;
|
575 |
|
|
srbanks : integer := 4;
|
576 |
|
|
ram8 : integer := 0;
|
577 |
|
|
ram16 : integer := 0;
|
578 |
|
|
sden : integer := 0;
|
579 |
|
|
sepbus : integer := 0;
|
580 |
|
|
sdbits : integer := 32;
|
581 |
|
|
sdlsb : integer := 2; -- set to 12 for the GE-HPE board
|
582 |
|
|
oepol : integer := 0;
|
583 |
|
|
edac : integer := 0;
|
584 |
|
|
syncrst : integer := 0;
|
585 |
|
|
pageburst : integer := 0;
|
586 |
|
|
scantest : integer := 0;
|
587 |
|
|
writefb : integer := 0;
|
588 |
|
|
tech : integer := 0
|
589 |
|
|
);
|
590 |
|
|
port (
|
591 |
|
|
rst: in Std_ULogic;
|
592 |
|
|
clk: in Std_ULogic;
|
593 |
|
|
ahbsi: in ahb_slv_in_type;
|
594 |
|
|
ahbso: out ahb_slv_out_type;
|
595 |
|
|
apbi: in apb_slv_in_type;
|
596 |
|
|
apbo: out apb_slv_out_type;
|
597 |
|
|
memi_data: in Std_Logic_Vector(31 downto 0);
|
598 |
|
|
memi_brdyn: in Std_Logic;
|
599 |
|
|
memi_bexcn: in Std_Logic;
|
600 |
|
|
memi_writen: in Std_Logic;
|
601 |
|
|
memi_wrn: in Std_Logic_Vector(3 downto 0);
|
602 |
|
|
memi_bwidth: in Std_Logic_Vector(1 downto 0);
|
603 |
|
|
memi_sd: in Std_Logic_Vector(63 downto 0);
|
604 |
|
|
memi_cb: in Std_Logic_Vector(15 downto 0);
|
605 |
|
|
memi_scb: in Std_Logic_Vector(15 downto 0);
|
606 |
|
|
memi_edac: in Std_Logic;
|
607 |
|
|
memo_address: out Std_Logic_Vector(31 downto 0);
|
608 |
|
|
memo_data: out Std_Logic_Vector(31 downto 0);
|
609 |
|
|
memo_sddata: out Std_Logic_Vector(63 downto 0);
|
610 |
|
|
memo_ramsn: out Std_Logic_Vector(7 downto 0);
|
611 |
|
|
memo_ramoen: out Std_Logic_Vector(7 downto 0);
|
612 |
|
|
memo_ramn: out Std_ULogic;
|
613 |
|
|
memo_romn: out Std_ULogic;
|
614 |
|
|
memo_mben: out Std_Logic_Vector(3 downto 0);
|
615 |
|
|
memo_iosn: out Std_Logic;
|
616 |
|
|
memo_romsn: out Std_Logic_Vector(7 downto 0);
|
617 |
|
|
memo_oen: out Std_Logic;
|
618 |
|
|
memo_writen: out Std_Logic;
|
619 |
|
|
memo_wrn: out Std_Logic_Vector(3 downto 0);
|
620 |
|
|
memo_bdrive: out Std_Logic_Vector(3 downto 0);
|
621 |
|
|
memo_vbdrive: out Std_Logic_Vector(31 downto 0);
|
622 |
|
|
memo_svbdrive: out Std_Logic_Vector(63 downto 0);
|
623 |
|
|
memo_read: out Std_Logic;
|
624 |
|
|
memo_sa: out Std_Logic_Vector(14 downto 0);
|
625 |
|
|
memo_cb: out Std_Logic_Vector(15 downto 0);
|
626 |
|
|
memo_scb: out Std_Logic_Vector(15 downto 0);
|
627 |
|
|
memo_vcdrive: out Std_Logic_Vector(15 downto 0);
|
628 |
|
|
memo_svcdrive: out Std_Logic_Vector(15 downto 0);
|
629 |
|
|
memo_ce: out Std_ULogic;
|
630 |
|
|
sdo_sdcke: out Std_Logic_Vector( 1 downto 0);
|
631 |
|
|
sdo_sdcsn: out Std_Logic_Vector( 1 downto 0);
|
632 |
|
|
sdo_sdwen: out Std_ULogic;
|
633 |
|
|
sdo_rasn: out Std_ULogic;
|
634 |
|
|
sdo_casn: out Std_ULogic;
|
635 |
|
|
sdo_dqm: out Std_Logic_Vector( 7 downto 0);
|
636 |
|
|
wpo_wprothit: in Std_ULogic);
|
637 |
|
|
|
638 |
|
|
end component;
|
639 |
|
|
|
640 |
|
|
component ssrctrl_net
|
641 |
|
|
generic (
|
642 |
|
|
tech: Integer := 0;
|
643 |
|
|
bus16: Integer := 1);
|
644 |
|
|
port (
|
645 |
|
|
rst: in Std_Logic;
|
646 |
|
|
clk: in Std_Logic;
|
647 |
|
|
|
648 |
|
|
n_ahbsi_hsel: in Std_Logic_Vector(0 to 15);
|
649 |
|
|
n_ahbsi_haddr: in Std_Logic_Vector(31 downto 0);
|
650 |
|
|
n_ahbsi_hwrite: in Std_Logic;
|
651 |
|
|
n_ahbsi_htrans: in Std_Logic_Vector(1 downto 0);
|
652 |
|
|
n_ahbsi_hsize: in Std_Logic_Vector(2 downto 0);
|
653 |
|
|
n_ahbsi_hburst: in Std_Logic_Vector(2 downto 0);
|
654 |
|
|
n_ahbsi_hwdata: in Std_Logic_Vector(31 downto 0);
|
655 |
|
|
n_ahbsi_hprot: in Std_Logic_Vector(3 downto 0);
|
656 |
|
|
n_ahbsi_hready: in Std_Logic;
|
657 |
|
|
n_ahbsi_hmaster: in Std_Logic_Vector(3 downto 0);
|
658 |
|
|
n_ahbsi_hmastlock:in Std_Logic;
|
659 |
|
|
n_ahbsi_hmbsel: in Std_Logic_Vector(0 to 3);
|
660 |
|
|
n_ahbsi_hcache: in Std_Logic;
|
661 |
|
|
n_ahbsi_hirq: in Std_Logic_Vector(31 downto 0);
|
662 |
|
|
|
663 |
|
|
n_ahbso_hready: out Std_Logic;
|
664 |
|
|
n_ahbso_hresp: out Std_Logic_Vector(1 downto 0);
|
665 |
|
|
n_ahbso_hrdata: out Std_Logic_Vector(31 downto 0);
|
666 |
|
|
n_ahbso_hsplit: out Std_Logic_Vector(15 downto 0);
|
667 |
|
|
n_ahbso_hcache: out Std_Logic;
|
668 |
|
|
n_ahbso_hirq: out Std_Logic_Vector(31 downto 0);
|
669 |
|
|
|
670 |
|
|
n_apbi_psel: in Std_Logic_Vector(0 to 15);
|
671 |
|
|
n_apbi_penable: in Std_Logic;
|
672 |
|
|
n_apbi_paddr: in Std_Logic_Vector(31 downto 0);
|
673 |
|
|
n_apbi_pwrite: in Std_Logic;
|
674 |
|
|
n_apbi_pwdata: in Std_Logic_Vector(31 downto 0);
|
675 |
|
|
n_apbi_pirq: in Std_Logic_Vector(31 downto 0);
|
676 |
|
|
|
677 |
|
|
n_apbo_prdata: out Std_Logic_Vector(31 downto 0);
|
678 |
|
|
n_apbo_pirq: out Std_Logic_Vector(31 downto 0);
|
679 |
|
|
|
680 |
|
|
n_sri_data: in Std_Logic_Vector(31 downto 0);
|
681 |
|
|
n_sri_brdyn: in Std_Logic;
|
682 |
|
|
n_sri_bexcn: in Std_Logic;
|
683 |
|
|
n_sri_writen: in Std_Logic;
|
684 |
|
|
n_sri_wrn: in Std_Logic_Vector(3 downto 0);
|
685 |
|
|
n_sri_bwidth: in Std_Logic_Vector(1 downto 0);
|
686 |
|
|
n_sri_sd: in Std_Logic_Vector(63 downto 0);
|
687 |
|
|
n_sri_cb: in Std_Logic_Vector(7 downto 0);
|
688 |
|
|
n_sri_scb: in Std_Logic_Vector(7 downto 0);
|
689 |
|
|
n_sri_edac: in Std_Logic;
|
690 |
|
|
|
691 |
|
|
n_sro_address: out Std_Logic_Vector(31 downto 0);
|
692 |
|
|
n_sro_data: out Std_Logic_Vector(31 downto 0);
|
693 |
|
|
n_sro_sddata: out Std_Logic_Vector(63 downto 0);
|
694 |
|
|
n_sro_ramsn: out Std_Logic_Vector(7 downto 0);
|
695 |
|
|
n_sro_ramoen: out Std_Logic_Vector(7 downto 0);
|
696 |
|
|
n_sro_ramn: out Std_Logic;
|
697 |
|
|
n_sro_romn: out Std_Logic;
|
698 |
|
|
n_sro_mben: out Std_Logic_Vector(3 downto 0);
|
699 |
|
|
n_sro_iosn: out Std_Logic;
|
700 |
|
|
n_sro_romsn: out Std_Logic_Vector(7 downto 0);
|
701 |
|
|
n_sro_oen: out Std_Logic;
|
702 |
|
|
n_sro_writen: out Std_Logic;
|
703 |
|
|
n_sro_wrn: out Std_Logic_Vector(3 downto 0);
|
704 |
|
|
n_sro_bdrive: out Std_Logic_Vector(3 downto 0);
|
705 |
|
|
n_sro_vbdrive: out Std_Logic_Vector(31 downto 0);
|
706 |
|
|
n_sro_svbdrive: out Std_Logic_Vector(63 downto 0);
|
707 |
|
|
n_sro_read: out Std_Logic;
|
708 |
|
|
n_sro_sa: out Std_Logic_Vector(14 downto 0);
|
709 |
|
|
n_sro_cb: out Std_Logic_Vector(7 downto 0);
|
710 |
|
|
n_sro_scb: out Std_Logic_Vector(7 downto 0);
|
711 |
|
|
n_sro_vcdrive: out Std_Logic_Vector(7 downto 0);
|
712 |
|
|
n_sro_svcdrive: out Std_Logic_Vector(7 downto 0);
|
713 |
|
|
n_sro_ce: out Std_Logic);
|
714 |
|
|
end component;
|
715 |
|
|
|
716 |
|
|
end;
|