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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [software/] [leon3/] [fpu.c] - Blame information for rev 2

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1 2 dimamali 
#include "leon3.h"
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#include "testmod.h"
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//#include <math.h>
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5 
int __errno;
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fputest()
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{
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        int tmp;
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        tmp = xgetpsr();
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        setpsr(tmp | (1 << 12));
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        tmp = xgetpsr();
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        if (!(tmp & (1 <<12))) return(0);
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        set_fsr(0);
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        report_subtest(FPU_TEST+(get_pid()<<4));
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        fpu_main();
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}
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asm(
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"       .global a1, a2\n"
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"       .align 8\n"
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"a1:    .word 0x48000001\n"
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"       .word 0\n"
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"b1:    .word 0x48000000\n"
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"       .word 0\n"
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"c1:    .word 0x46c00000\n"
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"       .word 0\n"
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"c2:    .word 0x3ff00000\n"
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"       .word 0 \n"
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"       .word 0x40000000\n"
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"       .word 0 \n"
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"       .word 0x40080000\n"
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"       .word 0 \n"
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"       .word 0x3f800000\n"
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        );
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asm(
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"       .global       \n"
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"       .text         \n"
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"       .align 4      \n"
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"                     \n"
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"fpu_chkft:           \n"
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"       set     1, %o0                 \n"
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"       mov     %asr16, %o2            \n"
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"       srl     %o2, 30, %o2           \n"
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"       and     %o2, 3, %o2                  ! %o2 = fpft \n"
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"       cmp     %o2, %g0               \n"
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"       beq     1f                     \n"
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"       mov     0, %o0                 \n"
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"       cmp     %o2, 3                 \n"
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"       beq     1f                     \n"
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"       set     c2, %o1                \n"
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"       ldd     [%o1], %f0             \n"
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"       ldd     [%o1 + 8], %f2         \n"
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"       ld      [%o1 + 0x18], %f30           ! f30 = 1.0 \n"
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"       fmovs   %f30, %f10             \n"
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"       fmovs   %f30, %f12             \n"
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"       fmovs   %f30, %f14             \n"
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"       set     0x03007a, %o3                ! 4-bit error DP ram 0 \n"
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"       mov     %o3, %asr16            \n"
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"       nop; nop; nop; nop; nop; nop;  \n"
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"       fmovs   %f0, %f0               \n"
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"       fmovs   %f1, %f1               \n"
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"       fmovs   %f10, %f10             \n"
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"       fmovs   %f12, %f12             \n"
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"       fmovs   %f14, %f14             \n"
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"       set     0x03007e, %o3                ! 4-bit error DP ram 1 \n"
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"       mov     %o3, %asr16            \n"
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"       nop; nop; nop; nop; nop; nop;  \n"
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"       fmovs   %f2, %f2               \n"
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"       fmovs   %f3, %f3               \n"
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"       mov     %g0, %asr16            \n"
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"       nop; nop; nop; nop; nop; nop;  \n"
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"       faddd   %f0, %f2, %f4                ! should correct 4 errors \n"
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"       fadds   %f10, %f30, %f20             ! should correct 1 error  \n"
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"       std     %f12, [%o1]                  ! should correct 1 error  \n"
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"       st      %f14, [%o1]                  ! should correct 1 error  \n"
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"       ldd     [%o1 + 0x10], %f6            ! %f6 = 2.0 (DP) \n"
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"       ld      [%o1 + 0x8], %f8             ! %f8 = 2.0 (SP) \n"
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"       fcmpd   %f4, %f6               \n"
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"       nop                            \n"
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"       fbne    1f                     \n"
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"       fcmps    %f20, %f8             \n"
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"       nop                            \n"
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"       fbne    1f                     \n"
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"       mov     %asr16, %o1            \n"
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"       srl     %o1, 27, %o1           \n"
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"       and     %o1, 7, %o1                 ! error counter \n"
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"       mov     0, %o0                 \n"
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"       cmp     %o2, 1                 \n"
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"       beq     1f                     \n"
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"       sub     %o1, 7, %o0                 ! should be 7 for fpft = 1 \n"
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"       sub     %o1, 4, %o0                 ! should be 4 for fpft = 2 \n"
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"1:     retl                            \n"
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"       nop                             \n"
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);
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fpu_main()
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{
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        volatile double a, c, d;
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        double e;
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        extern volatile double a1,b1,c1;
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        float b;
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        int tmp;
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        d = 3.0;
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        e = d;
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        a = *(double *)&a1 - *(double *)&b1;
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        if (a != c1) fail(1);
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        a = sqrt(e);
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        if (fabs((a * a) - d) > 1E-15) fail(2);
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        b = sqrt(e);
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        if (fabs((b * b) - d) > 1E-7) fail(3);
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        tmp = fpu_pipe();
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        if (tmp) fail(tmp);
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        tmp = fpu_chkft();
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        if (tmp) fail(5);
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//      if (((get_asr17() >> 10) & 0x3C0003) == 1) grfpu_test();
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}
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float f1x = -1.0;
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int fsr1[4] = { 0x80000000, 0 , 0, 0 };
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int ftest[2] = { 0x48000000, 0x48100000 };
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fpu_pipe()
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{
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        asm(
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"       set     fsr1, %o0       ! check ldfsr/stfsr interlock\n"
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"       ld      [%o0], %fsr\n"
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"       st      %g0, [%o0]\n"
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"       ld      [%o0], %fsr\n"
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"       st      %fsr, [%o0]\n"
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"       ld      [%o0], %o2\n"
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"       set     0x000E0000, %o1\n"
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"       andn    %o2, %o1, %o2\n"
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"       subcc   %g0, %o2, %g0\n"
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"       bne,a   1f\n"
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"       mov     3, %o0\n"
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"\n"
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"       set 0x0f800000, %o1     ! check ldfsr/fpop interlock\n"
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"       st      %o1, [%sp-96]\n"
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"       st      %g0, [%sp-92]\n"
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"       ld      [%sp-96], %fsr\n"
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"       st      %g0, [%sp-96]\n"
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"       set     f1x, %o2\n"
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"       ld      [%o2], %f0\n"
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"       nop; nop\n"
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"       ld      [%sp-96], %fsr\n"
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"       ld      [%sp-92], %fsr\n"
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"       fsqrts  %f0, %f1\n"
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"       st      %fsr, [%sp-96]\n"
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"       ld      [%sp-96], %o0\n"
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"       andcc   %o0, 0x200, %g0\n"
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"       be,a    1f\n"
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"       mov     4, %o0\n"
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"\n"
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"\n"
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"       mov     0, %o0\n"
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"\n"
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"1:\n"
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"       mov     %o0, %i0\n"
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"       nop\n"
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"       set ftest, %o2\n"
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"       ld [%o2], %f8\n"
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"       set f1x, %o1\n"
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"       ld [%o1], %f3\n"
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"       faddd %f2, %f4, %f2\n"
174 
"       fcmps %f2, %f8\n"
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"       nop\n"
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"       fbe 3f\n"
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"       nop\n"
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"       set 1, %i0\n"
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"3:\n"
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"       ld [%o2+4], %f8\n"
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"       ld [%o1], %f5\n"
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"       faddd %f2, %f4, %f4\n"
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"       fcmps %f4, %f8\n"
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"       nop\n"
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"       fbe 4f\n"
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"       nop\n"
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"       set 1, %i0\n"
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"       nop\n"
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"4:\n"
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191 
);
192 
}
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194 
asm (
195 
"       .global set_fsr, get_fsr\n"
196 
"get_fsr: \n"
197 
"       st      %fsr, [%sp-96]\n"
198 
"       retl\n"
199 
"       ld      [%sp-96], %o0\n"
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"set_fsr: \n"
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"       st      %o0, [%sp-96]\n"
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"       retl\n"
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"       ld      [%sp-96], %fsr\n"
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);
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