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[/] [nand_controller/] [trunk/] [VHDL/] [onfi_package.vhd] - Blame information for rev 12

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1 9 pradd
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-------------------------------------------------------------------------------------------------
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-- Title                                                : ONFI compliant NAND interface
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-- File                                                 : onfi_package.vhd
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-- Author                                               : Alexey Lyashko <pradd@opencores.org>
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-- License                                              : LGPL
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-------------------------------------------------------------------------------------------------
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-- Description:
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-- This file contains clock cycle duration definition, delay timing constants as well as 
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-- definition of FSM states and types used in the module.
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-------------------------------------------------------------------------------------------------
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-------------------------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package onfi is
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        -- Clock cycle length in ns
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        -- IMPORTANT!!! The 'clock_cycle' is configured for 400MHz, change it appropriately!
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        constant clock_cycle    : real := 2.5;
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        -- NAND interface delays.
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        -- Delays of 7.5ns may need to be fixed to 7.0.
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        constant        t_cls           :       integer := integer(10.0 / clock_cycle);
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        constant        t_clh           :       integer := integer(5.0  / clock_cycle);
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        constant        t_wp            :       integer := integer(10.0         / clock_cycle);
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        constant        t_wh            :       integer := integer(7.5          / clock_cycle);
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        constant        t_wc            :       integer := integer(20.0 / clock_cycle);
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        constant        t_ds            :       integer := integer(7.5          / clock_cycle);
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        constant        t_dh            :       integer := integer(5.0          / clock_cycle);
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        constant        t_als           :       integer := integer(10.0 / clock_cycle);
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        constant        t_alh           :       integer := integer(5.0          / clock_cycle);
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        constant        t_rr            :       integer := integer(20.0 / clock_cycle);
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        constant        t_rea           :       integer := integer(16.0 / clock_cycle);
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        constant        t_rp            :       integer := integer(10.0 / clock_cycle);
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        constant        t_reh           :       integer := integer(7.5          / clock_cycle);
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        constant        t_wb            :       integer := integer(100.0        / clock_cycle);
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        constant        t_rst           :       integer := integer(5000.0       / clock_cycle);
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        constant        t_bers  :       integer :=      integer(700000.0 / clock_cycle);
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        constant        t_whr           :       integer :=      integer(80.0    / clock_cycle);
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        constant        t_prog  :       integer :=      integer(600000.0 / clock_cycle);
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        constant        t_adl           :       integer :=      integer(70.0    / clock_cycle);
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        type latch_t is (LATCH_CMD, LATCH_ADDR);
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        type io_t is (IO_READ, IO_WRITE);
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        type master_state_t is
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        (
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                M_IDLE,                                                         -- NAND Master is in idle state - awaits commands.
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                M_RESET,                                                                -- NAND Master is being reset.
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                M_WAIT,                                                         -- NAND Master waits for current operation to complete.
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                M_DELAY,                                                                -- Execute timed delay.
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                M_NAND_RESET,                                           -- NAND Master executes NAND 'reset' command.
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                M_NAND_READ_PARAM_PAGE,                 -- Read ONFI parameter page.
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                M_NAND_READ_ID,                                 -- Read the JEDEC ID of the chip.
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                M_NAND_BLOCK_ERASE,                             -- Erase block specified by address in current_address.
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                M_NAND_READ_STATUS,                             --      Read status byte.
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                M_NAND_READ,                                            -- Reads page into the buffer.
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                M_NAND_READ_8,
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                M_NAND_READ_16,
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                M_NAND_PAGE_PROGRAM,                            -- Program one page.
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                -- interface commands
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                MI_GET_STATUS,                                          -- Returns the status byte.
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                MI_CHIP_ENABLE,                                 -- Sets CE# to 0.
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                MI_CHIP_DISABLE,                                        -- Sets CE# to 1.
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                MI_WRITE_PROTECT,                                       -- Sets WP# to 0.
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                MI_WRITE_ENABLE,                                        --      Sets WP# to 1.
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                MI_RESET_INDEX,                                 -- Resets page_idx (used as indes into arrays) to 0.
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                -- The following states depend on 'page_idx' pointer. If its value goes beyond the limits
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                -- of the array, it is then reset to 0.
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                MI_GET_ID_BYTE,                                 -- Gets chip_id(page_idx) byte.
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                MI_GET_PARAM_PAGE_BYTE,                 -- Gets page_param(page_idx) byte.
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                MI_GET_DATA_PAGE_BYTE,                  -- Gets page_data(page_idx) byte.
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                MI_SET_DATA_PAGE_BYTE,                  -- Sets value at page_data(page_idx).
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                MI_GET_CURRENT_ADDRESS_BYTE,    -- Gets current_address(page_idx) byte.
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                MI_SET_CURRENT_ADDRESS_BYTE     -- Sets value at current_address(page_idx).
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        );
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        type master_substate_t is
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        (
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                MS_BEGIN,
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                MS_SUBMIT_COMMAND,
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                MS_SUBMIT_COMMAND1,
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                MS_SUBMIT_ADDRESS,
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                MS_WRITE_DATA0,
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                MS_WRITE_DATA1,
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                MS_WRITE_DATA2,
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                MS_WRITE_DATA3,
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                MS_READ_DATA0,
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                MS_READ_DATA1,
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                MS_READ_DATA2,
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                MS_DELAY,
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                MS_WAIT,
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                MS_END
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        );
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        type page_t is array (0 to 8628) of std_logic_vector(7 downto 0);
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        type param_page_t is array (0 to 255) of std_logic_vector(7 downto 0);
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        type nand_id_t is array (0 to 4) of std_logic_vector(7 downto 0);
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        type nand_address_t is array (0 to 4) of std_logic_vector(7 downto 0);
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        type states_t is array (0 to 255) of master_state_t;
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        constant        max_page_idx    :       integer :=      8626;
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end onfi;

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