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[/] [nanoblaze/] [trunk/] [Circuit/] [alu.vhd] - Blame information for rev 10

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1 10 fcorthay
--##############################################################################
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--
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--  alu
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--      The processor ALU
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--
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--      Arithmetic and logic unit.
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--
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--------------------------------------------------------------------------------
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--
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--  Versions / Authors
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--      1.0 Francois Corthay    first implementation
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--
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--  Provided under GNU LGPL licence: <http://www.gnu.org/copyleft/lesser.html>
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--
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--  by the electronics group of "HES-SO//Valais Wallis", in Switzerland:
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--  <http://www.hevs.ch/en/rad-instituts/institut-systemes-industriels/>.
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--
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--------------------------------------------------------------------------------
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--
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--  Hierarchy
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--      Used by "nanoblaze/nanoProcessor/aluAndRegisters".
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--
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--##############################################################################
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LIBRARY ieee;
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  USE ieee.std_logic_1164.all;
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  USE ieee.numeric_std.all;
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ENTITY alu IS
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  GENERIC(
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    aluCodeBitNb : positive := 5;
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    dataBitNb    : positive := 8
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  );
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  PORT(
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    aluCode : IN  std_ulogic_vector(aluCodeBitNb-1 DOWNTO 0);
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    opA     : IN  signed(dataBitNb-1 DOWNTO 0);
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    opB     : IN  signed(dataBitNb-1 DOWNTO 0);
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    cIn     : IN  std_ulogic;
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    aluOut  : OUT signed(dataBitNb-1 DOWNTO 0);
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    cOut    : OUT std_ulogic;
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    zero    : OUT std_ulogic
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  );
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END alu ;
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--==============================================================================
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ARCHITECTURE RTL OF alu IS
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  signal aluCodeInt: unsigned(aluCode'range);
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  signal aArith: signed(opA'high+1 downto 0);
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  signal bArith: signed(opA'high+1 downto 0);
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  signal cInArith: signed(1 downto 0);
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  signal cInShift: std_ulogic;
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  signal yArith: signed(aluOut'high+1 downto 0);
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  signal aluOutInt: signed(aluOut'range);
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BEGIN
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  ------------------------------------------------------------------------------
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                                      -- clear aluCode don't care LSB for shifts
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  aluCodeInt(aluCode'high downto 1) <= unsigned(aluCode(aluCode'high downto 1));
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  cleanupLsb: process(aluCode)
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  begin
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    if aluCode(aluCode'high) = '1' then
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      aluCodeInt(0) <= '0';
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    else
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      aluCodeInt(0) <= aluCode(0);
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    end if;
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  end process cleanupLsb;
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  ------------------------------------------------------------------------------
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                                             -- values for arithmetic operations
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  aArith <= signed(resize(unsigned(opA), aArith'length));
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  bArith <= signed(resize(unsigned(opB), bArith'length));
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  cInArith(cInArith'high downto 1) <= (others => '0');
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  cInArith <= '0' & cIn;
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  process(aluCode, cIn, opA)
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  begin
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    case aluCode(2 downto 1) is
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      when "00"   => cInShift <= cIn;
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      when "01"   => cInShift <= opA(opA'high);
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      when "10"   => cInShift <= opA(opA'low);
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      when "11"   => cInShift <= aluCode(0);
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      when others => cInShift <= '-';
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    end case;
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  end process;
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  ------------------------------------------------------------------------------
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                                                               -- alu operations
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  aluOperation: process(
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    aluCodeInt,
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    opA, opB,
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    aArith, bArith, cInArith,
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    cInShift,
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    yArith
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  )
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    variable xorAcc: std_ulogic;
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  begin
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    yArith <= (others => '-');
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    cOut   <= '-';
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    aluOutInt <= (others => '-');
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    case to_integer(aluCodeInt) is
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      when  0 =>                                        -- LOAD sX, kk
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        aluOutInt <= opB;
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      when  2 =>                                        -- INPUT sX, pp
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        aluOutInt <= opB;
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      when  3 =>                                        -- FETCH sX, ss
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        aluOutInt <= opB;
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      when  5 =>                                        -- AND sX, kk
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        aluOutInt <= opA and opB;
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        cOut      <= '0';
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      when  6 =>                                        -- OR sX, kk
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        aluOutInt <= opA or opB;
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        cOut      <= '0';
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      when  7 =>                                        -- XOR sX, kk
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        aluOutInt <= opA xor opB;
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        cOut      <= '0';
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      when  9 =>                                        -- TEST sX, kk
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        aluOutInt <= opA and opB;
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        xorAcc := '0';
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        for index in aluOutInt'range loop
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          xorAcc := xorAcc xor aluOutInt(index);
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        end loop;
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        cOut      <= xorAcc;
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      when 10 =>                                        -- COMPARE sX, kk
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        yArith    <= aArith - bArith;
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        aluOutInt <= yArith(aluOut'range);
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        cOut      <= yArith(yArith'high);
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      when 12 =>                                        -- ADD sX, kk
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        yArith    <= aArith + bArith;
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        aluOutInt <= yArith(aluOut'range);
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        cOut      <= yArith(yArith'high);
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      when 13 =>                                        -- ADDCY sX, kk
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        yArith    <= (aArith + bArith) + cInArith;
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        aluOutInt <= yArith(aluOut'range);
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        cOut      <= yArith(yArith'high);
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      when 14 =>                                        -- SUB sX, kk
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        yArith    <= aArith - bArith;
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        aluOutInt <= yArith(aluOut'range);
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        cOut      <= yArith(yArith'high);
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      when 15 =>                                        -- SUBCY sX, kk
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        yArith    <= (aArith - bArith) - cInArith;
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        aluOutInt <= yArith(aluOut'range);
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        cOut      <= yArith(yArith'high);
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      when 16 to 23 =>                                  -- SL sX
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        aluOutInt <= opA(opA'high-1 downto 0) & cInShift;
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        cOut      <= opA(opA'high);
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      when 24 to 31 =>                                  -- SR sX
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        aluOutInt <= cInShift & opA(opA'high downto 1);
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        cOut      <= opA(0);
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      when others =>
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        aluOutInt <= (others => '-');
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    end case;
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  end process aluOperation;
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  aluOut <= aluOutInt;
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  zero <= '1' when aluOutInt = 0 else '0';
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END ARCHITECTURE RTL;

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