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[/] [natalius_8bit_risc/] [trunk/] [memram.v] - Blame information for rev 7

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Line No. Rev Author Line
1 7 fabioandre
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company:       Universidad Pontificia Bolivariana
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// Engineer:      Fabio Andres Guzman Figueroa
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// 
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// Create Date:    12:03:56 05/15/2012 
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// Design Name: 
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// Module Name:    memram 
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// Project Name: 
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// Target Devices: 
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// Tool versions: 
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// Description: 
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//
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// Dependencies: 
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//
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// Revision: 
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// Revision 0.01 - File Created
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// Additional Comments: 
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//
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//////////////////////////////////////////////////////////////////////////////////
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module memram(
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    input clk,
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    input [7:0] din,
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    input [4:0] addr,
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    output [7:0] dout,
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    input we
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    );
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   (* RAM_STYLE="DISTRIBUTED" *)
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        reg [7:0] ram [31:0];
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   always @(posedge clk)
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      if (we)
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         ram[addr] <= din;
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   assign dout = ram[addr];
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endmodule

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