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[/] [oms8051mini/] [trunk/] [verif/] [tb/] [tb_tasks.v] - Blame information for rev 11

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Line No. Rev Author Line
1 2 dinesha 
 
2 
initial
3 
begin
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   reg_cs  = 0;
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   reg_be  = 4'h0;
6 10 dinesha 
   reg_id  = 0;
7 2 dinesha 
end
8 
 
9 
task cpu_read;
10 10 dinesha 
  input  [3:0]  block_id;
11 2 dinesha 
  input  [15:0] address;
12 
  output [31:0] read_data;
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  begin
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      @(posedge app_clk);
15 10 dinesha 
      reg_id  = block_id;
16 11 dinesha 
 
17 
      // Byte-0
18 2 dinesha 
      reg_cs = 1;
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      reg_wr = 0;
20 11 dinesha 
      reg_be = 1'h1;
21 2 dinesha 
      reg_addr = address;
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      @(posedge reg_ack);
23 11 dinesha 
       #1 read_data[7:0] = reg_rdata[7:0];
24 2 dinesha 
      @(posedge app_clk);
25 11 dinesha 
       reg_cs  = 0;
26 
 
27 
      // Byte-1
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      reg_cs = 1;
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      reg_wr = 0;
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      reg_be = 1'h1;
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      reg_addr = address+1;
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      @(posedge reg_ack);
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       #1 read_data[15:8]= reg_rdata[7:0];
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      @(posedge app_clk);
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       reg_cs  = 0;
36 
 
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      // Byte-2
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      reg_cs = 1;
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      reg_wr = 0;
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      reg_be = 1'h1;
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      reg_addr = address+2;
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      @(posedge reg_ack);
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       #1 read_data[23:16]= reg_rdata[7:0];
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      @(posedge app_clk);
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       reg_cs  = 0;
46 
 
47 
      // Byte-3
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      reg_cs = 1;
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      reg_wr = 0;
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      reg_be = 1'h1;
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      reg_addr = address+3;
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      @(posedge reg_ack);
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       #1 read_data[31:24] = reg_rdata[7:0];
54 
      @(posedge app_clk);
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       reg_cs  = 0;
56 2 dinesha 
      //$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
57 
  end
58 
endtask
59 
 
60 
task cpu_write;
61 10 dinesha 
  input  [3:0] block_id; // 0/1/2 --> ram/spi/uart
62 2 dinesha 
  input  [15:0] address;
63 
  input  [31:0] write_data;
64 
  begin
65 
      $display ("Config-Write: Id: %h Addr = %h, Cfg. Data = %h", block_id,address, write_data);
66 11 dinesha 
      // Byte-0
67 2 dinesha 
      @(posedge app_clk);
68 10 dinesha 
      reg_id  = block_id;
69 2 dinesha 
      reg_cs = 1;
70 
      reg_wr = 1;
71 11 dinesha 
      reg_be = 1'h1;
72 2 dinesha 
      reg_addr = address;
73 11 dinesha 
      reg_wdata = write_data[7:0];
74 2 dinesha 
      @(posedge reg_ack);
75 
      @(posedge app_clk);
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      reg_cs  = 0;
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      reg_wr = 0;
78 11 dinesha 
 
79 
      // Byte-1
80 
      @(posedge app_clk);
81 
      reg_id  = block_id;
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      reg_cs = 1;
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      reg_wr = 1;
84 
      reg_be = 1'h1;
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      reg_addr = address+1;
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      reg_wdata = write_data[15:8];
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      @(posedge reg_ack);
88 
      @(posedge app_clk);
89 
      reg_cs  = 0;
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      reg_wr = 0;
91 
 
92 
      // Byte-2
93 
      @(posedge app_clk);
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      reg_id  = block_id;
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      reg_cs = 1;
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      reg_wr = 1;
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      reg_be = 1'h1;
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      reg_addr = address+2;
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      reg_wdata = write_data[23:16];
100 
      @(posedge reg_ack);
101 
      @(posedge app_clk);
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      reg_cs  = 0;
103 
      reg_wr = 0;
104 
 
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      // Byte-2
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      @(posedge app_clk);
107 
      reg_id  = block_id;
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      reg_cs = 1;
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      reg_wr = 1;
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      reg_be = 1'h1;
111 
      reg_addr = address+3;
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      reg_wdata = write_data[31:24];
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      @(posedge reg_ack);
114 
      @(posedge app_clk);
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      reg_cs  = 0;
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      reg_wr = 0;
117 
 
118 2 dinesha 
  end
119 
endtask
120 
 
121 11 dinesha 
task cpu_byte_read;
122 
  input  [3:0]  block_id;
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  input  [15:0] address;
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  output [7:0] read_data;
125 
  begin
126 
      @(posedge app_clk);
127 
      reg_id  = block_id;
128 
 
129 
      // Byte-0
130 
      reg_cs = 1;
131 
      reg_wr = 0;
132 
      reg_be = 1'h1;
133 
      reg_addr = address;
134 
      @(posedge reg_ack);
135 
       #1 read_data[7:0] = reg_rdata[7:0];
136 
      @(posedge app_clk);
137 
       reg_cs  = 0;
138 
 
139 
      //$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
140 
  end
141 
endtask
142 
 
143 
task cpu_byte_write;
144 
  input  [3:0] block_id; // 0/1/2 --> ram/spi/uart
145 
  input  [15:0] address;
146 
  input  [7:0] write_data;
147 
  begin
148 
      $display ("Config-Write: Id: %h Addr = %h, Cfg. Data = %h", block_id,address, write_data);
149 
      // Byte-0
150 
      @(posedge app_clk);
151 
      reg_id  = block_id;
152 
      reg_cs = 1;
153 
      reg_wr = 1;
154 
      reg_be = 1'h1;
155 
      reg_addr = address;
156 
      reg_wdata = write_data[7:0];
157 
      @(posedge reg_ack);
158 
      @(posedge app_clk);
159 
      reg_cs  = 0;
160 
      reg_wr = 0;
161 
 
162 
  end
163 
endtask
164 
 

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