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[/] [opb_usblite/] [trunk/] [pcores/] [opb_usblite_v1_00_a/] [hdl/] [vhdl/] [usb_serial.vhdl] - Blame information for rev 2

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1 2 rehnmaak
--
2
--  USB 2.0 Serial data transfer entity
3
--
4
--  This entity implements a USB 2.0 device that carries a bidirectional
5
--  byte stream over the bus. It communicates with the host according to
6
--  the USB Communication Device Class, specifically the ACM (Abstract
7
--  Control Model) variant.
8
--
9
--  The low-level interface signals are labeled PHY_xxx and can be connected
10
--  to an UTMI-compliant PHY component. The PHY should be configured in 8-bit
11
--  mode.
12
--
13
--  The application interface supports simple byte-at-a-time sending and
14
--  receiving. Three block RAMs are used to implement a receive buffer,
15
--  a transmission buffer and descriptor ROM.
16
--
17
--  The CLK input must be the 60 MHz clock generated by the UTMI transceiver.
18
--  All application interface signals and PHY interface signals are
19
--  synchronized to the rising edge of CLK, except for SUSPEND which has
20
--  an asynchronous reset.
21
--
22
--  Transmission:
23
--    * The entity asserts TXRDY when it is ready to send data.
24
--    * The application puts data on TXDAT and asserts TXVAL when it is
25
--      ready to send data.
26
--    * In each clock cycle in which TXRDY and TXVAL are both asserted,
27
--      the entity takes a byte from TXDAT and queues it for transmission.
28
--
29
--  Receiving:
30
--    * The application asserts RXRDY when it is ready to receive data.
31
--    * The entity puts data on RXDAT and asserts RXVAL when it has
32
--      data available. It will only do this in response to RXRDY.
33
--    * When RXVAL is high, the application must either accept a byte
34
--      from RXDAT and be ready for the next byte in the following cycle,
35
--      or it must deassert RXRDY to pause the receive queue.
36
--
37
--  At power on, and after RESET, the device waits for 16 ms before
38
--  attaching to the USB bus. A high signal on ONLINE indicates that
39
--  the device has been fully configured by the host.
40
--
41
--  Bugs and limitations:
42
--    * The TEST_MODE feature (mandatory for high speed devices) is
43
--      not implemented and returns an error condition to the host.
44
--    * The SEND_ENCAPSULATED_COMMAND and GET_ENCAPSULATED_RESPONSE commands
45
--      (mandatory CDC-ACM requests) are not supported but will return a
46
--      success condition to the host.
47
--    * The default control pipe does not verify requests from the host
48
--      as strictly as required by the standard. As a result, invalid
49
--      requests from the host may sometimes appear to succeed when
50
--      they should have returned an error condition.
51
--
52
--  Implementation note:
53
--  At some point it may become useful to implement separate clock domains
54
--  for the application resp. PHY side of this entity, using the FIFO buffers
55
--  for clock domain crossing. As a first step, a distinction has been made
56
--  between application-side signals (prefixed with q_) and PHY-side signals
57
--  (prefixed with s_). Currently the corresponding signals from both sides
58
--  are simply wired together with asynchronous assignments. By replacing
59
--  these hardwired connections with carefully designed synchronization logic,
60
--  a separation of clock domains could be realized.
61
--
62
 
63
library ieee;
64
use ieee.std_logic_1164.all, ieee.numeric_std.all;
65
use work.usb_pkg.all;
66
 
67
entity usb_serial is
68
 
69
    generic (
70
 
71
        -- Vendor ID to report in device descriptor.
72
        VENDORID :      std_logic_vector(15 downto 0);
73
 
74
        -- Product ID to report in device descriptor.
75
        PRODUCTID :     std_logic_vector(15 downto 0);
76
 
77
        -- Product version to report in device descriptor.
78
        VERSIONBCD :    std_logic_vector(15 downto 0);
79
 
80
        -- Support high speed mode.
81
        HSSUPPORT :     boolean := false;
82
 
83
        -- Set to true if the device never draws power from the USB bus.
84
        SELFPOWERED :   boolean := false;
85
 
86
        -- Size of receive buffer as 2-logarithm of the number of bytes.
87
        -- Must be at least 10 (1024 bytes) for high speed support.
88
        RXBUFSIZE_BITS: integer range 7 to 12 := 11;
89
 
90
        -- Size of transmit buffer as 2-logarithm of the number of bytes.
91
        TXBUFSIZE_BITS: integer range 7 to 12 := 10 );
92
 
93
    port (
94
 
95
        -- 60 MHz UTMI clock.
96
        CLK :           in  std_logic;
97
 
98
        -- Synchronous reset; clear buffers and re-attach to the bus.
99
        RESET :         in  std_logic;
100
 
101
        -- High for one clock when a reset signal is detected on the USB bus.
102
        -- Note: do NOT wire this signal to RESET externally.
103
        USBRST :        out std_logic;
104
 
105
        -- High when the device is operating (or suspended) in high speed mode.
106
        HIGHSPEED :     out std_logic;
107
 
108
        -- High while the device is suspended.
109
        -- Note: This signal is not synchronized to CLK.
110
        -- It may be used to asynchronously drive the UTMI SuspendM pin.
111
        SUSPEND :       out std_logic;
112
 
113
        -- High when the device is in the Configured state.
114
        ONLINE :        out std_logic;
115
 
116
        -- High if a received byte is available on RXDAT.
117
        RXVAL :         out std_logic;
118
 
119
        -- Received data byte, valid if RXVAL is high.
120
        RXDAT :         out std_logic_vector(7 downto 0);
121
 
122
        -- High if the application is ready to receive the next byte.
123
        RXRDY :         in  std_logic;
124
 
125
        -- Number of bytes currently available in receive buffer.
126
        RXLEN :         out std_logic_vector((RXBUFSIZE_BITS-1) downto 0);
127
 
128
        -- High if the application has data to send.
129
        TXVAL :         in  std_logic;
130
 
131
        -- Data byte to send, must be valid if TXVAL is high.
132
        TXDAT :         in  std_logic_vector(7 downto 0);
133
 
134
        -- High if the entity is ready to accept the next byte.
135
        TXRDY :         out std_logic;
136
 
137
        -- Number of free byte positions currently available in transmit buffer.
138
        TXROOM :        out std_logic_vector((TXBUFSIZE_BITS-1) downto 0);
139
 
140
        -- Temporarily suppress transmissions at the outgoing endpoint.
141
        -- This gives the application an oppertunity to fill the transmit
142
        -- buffer in order to blast data efficiently in big chunks.
143
        TXCORK :        in  std_logic;
144
 
145
        PHY_DATAIN :    in  std_logic_vector(7 downto 0);
146
        PHY_DATAOUT :   out std_logic_vector(7 downto 0);
147
        PHY_TXVALID :   out std_logic;
148
        PHY_TXREADY :   in  std_logic;
149
        PHY_RXACTIVE :  in  std_logic;
150
        PHY_RXVALID :   in  std_logic;
151
        PHY_RXERROR :   in  std_logic;
152
        PHY_LINESTATE : in  std_logic_vector(1 downto 0);
153
        PHY_OPMODE :    out std_logic_vector(1 downto 0);
154
        PHY_XCVRSELECT: out std_logic;
155
        PHY_TERMSELECT: out std_logic;
156
        PHY_RESET :     out std_logic );
157
 
158
end entity usb_serial;
159
 
160
architecture usb_serial_arch of usb_serial is
161
 
162
    -- Byte array type
163
    type t_byte_array is array(natural range <>) of std_logic_vector(7 downto 0);
164
 
165
    -- Conditional expression.
166
    function choose_int(z: boolean; a, b: integer)
167
        return integer is
168
    begin
169
        if z then return a; else return b; end if;
170
    end function;
171
 
172
    -- Conditional expression.
173
    function choose_byte(z: boolean; a, b: std_logic_vector)
174
        return std_logic_vector is
175
    begin
176
        if z then return a; else return b; end if;
177
    end function;
178
 
179
    -- Maximum packet size according to protocol.
180
    constant MAX_FSPACKET_SIZE: integer := 64;
181
    constant MAX_HSPACKET_SIZE: integer := 512;
182
 
183
    -- Width required for a pointer that can cover either RX or TX buffer.
184
    constant BUFPTR_SIZE :  integer := choose_int(RXBUFSIZE_BITS > TXBUFSIZE_BITS, RXBUFSIZE_BITS, TXBUFSIZE_BITS);
185
 
186
    -- Data endpoint number.
187
    constant data_endpt :   std_logic_vector(3 downto 0) := "0001";
188
    constant notify_endpt : std_logic_vector(3 downto 0) := "0010";
189
 
190
    -- Descriptor ROM
191
    --   addr   0 ..  17 : device descriptor
192
    --   addr  20 ..  29 : device qualifier
193
    --   addr  32 ..  98 : full speed configuration descriptor 
194
    --   addr 112 .. 178 : high speed configuration descriptor
195
    --   addr 179 :        other_speed_configuration hack
196
    constant DESC_DEV_ADDR :        integer := 0;
197
    constant DESC_DEV_LEN  :        integer := 18;
198
    constant DESC_QUAL_ADDR :       integer := 20;
199
    constant DESC_QUAL_LEN :        integer := 10;
200
    constant DESC_FSCFG_ADDR :      integer := 32;
201
    constant DESC_FSCFG_LEN :       integer := 67;
202
    constant DESC_HSCFG_ADDR :      integer := 112;
203
    constant DESC_HSCFG_LEN :       integer := 67;
204
    constant DESC_OTHERSPEED_ADDR : integer := 179;
205
 
206
    constant descrom_pre: t_byte_array(0 to 191) :=
207
        -- 18 bytes device descriptor
208
      ( X"12",                  -- bLength = 18 bytes
209
        X"01",                  -- bDescriptorType = device descriptor
210
        choose_byte(HSSUPPORT, X"00", X"10"),   -- bcdUSB = 1.10 or 2.00
211
        choose_byte(HSSUPPORT, X"02", X"01"),
212
        X"02",                  -- bDeviceClass = Communication Device Class
213
        X"00",                  -- bDeviceSubClass = none
214
        X"00",                  -- bDeviceProtocol = none
215
        X"40",                  -- bMaxPacketSize0 = 64 bytes
216
        VENDORID(7 downto 0),   -- idVendor
217
        VENDORID(15 downto 8),
218
        PRODUCTID(7 downto 0),  -- idProduct
219
        PRODUCTID(15 downto 8),
220
        VERSIONBCD(7 downto 0), -- bcdDevice
221
        VERSIONBCD(15 downto 8),
222
        X"00",                  -- iManufacturer
223
        X"00",                  -- iProduct
224
        X"00",                  -- iSerialNumber
225
        X"01",                  -- bNumConfigurations = 1
226
        -- 2 bytes padding
227
        X"00", X"00",
228
        -- 10 bytes device qualifier
229
        X"0a",                  -- bLength = 10 bytes
230
        X"06",                  -- bDescriptorType = device qualifier
231
        X"00", X"02",           -- bcdUSB = 2.0
232
        X"02",                  -- bDeviceClass = Communication Device Class
233
        X"00",                  -- bDeviceSubClass = none
234
        X"00",                  -- bDeviceProtocol = none
235
        X"40",                  -- bMaxPacketSize0 = 64 bytes
236
        X"01",                  -- bNumConfigurations = 1
237
        X"00",                  -- bReserved
238
        -- 2 bytes padding
239
        X"00", X"00",
240
        -- 67 bytes full-speed configuration descriptor
241
        -- 9 bytes configuration header
242
        X"09",                  -- bLength = 9 bytes
243
        X"02",                  -- bDescriptorType = configuration descriptor
244
        X"43", X"00",           -- wTotalLength = 67 bytes
245
        X"02",                  -- bNumInterfaces = 2
246
        X"01",                  -- bConfigurationValue = 1
247
        X"00",                  -- iConfiguration = none
248
        choose_byte(SELFPOWERED, X"c0", X"80"), -- bmAttributes
249
        X"fa",                  -- bMaxPower = 500 mA
250
        -- 9 bytes interface descriptor (communication control class)
251
        X"09",                  -- bLength = 9 bytes
252
        X"04",                  -- bDescriptorType = interface descriptor
253
        X"00",                  -- bInterfaceNumber = 0
254
        X"00",                  -- bAlternateSetting = 0
255
        X"01",                  -- bNumEndpoints = 1
256
        X"02",                  -- bInterfaceClass = Communication Interface
257
        X"02",                  -- bInterfaceSubClass = Abstract Control Model
258
        X"01",                  -- bInterfaceProtocol = V.25ter (required for Linux CDC-ACM driver)
259
        X"00",                  -- iInterface = none
260
        -- 5 bytes functional descriptor (header)
261
        X"05",                  -- bLength = 5 bytes
262
        X"24",                  -- bDescriptorType = CS_INTERFACE
263
        X"00",                  -- bDescriptorSubtype = header
264
        X"10", X"01",           -- bcdCDC = 1.10
265
        -- 4 bytes functional descriptor (abstract control management)
266
        X"04",                  -- bLength = 4 bytes
267
        X"24",                  -- bDescriptorType = CS_INTERFACE
268
        X"02",                  -- bDescriptorSubtype = Abstract Control Mgmnt
269
        X"00",                  -- bmCapabilities = none
270
        -- 5 bytes functional descriptor (union)
271
        X"05",                  -- bLength = 5 bytes
272
        X"24",                  -- bDescriptorType = CS_INTERFACE
273
        X"06",                  -- bDescriptorSubtype = union
274
        X"00",                  -- bMasterInterface = 0
275
        X"01",                  -- bSlaveInterface0 = 1
276
        -- 5 bytes functional descriptor (call management)
277
        X"05",                  -- bLength = 5 bytes
278
        X"24",                  -- bDescriptorType = CS_INTERFACE
279
        X"01",                  -- bDescriptorSubType = Call Management
280
        X"00",                  -- bmCapabilities = no call mgmnt
281
        X"01",                  -- bDataInterface = 1
282
        -- 7 bytes endpoint descriptor (notify IN)
283
        X"07",                  -- bLength = 7 bytes
284
        X"05",                  -- bDescriptorType = endpoint descriptor
285
        X"82",                  -- bEndpointAddress = IN 2
286
        X"03",                  -- bmAttributes = interrupt data
287
        X"08", X"00",           -- wMaxPacketSize = 8 bytes
288
        X"ff",                  -- bInterval = 255 frames
289
        -- 9 bytes interface descriptor (data class)
290
        X"09",                  -- bLength = 9 bytes
291
        X"04",                  -- bDescriptorType = interface descriptor
292
        X"01",                  -- bInterfaceNumber = 1
293
        X"00",                  -- bAlternateSetting = 0
294
        X"02",                  -- bNumEndpoints = 2
295
        X"0a",                  -- bInterfaceClass = Data Interface
296
        X"00",                  -- bInterfaceSubClass = none
297
        X"00",                  -- bInterafceProtocol = none
298
        X"00",                  -- iInterface = none
299
        -- 7 bytes endpoint descriptor (data IN)
300
        X"07",                  -- bLength = 7 bytes
301
        X"05",                  -- bDescriptorType = endpoint descriptor
302
        X"81",                  -- bEndpointAddress = IN 1
303
        X"02",                  -- bmAttributes = bulk data
304
        X"40", X"00",           -- wMaxPacketSize = 64 bytes
305
        X"00",                  -- bInterval
306
        -- 7 bytes endpoint descriptor (data OUT)
307
        X"07",                  -- bLength = 7 bytes
308
        X"05",                  -- bDescriptorType = endpoint descriptor
309
        X"01",                  -- bEndpointAddress = OUT 1
310
        X"02",                  -- bmAttributes = bulk data
311
        X"40", X"00",           -- wMaxPacketSize = 64 bytes
312
        X"00",                  -- bInterval
313
        -- 13 bytes padding
314
        X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"00",
315
        X"00", X"00", X"00", X"00", X"00",
316
        -- 67 bytes high-speed configuration descriptor
317
        -- 9 bytes configuration header
318
        X"09",                  -- bLength = 9 bytes
319
        X"02",                  -- bDescriptorType = configuration descriptor
320
        X"43", X"00",           -- wTotalLength = 67 bytes
321
        X"02",                  -- bNumInterfaces = 2
322
        X"01",                  -- bConfigurationValue = 1
323
        X"00",                  -- iConfiguration = none
324
        choose_byte(SELFPOWERED, X"c0", X"80" ), -- bmAttributes = self-powered
325
        X"fa",                  -- bMaxPower = 500 mA
326
        -- 9 bytes interface descriptor (communication control class)
327
        X"09",                  -- bLength = 9 bytes
328
        X"04",                  -- bDescriptorType = interface descriptor
329
        X"00",                  -- bInterfaceNumber = 0
330
        X"00",                  -- bAlternateSetting = 0
331
        X"01",                  -- bNumEndpoints = 1
332
        X"02",                  -- bInterfaceClass = Communication Interface
333
        X"02",                  -- bInterfaceSubClass = Abstract Control Model
334
        X"01",                  -- bInterfaceProtocol = V.25ter (required for Linux CDC-ACM driver)
335
        X"00",                  -- iInterface = none
336
        -- 5 bytes functional descriptor (header)
337
        X"05",                  -- bLength = 5 bytes
338
        X"24",                  -- bDescriptorType = CS_INTERFACE
339
        X"00",                  -- bDescriptorSubtype = header
340
        X"10", X"01",           -- bcdCDC = 1.10
341
        -- 4 bytes functional descriptor (abstract control management)
342
        X"04",                  -- bLength = 4 bytes
343
        X"24",                  -- bDescriptorType = CS_INTERFACE
344
        X"02",                  -- bDescriptorSubtype = Abstract Control Mgmnt
345
        X"00",                  -- bmCapabilities = none
346
        -- 5 bytes functional descriptor (union)
347
        X"05",                  -- bLength = 5 bytes
348
        X"24",                  -- bDescriptorType = CS_INTERFACE
349
        X"06",                  -- bDescriptorSubtype = union
350
        X"00",                  -- bMasterInterface = 0
351
        X"01",                  -- bSlaveInterface0 = 1
352
        -- 5 bytes functional descriptor (call management)
353
        X"05",                  -- bLength = 5 bytes
354
        X"24",                  -- bDescriptorType = CS_INTERFACE
355
        X"01",                  -- bDescriptorSubType = Call Management
356
        X"00",                  -- bmCapabilities = no call mgmnt
357
        X"01",                  -- bDataInterface = 1
358
        -- 7 bytes endpoint descriptor (notify IN)
359
        X"07",                  -- bLength = 7 bytes
360
        X"05",                  -- bDescriptorType = endpoint descriptor
361
        X"82",                  -- bEndpointAddress = IN 2
362
        X"03",                  -- bmAttributes = interrupt data
363
        X"08", X"00",           -- wMaxPacketSize = 8 bytes
364
        X"0f",                  -- bInterval = 2**14 frames
365
        -- 9 bytes interface descriptor (data class)
366
        X"09",                  -- bLength = 9 bytes
367
        X"04",                  -- bDescriptorType = interface descriptor
368
        X"01",                  -- bInterfaceNumber = 1
369
        X"00",                  -- bAlternateSetting = 0
370
        X"02",                  -- bNumEndpoints = 2
371
        X"0a",                  -- bInterfaceClass = Data Interface
372
        X"00",                  -- bInterfaceSubClass = none
373
        X"00",                  -- bInterafceProtocol = none
374
        X"00",                  -- iInterface = none
375
        -- 7 bytes endpoint descriptor (data IN)
376
        X"07",                  -- bLength = 7 bytes
377
        X"05",                  -- bDescriptorType = endpoint descriptor
378
        X"81",                  -- bEndpointAddress = IN 1
379
        X"02",                  -- bmAttributes = bulk data
380
        X"00", X"02",           -- wMaxPacketSize = 512 bytes
381
        X"00",                  -- bInterval
382
        -- 7 bytes endpoint descriptor (data OUT)
383
        X"07",                  -- bLength = 7 bytes
384
        X"05",                  -- bDescriptorType = endpoint descriptor
385
        X"01",                  -- bEndpointAddress = OUT 1
386
        X"02",                  -- bmAttributes = bulk data
387
        X"00", X"02",           -- wMaxPacketSize = 512 bytes
388
        X"00",                  -- bInterval = never NAK
389
        -- other_speed_configuration hack
390
        X"07",
391
        -- 12 bytes padding
392
        X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"00",
393
        X"00", X"00", X"00", X"00" );
394
 
395
    constant descrom: t_byte_array(0 to (choose_int(HSSUPPORT, 191, 111))) :=
396
        descrom_pre(0 to choose_int(HSSUPPORT, 191, 111));
397
    signal descrom_start:   unsigned(choose_int(HSSUPPORT, 7, 6) downto 0);
398
    signal descrom_raddr:   unsigned(choose_int(HSSUPPORT, 7, 6) downto 0);
399
    signal descrom_rdat:    std_logic_vector(7 downto 0);
400
 
401
    -- RX buffer
402
    signal rxbuf:           t_byte_array(0 to (2**RXBUFSIZE_BITS-1));
403
    signal rxbuf_rdat:      std_logic_vector(7 downto 0);
404
 
405
    -- TX buffer
406
    signal txbuf:           t_byte_array(0 to (2**TXBUFSIZE_BITS-1));
407
    signal txbuf_rdat:      std_logic_vector(7 downto 0);
408
 
409
    -- Interface to usb_init
410
    signal usbi_usbrst :    std_logic;
411
    signal usbi_highspeed : std_logic;
412
    signal usbi_suspend :   std_logic;
413
 
414
    -- Interface to usb_packet
415
    signal usbp_chirpk :    std_logic;
416
    signal usbp_rxact :     std_logic;
417
    signal usbp_rxrdy :     std_logic;
418
    signal usbp_rxfin :     std_logic;
419
    signal usbp_rxdat :     std_logic_vector(7 downto 0);
420
    signal usbp_txact :     std_logic;
421
    signal usbp_txrdy :     std_logic;
422
    signal usbp_txdat :     std_logic_vector(7 downto 0);
423
 
424
    -- Interface to usb_transact
425
    signal usbt_in :        std_logic;
426
    signal usbt_out :       std_logic;
427
    signal usbt_setup :     std_logic;
428
    signal usbt_ping :      std_logic;
429
    signal usbt_fin :       std_logic;
430
    signal usbt_endpt :     std_logic_vector(3 downto 0);
431
    signal usbt_nak :       std_logic;
432
    signal usbt_stall :     std_logic;
433
    signal usbt_nyet :      std_logic;
434
    signal usbt_send :      std_logic;
435
    signal usbt_isync :     std_logic;
436
    signal usbt_osync :     std_logic;
437
    signal usbt_rxrdy :     std_logic;
438
    signal usbt_rxdat :     std_logic_vector(7 downto 0);
439
    signal usbt_txrdy :     std_logic;
440
    signal usbt_txdat :     std_logic_vector(7 downto 0);
441
 
442
    -- Interface to usb_control
443
    signal usbc_addr :      std_logic_vector(6 downto 0);
444
    signal usbc_confd :     std_logic;
445
    signal usbc_clr_in :    std_logic_vector(1 to 2);
446
    signal usbc_clr_out :   std_logic_vector(1 to 2);
447
    signal usbc_sethlt_in : std_logic_vector(1 to 2);
448
    signal usbc_sethlt_out: std_logic_vector(1 to 2);
449
    signal usbc_dscbusy :   std_logic;
450
    signal usbc_dscrd :     std_logic;
451
    signal usbc_dsctyp :    std_logic_vector(2 downto 0);
452
    signal usbc_dscinx :    std_logic_vector(7 downto 0);
453
    signal usbc_dscoff :    std_logic_vector(7 downto 0);
454
    signal usbc_dsclen :    std_logic_vector(7 downto 0);
455
    signal usbc_selfpowered : std_logic;
456
    signal usbc_in :        std_logic;
457
    signal usbc_out :       std_logic;
458
    signal usbc_setup :     std_logic;
459
    signal usbc_ping :      std_logic;
460
    signal usbc_nak :       std_logic;
461
    signal usbc_stall :     std_logic;
462
    signal usbc_nyet :      std_logic;
463
    signal usbc_send :      std_logic;
464
    signal usbc_isync :     std_logic;
465
    signal usbc_txdat :     std_logic_vector(7 downto 0);
466
 
467
    -- State machine
468
    type t_state is (
469
      ST_IDLE, ST_STALL, ST_NAK,
470
      ST_INSTART, ST_INSEND, ST_INDONE, ST_OUTRECV, ST_OUTNAK );
471
    signal s_state : t_state := ST_IDLE;
472
 
473
    -- Endpoint administration (PHY side).
474
    signal s_rxbuf_head :   unsigned(RXBUFSIZE_BITS-1 downto 0) := to_unsigned(0, RXBUFSIZE_BITS);
475
    signal s_rxbuf_tail :   unsigned(RXBUFSIZE_BITS-1 downto 0);
476
    signal s_txbuf_head :   unsigned(TXBUFSIZE_BITS-1 downto 0);
477
    signal s_txbuf_tail :   unsigned(TXBUFSIZE_BITS-1 downto 0) := to_unsigned(0, TXBUFSIZE_BITS);
478
    signal s_txbuf_stop :   unsigned(TXBUFSIZE_BITS-1 downto 0);
479
    signal s_bufptr :       unsigned(BUFPTR_SIZE-1 downto 0);
480
    signal s_txprev_full :  std_logic := '0';       -- Last transmitted packet was full-size
481
    signal s_txprev_acked : std_logic := '1';       -- Last trantsmitted packet was ack-ed.
482
    signal s_isync :        std_logic := '0';
483
    signal s_osync :        std_logic := '0';
484
    signal s_halt_in :      std_logic_vector(1 to 2) := "00";
485
    signal s_halt_out :     std_logic_vector(1 to 2) := "00";
486
    signal s_nyet :         std_logic := '0';
487
 
488
    -- Buffer state (application side).
489
    signal q_rxbuf_head :   unsigned(RXBUFSIZE_BITS-1 downto 0);
490
    signal q_rxbuf_tail :   unsigned(RXBUFSIZE_BITS-1 downto 0) := to_unsigned(0, RXBUFSIZE_BITS);
491
    signal q_txbuf_head :   unsigned(TXBUFSIZE_BITS-1 downto 0) := to_unsigned(0, TXBUFSIZE_BITS);
492
    signal q_txbuf_tail :   unsigned(TXBUFSIZE_BITS-1 downto 0);
493
 
494
    -- Control signals (PHY side).
495
    signal s_reset :        std_logic;
496
    signal s_txcork :       std_logic;
497
 
498
    -- Status signals (application side).
499
    signal q_usbrst :       std_logic;
500
    signal q_online :       std_logic;
501
    signal q_highspeed :    std_logic;
502
 
503
    -- Receive buffer logic (application side).
504
    signal q_rxval :        std_logic := '0';
505
    signal q_rxbuf_read :   std_logic;
506
    signal q_txbuf_rdy :    std_logic;
507
 
508
begin
509
 
510
    -- Check buffer size.
511
    assert ((not HSSUPPORT) or (RXBUFSIZE_BITS >= 10))
512
        report "High-speed device needs at least 1024 bytes RX buffer";
513
 
514
    -- Bus reset logic
515
    usb_init_inst : usb_init
516
        generic map (
517
            HSSUPPORT       => HSSUPPORT )
518
        port map (
519
            CLK             => CLK,
520
            RESET           => s_reset,
521
            I_USBRST        => usbi_usbrst,
522
            I_HIGHSPEED     => usbi_highspeed,
523
            I_SUSPEND       => usbi_suspend,
524
            P_CHIRPK        => usbp_chirpk,
525
            PHY_RESET       => PHY_RESET,
526
            PHY_LINESTATE   => PHY_LINESTATE,
527
            PHY_OPMODE      => PHY_OPMODE,
528
            PHY_XCVRSELECT  => PHY_XCVRSELECT,
529
            PHY_TERMSELECT  => PHY_TERMSELECT );
530
 
531
    -- Packet level logic
532
    usb_packet_inst : usb_packet
533
        port map (
534
            CLK             => CLK,
535
            RESET           => usbi_usbrst,
536
            P_CHIRPK        => usbp_chirpk,
537
            P_RXACT         => usbp_rxact,
538
            P_RXRDY         => usbp_rxrdy,
539
            P_RXFIN         => usbp_rxfin,
540
            P_RXDAT         => usbp_rxdat,
541
            P_TXACT         => usbp_txact,
542
            P_TXRDY         => usbp_txrdy,
543
            P_TXDAT         => usbp_txdat,
544
            PHY_DATAIN      => PHY_DATAIN,
545
            PHY_DATAOUT     => PHY_DATAOUT,
546
            PHY_TXVALID     => PHY_TXVALID,
547
            PHY_TXREADY     => PHY_TXREADY,
548
            PHY_RXACTIVE    => PHY_RXACTIVE,
549
            PHY_RXVALID     => PHY_RXVALID,
550
            PHY_RXERROR     => PHY_RXERROR );
551
 
552
    -- Transaction level logic
553
    usb_transact_inst : usb_transact
554
        generic map (
555
            HSSUPPORT       => HSSUPPORT )
556
        port map (
557
            CLK             => CLK,
558
            RESET           => usbi_usbrst,
559
            T_IN            => usbt_in,
560
            T_OUT           => usbt_out,
561
            T_SETUP         => usbt_setup,
562
            T_PING          => usbt_ping,
563
            T_FIN           => usbt_fin,
564
            T_ADDR          => usbc_addr,
565
            T_ENDPT         => usbt_endpt,
566
            T_NAK           => usbt_nak,
567
            T_STALL         => usbt_stall,
568
            T_NYET          => usbt_nyet,
569
            T_SEND          => usbt_send,
570
            T_ISYNC         => usbt_isync,
571
            T_OSYNC         => usbt_osync,
572
            T_RXRDY         => usbt_rxrdy,
573
            T_RXDAT         => usbt_rxdat,
574
            T_TXRDY         => usbt_txrdy,
575
            T_TXDAT         => usbt_txdat,
576
            I_HIGHSPEED     => usbi_highspeed,
577
            P_RXACT         => usbp_rxact,
578
            P_RXRDY         => usbp_rxrdy,
579
            P_RXFIN         => usbp_rxfin,
580
            P_RXDAT         => usbp_rxdat,
581
            P_TXACT         => usbp_txact,
582
            P_TXRDY         => usbp_txrdy,
583
            P_TXDAT         => usbp_txdat );
584
 
585
    -- Default control endpoint
586
    usb_control_inst : usb_control
587
        generic map (
588
            NENDPT          => 2 )
589
        port map (
590
            CLK             => CLK,
591
            RESET           => usbi_usbrst,
592
            C_ADDR          => usbc_addr,
593
            C_CONFD         => usbc_confd,
594
            C_CLRIN         => usbc_clr_in,
595
            C_CLROUT        => usbc_clr_out,
596
            C_HLTIN         => s_halt_in,
597
            C_HLTOUT        => s_halt_out,
598
            C_SHLTIN        => usbc_sethlt_in,
599
            C_SHLTOUT       => usbc_sethlt_out,
600
            C_DSCBUSY       => usbc_dscbusy,
601
            C_DSCRD         => usbc_dscrd,
602
            C_DSCTYP        => usbc_dsctyp,
603
            C_DSCINX        => usbc_dscinx,
604
            C_DSCOFF        => usbc_dscoff,
605
            C_DSCLEN        => usbc_dsclen,
606
            C_SELFPOWERED   => usbc_selfpowered,
607
            T_IN            => usbc_in,
608
            T_OUT           => usbc_out,
609
            T_SETUP         => usbc_setup,
610
            T_PING          => usbc_ping,
611
            T_FIN           => usbt_fin,
612
            T_NAK           => usbc_nak,
613
            T_STALL         => usbc_stall,
614
            T_NYET          => usbc_nyet,
615
            T_SEND          => usbc_send,
616
            T_ISYNC         => usbc_isync,
617
            T_OSYNC         => usbt_osync,
618
            T_RXRDY         => usbt_rxrdy,
619
            T_RXDAT         => usbt_rxdat,
620
            T_TXRDY         => usbt_txrdy,
621
            T_TXDAT         => usbc_txdat );
622
 
623
    -- Assign usb_serial output signals.
624
    USBRST      <= q_usbrst;
625
    HIGHSPEED   <= q_highspeed;
626
    SUSPEND     <= usbi_suspend;
627
    ONLINE      <= q_online;
628
    RXVAL       <= q_rxval;
629
    RXDAT       <= rxbuf_rdat;
630
    RXLEN       <= std_logic_vector(q_rxbuf_head - q_rxbuf_tail);
631
    TXRDY       <= q_txbuf_rdy;
632
    TXROOM      <= std_logic_vector(q_txbuf_tail - q_txbuf_head - 1);
633
 
634
    -- Assign usb_control input signals
635
    usbc_in     <= usbt_in    when (usbt_endpt = "0000") else '0';
636
    usbc_out    <= usbt_out   when (usbt_endpt = "0000") else '0';
637
    usbc_setup  <= usbt_setup when (usbt_endpt = "0000") else '0';
638
    usbc_ping   <= usbt_ping  when (usbt_endpt = "0000") else '0';
639
    usbc_selfpowered <= '1'   when SELFPOWERED else '0';
640
 
641
    -- Assign usb_transact input lines
642
    usbt_nak    <= usbc_nak   when (usbt_endpt = "0000") else
643
                   '1'        when (s_state = ST_NAK) else
644
                   '0';
645
    usbt_stall  <= usbc_stall when (usbt_endpt = "0000") else
646
                   '1'        when (s_state = ST_STALL) else
647
                   '0';
648
    usbt_nyet   <= usbc_nyet  when (usbt_endpt = "0000") else
649
                   s_nyet;
650
    usbt_send   <= usbc_send  when (usbt_endpt = "0000") else
651
                   '1'        when (s_state = ST_INSEND) else
652
                   '0';
653
    usbt_isync  <= usbc_isync when (usbt_endpt = "0000") else
654
                   s_isync;
655
    usbt_txdat  <= usbc_txdat when (usbt_endpt = "0000" and usbc_dscbusy = '0') else
656
                   descrom_rdat when (usbt_endpt = "0000") else
657
                   txbuf_rdat;
658
 
659
    -- Buffer logic.
660
    q_rxbuf_read <= (RXRDY or (not q_rxval)) when (q_rxbuf_tail /= q_rxbuf_head) else '0';
661
    q_txbuf_rdy <= '1' when (q_txbuf_head + 1 /= q_txbuf_tail) else '0';
662
 
663
    -- Connection between PHY-side and application-side signals.
664
    -- This could be a good place to insert clock domain crossing.
665
    q_rxbuf_head <= s_rxbuf_head;
666
    s_rxbuf_tail <= q_rxbuf_tail;
667
    s_txbuf_head <= q_txbuf_head;
668
    q_txbuf_tail <= s_txbuf_tail;
669
    s_txcork    <= TXCORK;
670
    s_reset     <= RESET;
671
    q_online    <= usbc_confd;
672
    q_usbrst    <= usbi_usbrst;
673
    q_highspeed <= usbi_highspeed;
674
 
675
    -- Lookup address/length of the selected descriptor (combinatorial).
676
    process (usbc_dsctyp, usbc_dscinx, usbi_highspeed)
677
        constant slen: integer := descrom_start'length;
678
        constant nlen: integer := USBC_DSCLEN'length;
679
        variable s: unsigned((slen-1) downto 0);
680
        variable n: unsigned((nlen-1) downto 0);
681
    begin
682
        s := to_unsigned(0, slen);
683
        n := to_unsigned(0, nlen);
684
        case usbc_dsctyp is
685
            when "001" =>   -- device descriptor
686
                s := to_unsigned(DESC_DEV_ADDR, slen);
687
                n := to_unsigned(DESC_DEV_LEN, nlen);
688
            when "010" =>   -- configuration descriptor
689
                if usbc_dscinx = X"00" then
690
                    if HSSUPPORT and (usbi_highspeed = '1') then
691
                        s := to_unsigned(DESC_HSCFG_ADDR, slen);
692
                        n := to_unsigned(DESC_HSCFG_LEN, nlen);
693
                    else
694
                        s := to_unsigned(DESC_FSCFG_ADDR, slen);
695
                        n := to_unsigned(DESC_FSCFG_LEN, nlen);
696
                    end if;
697
                end if;
698
            when "110" =>   -- device qualifier
699
                if HSSUPPORT then
700
                    s := to_unsigned(DESC_QUAL_ADDR, slen);
701
                    n := to_unsigned(DESC_QUAL_LEN, nlen);
702
                end if;
703
            when "111" =>   -- other speed configuration
704
                if HSSUPPORT and (usbc_dscinx = X"00") then
705
                    if usbi_highspeed = '1' then
706
                        s := to_unsigned(DESC_FSCFG_ADDR, slen);
707
                        n := to_unsigned(DESC_FSCFG_LEN, nlen);
708
                    else
709
                        s := to_unsigned(DESC_HSCFG_ADDR, slen);
710
                        n := to_unsigned(DESC_HSCFG_LEN, nlen);
711
                    end if;
712
                end if;
713
            when others =>
714
                -- unsupported descriptor type
715
        end case;
716
        descrom_start <= s;
717
        usbc_dsclen   <= std_logic_vector(n);
718
    end process;
719
 
720
    -- Main application-side synchronous process.
721
    process is
722
    begin
723
        wait until rising_edge(CLK);
724
 
725
        if RESET = '1' then
726
 
727
            -- Reset this entity.
728
            q_rxbuf_tail <= to_unsigned(0, RXBUFSIZE_BITS);
729
            q_txbuf_head <= to_unsigned(0, TXBUFSIZE_BITS);
730
            q_rxval      <= '0';
731
 
732
        else
733
 
734
            -- Read data from the RX buffer.
735
            if q_rxbuf_read = '1' then
736
                -- The RAM buffer reads a byte in this cycle.
737
                q_rxbuf_tail    <= q_rxbuf_tail + 1;
738
                q_rxval         <= '1';
739
            elsif RXRDY = '1' then
740
                -- Byte consumed by application; no new data yet.
741
                q_rxval         <= '0';
742
            end if;
743
 
744
            -- Write data to the TX buffer.
745
            if (TXVAL = '1') and (q_txbuf_rdy = '1') then
746
                -- The RAM buffer writes a byte in this cycle.
747
                q_txbuf_head    <= q_txbuf_head + 1;
748
            end if;
749
 
750
        end if;
751
 
752
    end process;
753
 
754
    -- Main PHY-side synchronous process.
755
    process is
756
        variable v_max_txsize :     unsigned(TXBUFSIZE_BITS-1 downto 0);
757
        variable v_rxbuf_len_lim :  unsigned(RXBUFSIZE_BITS-1 downto 0);
758
        variable v_rxbuf_tmp_head : unsigned(RXBUFSIZE_BITS-1 downto 0);
759
        variable v_rxbuf_pktroom :  std_logic;
760
    begin
761
        wait until rising_edge(CLK);
762
 
763
        -- Determine the maximum packet size we can transmit.
764
        if HSSUPPORT and usbi_highspeed = '1' then
765
            v_max_txsize := to_unsigned(MAX_HSPACKET_SIZE, TXBUFSIZE_BITS);
766
        else
767
            v_max_txsize := to_unsigned(MAX_FSPACKET_SIZE, TXBUFSIZE_BITS);
768
        end if;
769
 
770
        -- Determine if there is room for another packet in the RX buffer.
771
        -- We need room for the largest possible incoming packet, plus
772
        -- two CRC bytes.
773
        if HSSUPPORT then
774
            v_rxbuf_len_lim := to_unsigned(2**RXBUFSIZE_BITS - MAX_HSPACKET_SIZE - 2, RXBUFSIZE_BITS);
775
        else
776
            v_rxbuf_len_lim := to_unsigned(2**RXBUFSIZE_BITS - MAX_FSPACKET_SIZE - 2, RXBUFSIZE_BITS);
777
        end if;
778
        if HSSUPPORT and s_state = ST_OUTRECV then
779
            -- Currently receiving a packet; compare against the temporary
780
            -- tail pointer to decide NYET vs ACK.
781
            v_rxbuf_tmp_head := resize(s_bufptr, RXBUFSIZE_BITS);
782
        else
783
            -- Not receiving a packet (or NYET not supported);
784
            -- compare against the tail pointer to decide NAK vs ACK.
785
            v_rxbuf_tmp_head := s_rxbuf_head;
786
        end if;
787
        if v_rxbuf_tmp_head - s_rxbuf_tail < v_rxbuf_len_lim then
788
            v_rxbuf_pktroom := '1';
789
        else
790
            v_rxbuf_pktroom := '0';
791
        end if;
792
 
793
        -- State machine
794
        if s_reset = '1' then
795
 
796
            -- Reset this entity.
797
            s_state         <= ST_IDLE;
798
            s_rxbuf_head    <= to_unsigned(0, RXBUFSIZE_BITS);
799
            s_txbuf_tail    <= to_unsigned(0, TXBUFSIZE_BITS);
800
            s_txprev_full   <= '0';
801
            s_txprev_acked  <= '1';
802
            s_isync         <= '0';
803
            s_osync         <= '0';
804
            s_halt_in       <= "00";
805
            s_halt_out      <= "00";
806
 
807
        elsif usbi_usbrst = '1' then
808
 
809
            -- Reset protocol state.
810
            s_state         <= ST_IDLE;
811
            s_txprev_full   <= '0';
812
            s_txprev_acked  <= '1';
813
            s_isync         <= '0';
814
            s_osync         <= '0';
815
            s_halt_in       <= "00";
816
            s_halt_out      <= "00";
817
 
818
        else
819
 
820
            case s_state is
821
 
822
                when ST_IDLE =>
823
                    -- Idle; wait for a transaction
824
                    s_nyet <= '0';
825
                    if (usbt_endpt = data_endpt) and (usbt_in = '1') then
826
                        -- Start of IN transaction
827
                        if s_halt_in(1) = '1' then
828
                            -- Endpoint halted
829
                            s_state  <= ST_STALL;
830
                        elsif (s_txbuf_tail /= s_txbuf_head and s_txcork = '0') or s_txprev_full = '1' then
831
                            -- Prepare to send data
832
                            s_bufptr <= resize(s_txbuf_tail, s_bufptr'length);
833
                            s_state  <= ST_INSTART;
834
                        else
835
                            -- We have no data to send
836
                            s_state  <= ST_NAK;
837
                        end if;
838
                    elsif (usbt_endpt = data_endpt) and (usbt_out = '1') then
839
                        -- Start of OUT transaction
840
                        if s_halt_out(1) = '1' then
841
                            -- Endpoint halted
842
                            s_state  <= ST_STALL;
843
                        elsif v_rxbuf_pktroom = '1' then
844
                            -- Prepare to receive data
845
                            s_bufptr <= resize(s_rxbuf_head, s_bufptr'length);
846
                            s_state  <= ST_OUTRECV;
847
                        else
848
                            -- We have no room to store a new packet
849
                            s_state  <= ST_OUTNAK;
850
                        end if;
851
                    elsif HSSUPPORT and (usbt_endpt = data_endpt) and (usbt_ping = '1') then
852
                         -- Start of PING transaction
853
                        if v_rxbuf_pktroom = '1' then
854
                            -- There is room in the RX buffer for another packet; do nothing (ACK).
855
                            s_state  <= ST_IDLE;
856
                        else
857
                            -- There is no room in the RX buffer; respond with NAK.
858
                            s_state  <= ST_NAK;
859
                        end if;
860
                    elsif (usbt_endpt = notify_endpt) and (usbt_in = '1') then
861
                        -- The notify endpoint simply NAK's all IN transactions
862
                        if s_halt_in(2) = '1' then
863
                            -- Endpoint halted
864
                            s_state <= ST_STALL;
865
                        else
866
                            s_state <= ST_NAK;
867
                        end if;
868
                    end if;
869
 
870
                    -- Reset sync bits when the control endpoint tells us.
871
                    s_isync <= s_isync and (not usbc_clr_in(1));
872
                    s_osync <= s_osync and (not usbc_clr_out(1));
873
 
874
                    -- Set/reset halt bits when the control endpoint tells us.
875
                    s_halt_in(1)  <= (s_halt_in(1) or usbc_sethlt_in(1)) and (not usbc_clr_in(1));
876
                    s_halt_in(2)  <= (s_halt_in(2) or usbc_sethlt_in(2)) and (not usbc_clr_in(2));
877
                    s_halt_out(1) <= (s_halt_out(1) or usbc_sethlt_out(1)) and (not usbc_clr_out(1));
878
 
879
                when ST_STALL =>
880
                    -- Wait for end of transaction
881
                    if (usbt_in = '0') and (usbt_out = '0') and (usbt_ping = '0') then
882
                        s_state <= ST_IDLE;
883
                    end if;
884
 
885
                when ST_NAK =>
886
                    -- Wait for end of transaction
887
                    if (usbt_in = '0') and (usbt_out = '0') and (usbt_ping = '0') then
888
                        s_state <= ST_IDLE;
889
                    end if;
890
 
891
                when ST_INSTART =>
892
                    -- Prepare to send data; read first byte from memory.
893
                    if usbt_in = '0' then
894
                        -- Transaction canceled.
895
                        s_state <= ST_IDLE;
896
                    elsif (s_txbuf_tail = s_txbuf_head) or
897
                          (s_txprev_acked = '0' and resize(s_bufptr, TXBUFSIZE_BITS) = s_txbuf_stop) or
898
                          (s_txprev_acked = '1' and s_txcork = '1') then
899
                        -- The TX buffer is empty, or a previous empty packet
900
                        -- is unacknowledged, or the TX buffer is corked;
901
                        -- must send an empty packet.
902
                        s_state <= ST_INDONE;
903
                    else
904
                        -- Send a non-empty packet.
905
                        if s_txprev_acked = '1' then
906
                            -- Set up a size limit for this packet.
907
                            s_txbuf_stop <= s_txbuf_tail + v_max_txsize;
908
                        end if;
909
                        s_bufptr <= s_bufptr + 1;
910
                        s_state <= ST_INSEND;
911
                    end if;
912
 
913
                when ST_INSEND =>
914
                    -- Sending data
915
                    if usbt_in = '0' then
916
                        -- Transaction canceled.
917
                        s_state <= ST_IDLE;
918
                    elsif usbt_txrdy = '1' then
919
                        -- Need to provide the next data byte;
920
                        -- stop when we reach the end of the TX buffer;
921
                        -- stop when we reach the packet size limit.
922
                        if (resize(s_bufptr, TXBUFSIZE_BITS) = s_txbuf_head) or
923
                           (resize(s_bufptr, TXBUFSIZE_BITS) = s_txbuf_stop) then
924
                            -- No more bytes
925
                            s_state <= ST_INDONE;
926
                        else
927
                            s_bufptr <= s_bufptr + 1;
928
                        end if;
929
                    end if;
930
 
931
                when ST_INDONE =>
932
                    -- Done sending packet; wait for ACK.
933
                    if usbt_in = '0' then
934
                        -- No acknowledgement
935
                        s_txprev_acked <= '0';
936
                        -- Set limit for next packet to the same point
937
                        s_txbuf_stop <= resize(s_bufptr, TXBUFSIZE_BITS);
938
                        -- Done
939
                        s_state <= ST_IDLE;
940
                    elsif usbt_fin = '1' then
941
                        -- Got acknowledgement
942
                        s_txprev_acked <= '1';
943
                        -- Update buffer tail
944
                        s_txbuf_tail <= resize(s_bufptr, TXBUFSIZE_BITS);
945
                        -- Flip sync bit
946
                        s_isync <= not s_isync;
947
                        -- Remember if this was a full-sized packet.
948
                        if s_txbuf_tail + v_max_txsize = resize(s_bufptr, TXBUFSIZE_BITS) then
949
                            s_txprev_full <= '1';
950
                        else
951
                            s_txprev_full <= '0';
952
                        end if;
953
                        -- Done
954
                        s_state <= ST_IDLE;
955
                    end if;
956
 
957
                when ST_OUTRECV =>
958
                    -- Receiving data
959
                    if usbt_out = '0' then
960
                        -- Transaction ended.
961
                        -- If the transaction was succesful, usbt_fin has been
962
                        -- asserted in the previous cycle and has triggered
963
                        -- an update of s_rxbuf_head.
964
                        s_state <= ST_IDLE;
965
                    elsif (usbt_fin = '1') and (usbt_osync = s_osync) then
966
                        -- Good packet received; discard CRC bytes
967
                        s_rxbuf_head <= resize(s_bufptr, RXBUFSIZE_BITS) - 2;
968
                        s_osync <= not s_osync;
969
                    elsif usbt_rxrdy = '1' then
970
                        -- Got data byte
971
                        s_bufptr <= s_bufptr + 1;
972
                        if HSSUPPORT then
973
                            -- Set NYET if there is no room to receive
974
                            -- another packet after this one.
975
                            s_nyet <= not v_rxbuf_pktroom;
976
                        end if;
977
                    end if;
978
 
979
                when ST_OUTNAK =>
980
                    -- Receiving data while we don't have room to store it
981
                    if usbt_out = '0' then
982
                        -- End of transaction
983
                        s_state <= ST_IDLE;
984
                    elsif (usbt_rxrdy = '1') and (usbt_osync = s_osync) then
985
                        -- This is a new (non-duplicate) packet, but we can
986
                        -- not store it; so respond with NAK.
987
                        s_state <= ST_NAK;
988
                    end if;
989
 
990
            end case;
991
 
992
        end if;
993
    end process;
994
 
995
    -- It is always a fight to get the synthesizer to infer block RAM.
996
    -- The problem is we need dual port RAM with read-enable signals.
997
    -- The recommended coding style, with registered read addresses,
998
    -- does not work in this case.
999
    -- The code below generates three RAM blocks on the Xilinx Spartan-3,
1000
    -- but it is doubtful whether it will work on other FPGA families.
1001
 
1002
    -- Write to RX buffer.
1003
    process (CLK) is
1004
    begin
1005
        if rising_edge(CLK) then
1006
            if s_state = ST_OUTRECV and usbt_rxrdy = '1' then
1007
                rxbuf(to_integer(resize(s_bufptr, RXBUFSIZE_BITS))) <= usbt_rxdat;
1008
            end if;
1009
        end if;
1010
    end process;
1011
 
1012
    -- Read from RX buffer.
1013
    process (CLK) is
1014
    begin
1015
        if rising_edge(CLK) then
1016
            if q_rxbuf_read = '1' then
1017
                rxbuf_rdat <= rxbuf(to_integer(q_rxbuf_tail));
1018
            end if;
1019
        end if;
1020
    end process;
1021
 
1022
    -- Write to TX buffer.
1023
    process (CLK) is
1024
    begin
1025
        if rising_edge(CLK) then
1026
            if TXVAL = '1' then
1027
                txbuf(to_integer(q_txbuf_head)) <= TXDAT;
1028
            end if;
1029
        end if;
1030
    end process;
1031
 
1032
    -- Read from TX buffer.
1033
    process (CLK) is
1034
    begin
1035
        if rising_edge(CLK) then
1036
            if (usbt_txrdy = '1') or (s_state = ST_INSTART) then
1037
                txbuf_rdat <= txbuf(to_integer(resize(s_bufptr, TXBUFSIZE_BITS)));
1038
            end if;
1039
        end if;
1040
    end process;
1041
 
1042
    -- Read from descriptor memory.
1043
    process (CLK) is
1044
    begin
1045
        if rising_edge(CLK) then
1046
            if usbc_dscrd = '1' then
1047
                if HSSUPPORT and unsigned(usbc_dscoff) = 1 and usbc_dsctyp = "111" then
1048
                    -- Disguise the configuration descriptor as an
1049
                    -- other_speed_configuration descriptor.
1050
                    descrom_raddr <= to_unsigned(DESC_OTHERSPEED_ADDR, descrom_raddr'length);
1051
                else
1052
                    descrom_raddr <= descrom_start + resize(unsigned(usbc_dscoff), descrom_raddr'length);
1053
                end if;
1054
            end if;
1055
        end if;
1056
    end process;
1057
    assert to_integer(descrom_raddr) < descrom_rdat'length;
1058
    descrom_rdat <= descrom(to_integer(descrom_raddr));
1059
 
1060
end architecture usb_serial_arch;
1061
 

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