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[/] [openhmc/] [trunk/] [openHMC/] [sim/] [UVC/] [axi4_stream/] [sv/] [axi4_stream_slave_driver.sv] - Blame information for rev 15

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1 12 juko
/*
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 *                              .--------------. .----------------. .------------.
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 *                             | .------------. | .--------------. | .----------. |
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 *                             | | ____  ____ | | | ____    ____ | | |   ______ | |
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 *                             | ||_   ||   _|| | ||_   \  /   _|| | | .' ___  || |
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 *       ___  _ __   ___ _ __  | |  | |__| |  | | |  |   \/   |  | | |/ .'   \_|| |
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 *      / _ \| '_ \ / _ \ '_ \ | |  |  __  |  | | |  | |\  /| |  | | || |       | |
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 *       (_) | |_) |  __/ | | || | _| |  | |_ | | | _| |_\/_| |_ | | |\ `.___.'\| |
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 *      \___/| .__/ \___|_| |_|| ||____||____|| | ||_____||_____|| | | `._____.'| |
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 *           | |               | |            | | |              | | |          | |
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 *           |_|               | '------------' | '--------------' | '----------' |
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 *                              '--------------' '----------------' '------------'
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 *
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 *  openHMC - An Open Source Hybrid Memory Cube Controller
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 *  (C) Copyright 2014 Computer Architecture Group - University of Heidelberg
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 *  www.ziti.uni-heidelberg.de
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 *  B6, 26
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 *  68159 Mannheim
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 *  Germany
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 *
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 *  Contact: openhmc@ziti.uni-heidelberg.de
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 *  http://ra.ziti.uni-heidelberg.de/openhmc
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 *
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 *   This source file is free software: you can redistribute it and/or modify
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 *   it under the terms of the GNU Lesser General Public License as published by
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 *   the Free Software Foundation, either version 3 of the License, or
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 *   (at your option) any later version.
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 *
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 *   This source file is distributed in the hope that it will be useful,
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 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *   GNU Lesser General Public License for more details.
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 *
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 *   You should have received a copy of the GNU Lesser General Public License
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 *   along with this source file.  If not, see .
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 *
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 *
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 */
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`ifndef AXI4_STREAM_SLAVE_DRIVER_SV
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`define AXI4_STREAM_SLAVE_DRIVER_SV
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//-- After this works for HMC, generalize for PCIe as well
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class axi4_stream_slave_driver #(parameter DATA_BYTES = 16, parameter TUSER_WIDTH = 16) extends uvm_driver #(hmc_packet);
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        axi4_stream_config axi4_stream_cfg;
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        rand int block_cycles;
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        constraint c_block_cycles {
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                soft block_cycles dist{0:/30,[1:5]:/41, [6:15]:/25, [16:10000]:/4};
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        }
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        virtual interface axi4_stream_if #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)) vif;
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        `uvm_component_param_utils_begin(axi4_stream_slave_driver #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)))
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                `uvm_field_object(axi4_stream_cfg, UVM_DEFAULT)
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        `uvm_component_utils_end
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        function new(string name="axi4_stream_slave_driver", uvm_component parent);
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                super.new(name,parent);
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        endfunction : new
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        function void build_phase(uvm_phase phase);
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                super.build_phase(phase);
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                if(uvm_config_db#(virtual interface axi4_stream_if #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)))::get(this, "", "vif",vif) ) begin
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                        this.vif = vif;
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                end else begin
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                        `uvm_fatal(get_type_name(),"vif is not set")
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                end
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                if (!uvm_config_db#(axi4_stream_config)::get(this, "", "axi4_stream_cfg", axi4_stream_cfg)) begin
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                        uvm_report_fatal(get_type_name(), $psprintf("axi4_stream_cfg not set via config_db"));
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                end
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        endfunction : build_phase
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        task run_phase(uvm_phase phase);
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                super.run_phase(phase);
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                forever begin
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                        if(vif.ARESET_N !== 1) begin
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                                vif.TREADY <= 1'b0;
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                                @(posedge vif.ARESET_N);
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                        end
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                        fork
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                                forever begin
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                                        //-- Accept packets
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                                        @(posedge vif.ACLK);
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                                        if(axi4_stream_cfg.open_rsp_mode==UVM_ACTIVE) begin
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                                                vif.TREADY <= 1'b1;
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                                        end else begin
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                                        if (vif.TVALID)
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                                                randcase
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                                                        3 : vif.TREADY <= 1;
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                                                        1 : vif.TREADY <= 0;
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                                                endcase
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                                        else
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                                                randcase
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                                                        1 : vif.TREADY <= 1;
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                                                        1 : vif.TREADY <= 0;
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                                                        1 : begin               //-- hold tready at least until tvalid is set
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                                                                        vif.TREADY <= 0;
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                                                                        void'(this.randomize());
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                                                                        while (vif.TVALID == 0)
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                                                                                @(posedge vif.ACLK);
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                                                                        repeat(block_cycles) @(posedge vif.ACLK); //-- wait 2 additional cycles
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                                                                end
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                                                endcase
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                                        end
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                                end
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                                begin //-- Asynchronous reset
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                                        @(negedge vif.ARESET_N);
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                                end
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                        join_any
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                        disable fork;
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                end
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        endtask : run_phase
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endclass : axi4_stream_slave_driver
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`endif // AXI4_STREAM_SLAVE_DRIVER_SV
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