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[/] [pairing/] [trunk/] [rtl/] [f3.v] - Blame information for rev 31

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1 24 homer.xing
/*
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    Copyright 2011, City University of Hong Kong
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    Author is Homer (Dongsheng) Xing.
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    This file is part of Tate Bilinear Pairing Core.
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    Tate Bilinear Pairing Core is free software: you can redistribute it and/or modify
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    it under the terms of the GNU Lesser General Public License as published by
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    the Free Software Foundation, either version 3 of the License, or
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    (at your option) any later version.
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    Tate Bilinear Pairing Core is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU Lesser General Public License for more details.
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    You should have received a copy of the GNU Lesser General Public License
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    along with Tate Bilinear Pairing Core.  If not, see http://www.gnu.org/licenses/lgpl.txt
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*/
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// f3_add: C == A+B (mod 3)
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module f3_add(A, B, C);
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    input [1:0] A, B;
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    output [1:0] C;
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    wire a0, a1, b0, b1, c0, c1;
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    assign {a1, a0} = A;
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    assign {b1, b0} = B;
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    assign C = {c1, c0};
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    assign c0 = ( a0 & ~a1 & ~b0 & ~b1) |
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                (~a0 & ~a1 &  b0 & ~b1) |
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                (~a0 &  a1 & ~b0 &  b1) ;
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    assign c1 = (~a0 &  a1 & ~b0 & ~b1) |
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                ( a0 & ~a1 &  b0 & ~b1) |
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                (~a0 & ~a1 & ~b0 &  b1) ;
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endmodule
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// f3_sub: C == A-B (mod 3)
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module f3_sub(A, B, C);
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    input [1:0] A, B;
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    output [1:0] C;
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    f3_add m1(A, {B[0], B[1]}, C);
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endmodule
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// f3_mult: C = A*B (mod 3)
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module f3_mult(A, B, C);
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    input [1:0] A;
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    input [1:0] B;
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    output [1:0] C;
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    wire a0, a1, b0, b1;
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    assign {a1, a0} = A;
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    assign {b1, b0} = B;
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    assign C[0] = (~a1 & a0 & ~b1 & b0) | (a1 & ~a0 & b1 & ~b0);
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    assign C[1] = (~a1 & a0 & b1 & ~b0) | (a1 & ~a0 & ~b1 & b0);
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endmodule
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// c == a+1 (mod 3)
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module f3_add1(a, c);
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    input [1:0] a;
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    output [1:0] c;
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    assign c[0] = (~a[0]) & (~a[1]);
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    assign c[1] = a[0] & (~a[1]);
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endmodule
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// c == a-1 (mod 3)
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module f3_sub1(a, c);
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    input [1:0] a;
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    output [1:0] c;
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    assign c[0] = (~a[0]) & a[1];
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    assign c[1] = (~a[0]) & (~a[1]);
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endmodule

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