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[/] [pcie_ds_dma/] [trunk/] [projects/] [ac701_a200t_core/] [src/] [testbench/] [test_pkg.vhd] - Blame information for rev 48

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1 47 dsmv 
---------------------------------------------------------------------------------------------------
2 
--
3 
-- Title       : test_pkg.vhd
4 
-- Author      : Dmitry Smekhov
5 
-- Company     : Instrumental System
6 
--
7 
-- Version     : 1.0
8 
--
9 
---------------------------------------------------------------------------------------------------
10 
--
11 
-- Description : Пакет для тестирования ambpex5.
12 
--
13 
---------------------------------------------------------------------------------------------------
14 
 
15 
 
16 
library ieee;
17 
use ieee.std_logic_1164.all;
18 
use ieee.std_logic_arith.all;
19 
use ieee.std_logic_unsigned.all;
20 
use ieee.std_logic_textio.all;
21 
use std.textio.all;
22 
 
23 
 
24 
library work;
25 
use work.cmd_sim_pkg.all;
26 
use work.block_pkg.all;
27 
use work.trd_pkg.all;
28 
 
29 
 
30 
 
31 
package test_pkg is
32 
 
33 
--! Инициализация теста
34 
procedure test_init(
35 
                fname: in string        --! имя файла отчёта
36 
        );
37 
 
38 
--! Завершение теста
39 
procedure test_close;
40 
 
41 
 
42 
 
43 
--! Запуск DMA с неправильным дескриптором
44 
procedure test_dsc_incorrect (
45 
                signal  cmd:    out bh_cmd; --! команда
46 
                signal  ret:    in  bh_ret  --! ответ
47 
                );
48 
 
49 
--! Запуск DMA на приём одного блока 4 кБ
50 
procedure test_read_4kb (
51 
                signal  cmd:    out bh_cmd; --! команда
52 
                signal  ret:    in  bh_ret  --! ответ
53 
                );
54 
 
55 
 
56 
--! Чтение 8 кБ из тетрады DIO_IN
57 
procedure test_adm_read_8kb (
58 
                signal  cmd:    out bh_cmd; --! команда
59 
                signal  ret:    in  bh_ret  --! ответ
60 
                );
61 
 
62 
--! Проверка обращений к блоку MAIN
63 
procedure test_block_main (
64 
                signal  cmd:    out bh_cmd; --! команда
65 
                signal  ret:    in  bh_ret  --! ответ
66 
                );
67 
 
68 
--! Чтение 16 кБ с использованием двух блоков дескрипторов
69 
procedure test_adm_read_16kb (
70 
                signal  cmd:    out bh_cmd; --! команда
71 
                signal  ret:    in  bh_ret  --! ответ
72 
                );
73 
 
74 
--! Запись 16 кБ с использованием двух блоков дескрипторов
75 
procedure test_adm_write_16kb (
76 
                signal  cmd:    out bh_cmd; --! команда
77 
                signal  ret:    in  bh_ret  --! ответ
78 
                );
79 
 
80 
end package     test_pkg;
81 
 
82 
package body test_pkg is
83 
 
84 
        FILE   log: text;
85 
 
86 
        shared variable cnt_ok, cnt_error: integer;
87 
 
88 
        -- Инициализация теста
89 
        procedure test_init(
90 
                fname: in string                                        -- имя файла отчёта
91 
                ) is
92 
        begin
93 
 
94 
                file_open( log, fname, WRITE_MODE );
95 
                cnt_ok:=0;
96 
                cnt_error:=0;
97 
 
98 
        end test_init;
99 
 
100 
        -- Завершение теста
101 
        procedure test_close is
102 
                variable str : LINE;            -- pointer to string
103 
        begin
104 
 
105 
                std.textio.write( str, string'(" " ));
106 
                writeline( log, str );
107 
                writeline( log, str );
108 
 
109 
                write( str, string'("Проверка завершена" ));
110 
                writeline( log, str );
111 
                write( str, string'("Число успешных тестов:  " ));
112 
                write( str, cnt_ok );
113 
                writeline( log, str );
114 
                write( str, string'("Число ошибочных тестов: " ));
115 
                write( str, cnt_error );
116 
                writeline( log, str );
117 
 
118 
 
119 
                file_close( log );
120 
 
121 
        end test_close;
122 
 
123 
 
124 
 
125 
--! Запуск DMA с неправильным дескриптором
126 
procedure test_dsc_incorrect (
127 
                signal  cmd:    out bh_cmd; --! команда
128 
                signal  ret:    in  bh_ret  --! ответ
129 
                )
130 
is
131 
 
132 
variable        adr             : std_logic_vector( 31 downto 0 );
133 
variable        data    : std_logic_vector( 31 downto 0 );
134 
variable        str             : line;
135 
begin
136 
 
137 
        write( str, string'("TEST_DSC_INCORRECT" ));
138 
        writeline( log, str );
139 
 
140 
        ---- Формирование блока дескрипторов ---
141 
        for ii in 0 to 127 loop
142 
                adr:= x"00100000";
143 
                adr:=adr + ii*4;
144 
                int_mem_write( cmd, ret, adr,  x"00000000" );
145 
        end loop;
146 
 
147 
        int_mem_write( cmd, ret, x"00100000",  x"03020100" );
148 
        int_mem_write( cmd, ret, x"001001FC",  x"FF00AA00" );
149 
 
150 
        ---- Программирование канала DMA ----
151 
        block_write( cmd, ret, 4, 8, x"00000027" );             -- DMA_MODE
152 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
153 
 
154 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
155 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
156 
        block_write( cmd, ret, 4, 23, x"0000A400" );    -- LOCAL_ADR
157 
 
158 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
159 
 
160 
        wait for 10 us;
161 
 
162 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
163 
 
164 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
165 
        if( data( 15 downto 0 )=x"A021" ) then
166 
                write( str, string'(" - Ok" ));
167 
                cnt_ok := cnt_ok + 1;
168 
        else
169 
                write( str, string'(" - Error" ));
170 
                cnt_error := cnt_error + 1;
171 
        end if;
172 
 
173 
        writeline( log, str );
174 
 
175 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
176 
 
177 
end test_dsc_incorrect;
178 
 
179 
 
180 
--! Запуск DMA приём одного блока 4 кБ
181 
procedure test_read_4kb (
182 
                signal  cmd:    out bh_cmd; --! команда
183 
                signal  ret:    in  bh_ret  --! ответ
184 
                )
185 
is
186 
 
187 
variable        adr                             : std_logic_vector( 31 downto 0 );
188 
variable        data                    : std_logic_vector( 31 downto 0 );
189 
variable        str                             : line;
190 
 
191 
variable        error                   : integer:=0;
192 
variable        dma_complete    : integer;
193 
 
194 
begin
195 
 
196 
        write( str, string'("TEST_READ_4KB" ));
197 
        writeline( log, str );
198 
 
199 
        ---- Формирование блока дескрипторов ---
200 
        for ii in 0 to 127 loop
201 
                adr:= x"00100000";
202 
                adr:=adr + ii*4;
203 
                int_mem_write( cmd, ret, adr,  x"00000000" );
204 
        end loop;
205 
 
206 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
207 
        int_mem_write( cmd, ret, x"00100004",  x"00000100" );
208 
 
209 
 
210 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
211 
        int_mem_write( cmd, ret, x"001001FC",  x"762C4953" );
212 
 
213 
        ---- Программирование канала DMA ----
214 
        block_write( cmd, ret, 4, 8, x"00000025" );             -- DMA_MODE
215 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
216 
 
217 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
218 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
219 
        block_write( cmd, ret, 4, 23, x"0000A400" );    -- LOCAL_ADR
220 
 
221 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
222 
 
223 
        wait for 20 us;
224 
 
225 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
226 
 
227 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
228 
        if( data( 8 )='1' ) then
229 
                write( str, string'(" - Дескриптор правильный" ));
230 
        else
231 
                write( str, string'(" - Ошибка чтения дескриптора" ));
232 
                error := error + 1;
233 
        end if;
234 
 
235 
        writeline( log, str );
236 
 
237 
        if( error=0 ) then
238 
 
239 
                ---- Ожидание завершения DMA ----
240 
                dma_complete := 0;
241 
                for ii in 0 to 100 loop
242 
 
243 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
244 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
245 
                        if( data(5)='1' ) then
246 
                                write( str, string'(" - DMA завершён " ));
247 
                                dma_complete := 1;
248 
                        end if;
249 
                        writeline( log, str );
250 
 
251 
                        if( dma_complete=1 ) then
252 
                                exit;
253 
                        end if;
254 
 
255 
                        wait for 1 us;
256 
 
257 
                end loop;
258 
 
259 
                writeline( log, str );
260 
 
261 
                if( dma_complete=0 ) then
262 
                        write( str, string'("Ошибка - DMA не завершён " ));
263 
                        writeline( log, str );
264 
                        error:=error+1;
265 
                end if;
266 
 
267 
        end if;
268 
 
269 
        for ii in 0 to 3 loop
270 
 
271 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
272 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
273 
                writeline( log, str );
274 
                wait for 500 ns;
275 
 
276 
        end loop;
277 
 
278 
 
279 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
280 
 
281 
        write( str, string'(" Прочитано: " ));
282 
        writeline( log, str );
283 
 
284 
        for ii in 0 to 15 loop
285 
 
286 
                adr:= x"00800000";
287 
                adr:=adr + ii*4;
288 
                int_mem_read( cmd, ret, adr,  data );
289 
 
290 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
291 
                writeline( log, str );
292 
 
293 
        end loop;
294 
 
295 
 
296 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
297 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
298 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
299 
 
300 
 
301 
        writeline( log, str );
302 
        if( error=0 ) then
303 
                write( str, string'(" Тест завершён успешно " ));
304 
                cnt_ok := cnt_ok + 1;
305 
        else
306 
                write( str, string'(" Тест не выполнен " ));
307 
                cnt_error := cnt_error + 1;
308 
        end if;
309 
        writeline( log, str );
310 
        writeline( log, str );
311 
 
312 
end test_read_4kb;
313 
 
314 
 
315 
--! Чтение 8 кБ из тетрады DIO_IN
316 
procedure test_adm_read_8kb (
317 
                signal  cmd:    out bh_cmd; --! команда
318 
                signal  ret:    in  bh_ret  --! ответ
319 
                )
320 
is
321 
 
322 
variable        adr                             : std_logic_vector( 31 downto 0 );
323 
variable        data                    : std_logic_vector( 31 downto 0 );
324 
variable        str                             : line;
325 
 
326 
variable        error                   : integer:=0;
327 
variable        dma_complete    : integer;
328 
 
329 
begin
330 
 
331 
        write( str, string'("TEST_ADM_READ_8KB" ));
332 
        writeline( log, str );
333 
 
334 
        ---- Формирование блока дескрипторов ---
335 
        for ii in 0 to 127 loop
336 
                adr:= x"00100000";
337 
                adr:=adr + ii*4;
338 
                int_mem_write( cmd, ret, adr,  x"00000000" );
339 
        end loop;
340 
 
341 
        --- Дескриптор 0 ---
342 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
343 
        int_mem_write( cmd, ret, x"00100004",  x"00000111" );   -- переход к следующему
344 
 
345 
        --- Дескриптор 1 ---
346 
        int_mem_write( cmd, ret, x"00100008",  x"00008010" );
347 
        int_mem_write( cmd, ret, x"0010000C",  x"00000110" );   -- остановка
348 
 
349 
 
350 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
351 
        int_mem_write( cmd, ret, x"001001FC",  x"D6644953" );
352 
 
353 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
354 
 
355 
        ---- Программирование канала DMA ----
356 
        block_write( cmd, ret, 4, 8, x"00000027" );             -- DMA_MODE
357 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
358 
 
359 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
360 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
361 
        block_write( cmd, ret, 4, 23, x"00019000" );    -- LOCAL_ADR
362 
 
363 
 
364 
        ---- Подготовка тетрады ----
365 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
366 
        trd_wait_cmd( cmd, ret, 0, 16, x"1600" );                -- DMAR0 - от тетрады 6 --
367 
 
368 
        trd_wait_cmd( cmd, ret, 1, 16#1F#, x"0001" );   -- Размер блока = 4 кБ --
369 
 
370 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
371 
 
372 
        trd_wait_cmd( cmd, ret, 1, 16#0F#, x"0001" );   -- Подключение выхода генератора к DIO_IN --
373 
 
374 
        trd_wait_cmd( cmd, ret, 6,      0, x"2038" );            -- запуск тетрады DIO_IN
375 
 
376 
        trd_wait_cmd( cmd, ret, 1, 16#1E#, x"0020" );   -- Запуск тестовой последовательности --
377 
 
378 
        wait for 20 us;
379 
 
380 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
381 
 
382 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
383 
        if( data( 8 )='1' ) then
384 
                write( str, string'(" - Дескриптор правильный" ));
385 
        else
386 
                write( str, string'(" - Ошибка чтения дескриптора" ));
387 
                error := error + 1;
388 
        end if;
389 
 
390 
        writeline( log, str );
391 
 
392 
        if( error=0 ) then
393 
 
394 
                ---- Ожидание завершения DMA ----
395 
                dma_complete := 0;
396 
                for ii in 0 to 100 loop
397 
 
398 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
399 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
400 
                        if( data(5)='1' ) then
401 
                                write( str, string'(" - DMA завершён " ));
402 
                                dma_complete := 1;
403 
 
404 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
405 
 
406 
                        end if;
407 
                        writeline( log, str );
408 
 
409 
                        if( dma_complete=1 ) then
410 
                                exit;
411 
                        end if;
412 
 
413 
                        wait for 1 us;
414 
 
415 
                end loop;
416 
 
417 
                writeline( log, str );
418 
 
419 
                if( dma_complete=0 ) then
420 
                        write( str, string'("Ошибка - DMA не завершён " ));
421 
                        writeline( log, str );
422 
                        error:=error+1;
423 
                end if;
424 
 
425 
        end if;
426 
 
427 
        for ii in 0 to 3 loop
428 
 
429 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
430 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
431 
                writeline( log, str );
432 
                wait for 500 ns;
433 
 
434 
        end loop;
435 
 
436 
 
437 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
438 
 
439 
        write( str, string'(" Блок 0 - прочитано: " ));
440 
        writeline( log, str );
441 
 
442 
        for ii in 0 to 15 loop
443 
 
444 
                adr:= x"00800000";
445 
                adr:=adr + ii*4;
446 
                int_mem_read( cmd, ret, adr,  data );
447 
 
448 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
449 
                writeline( log, str );
450 
 
451 
        end loop;
452 
 
453 
        writeline( log, str );
454 
 
455 
        write( str, string'(" Блок 1 - прочитано: " ));
456 
        writeline( log, str );
457 
 
458 
        for ii in 0 to 15 loop
459 
 
460 
                adr:= x"00801000";
461 
                adr:=adr + ii*4;
462 
                int_mem_read( cmd, ret, adr,  data );
463 
 
464 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
465 
                writeline( log, str );
466 
 
467 
        end loop;
468 
 
469 
 
470 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
471 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
472 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
473 
 
474 
 
475 
        writeline( log, str );
476 
        if( error=0 ) then
477 
                write( str, string'(" Тест завершён успешно " ));
478 
                cnt_ok := cnt_ok + 1;
479 
        else
480 
                write( str, string'(" Тест не выполнен " ));
481 
                cnt_error := cnt_error + 1;
482 
        end if;
483 
        writeline( log, str );
484 
        writeline( log, str );
485 
 
486 
end test_adm_read_8kb;
487 
 
488 
 
489 
--! Проверка обращений к блоку MAIN
490 
procedure test_block_main (
491 
                signal  cmd:    out bh_cmd; --! команда
492 
                signal  ret:    in  bh_ret  --! ответ
493 
                )
494 
is
495 
 
496 
variable        adr                             : std_logic_vector( 31 downto 0 );
497 
variable        data                    : std_logic_vector( 31 downto 0 );
498 
variable        str                             : line;
499 
 
500 
variable        error                   : integer:=0;
501 
variable        dma_complete    : integer;
502 
 
503 
begin
504 
 
505 
        write( str, string'("TEST_BLOCK_MAIN" ));
506 
        writeline( log, str );
507 
 
508 48 dsmv 
--      block_write( cmd, ret, 4, 16#08#, x"0000AA55" );
509 47 dsmv 
        block_read( cmd, ret, 4, 16#00#, data );
510 
        write( str,  string'("БЛОК 4: " )); hwrite( str, data ); writeline( log, str );
511 
 
512 
        wait for 10 us;
513 
 
514 
--      write( str, "Константы:" );
515 
--      writeline( log, str );
516 
--      for ii in 0 to 5 loop
517 
--              write( str, "Блок " );
518 
--              write( str, ii );
519 
--              for jj in 0 to 7 loop
520 
--                      block_read( cmd, ret, ii, jj, data );
521 
--                      write( str, "   " );
522 
--                      hwrite( str, data );
523 
--              end loop;
524 
--              writeline( log, str );
525 
--      end loop;
526 
--
527 
--
528 
--      writeline( log, str );
529 
--
530 
--      block_read( cmd, ret, 0, 16#10#, data );
531 
--      write( str,  "STATUS: " ); hwrite( str, data ); writeline( log, str );
532 
--
533 
--      block_write( cmd, ret, 80, 16#08#, x"00000100" );
534 
--
535 
--      block_read( cmd, ret, 0, 16#10#, data );
536 
--      write( str, "STATUS: " ); hwrite( str, data ); writeline( log, str );
537 
--
538 
--      block_write( cmd, ret, 80, 16#08#, x"00000200" );
539 
--
540 
--      block_read( cmd, ret, 0, 16#10#, data );
541 
--      write( str, "STATUS: " ); hwrite( str, data ); writeline( log, str );
542 
--
543 
--
544 
--      writeline( log, str );
545 
--      if( error=0 ) then
546 
--              write( str, " Тест завершён успешно " );
547 
--              cnt_ok := cnt_ok + 1;
548 
--      else
549 
--              write( str, " Тест не выполнен " );
550 
--              cnt_error := cnt_error + 1;
551 
--      end if;
552 
 
553 
        for ii in 0 to 127 loop
554 
 
555 
                block_write( cmd, ret, 4, 16#08#, x"0000AA55" );
556 
                block_read( cmd, ret, 4, 8, data );
557 
                write( str, string'("READ: " )); hwrite( str, data( 15 downto 0 ) ); writeline( log, str );
558 
                if( data/=x"0000AA55" ) then
559 
                        error:=error+1;
560 
                end if;
561 
 
562 
        end loop;
563 
 
564 
 
565 
 
566 
 
567 
        writeline( log, str );
568 
        writeline( log, str );
569 
 
570 
end test_block_main;
571 
 
572 
 
573 
 
574 
 
575 
--! Чтение 16 кБ с использованием двух блоков дескрипторов
576 
procedure test_adm_read_16kb (
577 
                signal  cmd:    out bh_cmd; --! команда
578 
                signal  ret:    in  bh_ret  --! ответ
579 
                )
580 
is
581 
 
582 
variable        adr                             : std_logic_vector( 31 downto 0 );
583 
variable        data                    : std_logic_vector( 31 downto 0 );
584 
variable        str                             : line;
585 
 
586 
variable        error                   : integer:=0;
587 
variable        dma_complete    : integer;
588 
variable        kk                              : integer;
589 
variable        status                  : std_logic_vector( 15 downto 0 );
590 
 
591 
begin
592 
 
593 
        write( str, string'("TEST_ADM_READ_16KB" ));
594 
        writeline( log, str );
595 
 
596 
        ---- Формирование блока дескрипторов ---
597 
        for ii in 0 to 256 loop
598 
                adr:= x"00100000";
599 
                adr:=adr + ii*4;
600 
                int_mem_write( cmd, ret, adr,  x"00000000" );
601 
        end loop;
602 
 
603 
        --- Блок 0 ---
604 
 
605 
        --- Дескриптор 0 ---
606 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
607 
        int_mem_write( cmd, ret, x"00100004",  x"00000111" );   -- переход к следующему дескриптору
608 
 
609 
        --- Дескриптор 1 ---
610 
        int_mem_write( cmd, ret, x"00100008",  x"00008010" );
611 
        int_mem_write( cmd, ret, x"0010000C",  x"00000112" );   -- переход к следующему блоку
612 
 
613 
        --- Дескриптор 2 ---
614 
        int_mem_write( cmd, ret, x"00100010",  x"00001002" );   -- адрес следующего дескриптора
615 
        int_mem_write( cmd, ret, x"00100014",  x"00000000" );
616 
 
617 
 
618 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
619 
        int_mem_write( cmd, ret, x"001001FC",  x"14644953" );
620 
 
621 
 
622 
        --- Блок 1 ---
623 
 
624 
        --- Дескриптор 0 ---
625 
        int_mem_write( cmd, ret, x"00100200",  x"00008020" );
626 
        int_mem_write( cmd, ret, x"00100204",  x"00000111" );   -- переход к следующему дескриптору
627 
 
628 
        --- Дескриптор 1 ---
629 
        int_mem_write( cmd, ret, x"00100208",  x"00008030" );
630 
        int_mem_write( cmd, ret, x"0010020C",  x"00000110" );   -- остановка
631 
 
632 
 
633 
        int_mem_write( cmd, ret, x"001003F8",  x"00000000" );
634 
        int_mem_write( cmd, ret, x"001003FC",  x"D67C4953" );
635 
 
636 
 
637 
 
638 
        ---- Программирование канала DMA ----
639 
        block_write( cmd, ret, 4, 8, x"00000027" );             -- DMA_MODE
640 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
641 
 
642 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
643 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
644 
        block_write( cmd, ret, 4, 23, x"00019000" );    -- LOCAL_ADR
645 
 
646 
 
647 
        ---- Подготовка тетрады ----
648 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
649 
        trd_wait_cmd( cmd, ret, 0, 16, x"1600" );                -- DMAR0 - от тетрады 6 --
650 
 
651 
        trd_wait_cmd( cmd, ret, 1, 16#1F#, x"0001" );   -- Размер блока = 4 кБ --
652 
 
653 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
654 
 
655 
        trd_wait_cmd( cmd, ret, 1, 16#0F#, x"0001" );   -- Подключение выхода генератора к DIO_IN --
656 
 
657 
        trd_wait_cmd( cmd, ret, 6,      0, x"2038" );            -- запуск тетрады DIO_IN
658 
 
659 
        trd_wait_cmd( cmd, ret, 1, 16#1E#, x"06A0" );   -- Запуск тестовой последовательности --
660 
 
661 
        wait for 20 us;
662 
 
663 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
664 
 
665 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
666 
        if( data( 8 )='1' ) then
667 
                write( str, string'(" - Дескриптор правильный" ));
668 
        else
669 
                write( str, string'(" - Ошибка чтения дескриптора" ));
670 
                error := error + 1;
671 
        end if;
672 
 
673 
        writeline( log, str );
674 
 
675 
        if( error=0 ) then
676 
 
677 
                kk:=0;
678 
                loop
679 
 
680 
                trd_status( cmd, ret, 6, status );
681 
                write( str, string'("TRD_STATUS: " )); hwrite( str, status );
682 
 
683 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
684 
                write( str, string'("    STATUS: " )); hwrite( str, data( 15 downto 0 ) );
685 
 
686 
                        if( data(4)='1' ) then
687 
                                write( str, string'(" - завершено чтение блока " ));
688 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
689 
                                kk:=kk+1;
690 
                                if( kk=4 ) then
691 
                                        exit;
692 
                                end if;
693 
                        end if;
694 
                        writeline( log, str );
695 
 
696 
                        wait for 500 ns;
697 
 
698 
 
699 
                end loop;
700 
 
701 
                ---- Ожидание завершения DMA ----
702 
                dma_complete := 0;
703 
                for ii in 0 to 100 loop
704 
 
705 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
706 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
707 
                        if( data(5)='1' ) then
708 
                                write( str, string'(" - DMA завершён " ));
709 
                                dma_complete := 1;
710 
 
711 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
712 
 
713 
                        end if;
714 
                        writeline( log, str );
715 
 
716 
                        if( dma_complete=1 ) then
717 
                                exit;
718 
                        end if;
719 
 
720 
                        wait for 1 us;
721 
 
722 
                end loop;
723 
 
724 
                writeline( log, str );
725 
 
726 
                if( dma_complete=0 ) then
727 
                        write( str, string'("Ошибка - DMA не завершён " ));
728 
                        writeline( log, str );
729 
                        error:=error+1;
730 
                end if;
731 
 
732 
        end if;
733 
 
734 
        for ii in 0 to 3 loop
735 
 
736 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
737 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
738 
                writeline( log, str );
739 
                wait for 500 ns;
740 
 
741 
        end loop;
742 
 
743 
 
744 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
745 
 
746 
        write( str, string'(" Блок 0 - прочитано: " ));
747 
        writeline( log, str );
748 
 
749 
        for ii in 0 to 15 loop
750 
 
751 
                adr:= x"00800000";
752 
                adr:=adr + ii*4;
753 
                int_mem_read( cmd, ret, adr,  data );
754 
 
755 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
756 
                writeline( log, str );
757 
 
758 
        end loop;
759 
 
760 
        writeline( log, str );
761 
 
762 
        write( str, string'(" Блок 1 - прочитано: " ));
763 
        writeline( log, str );
764 
 
765 
        for ii in 0 to 15 loop
766 
 
767 
                adr:= x"00801000";
768 
                adr:=adr + ii*4;
769 
                int_mem_read( cmd, ret, adr,  data );
770 
 
771 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
772 
                writeline( log, str );
773 
 
774 
        end loop;
775 
 
776 
        write( str, string'(" Блок 2 - прочитано: " ));
777 
        writeline( log, str );
778 
 
779 
        for ii in 0 to 15 loop
780 
 
781 
                adr:= x"00802000";
782 
                adr:=adr + ii*4;
783 
                int_mem_read( cmd, ret, adr,  data );
784 
 
785 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
786 
                writeline( log, str );
787 
 
788 
        end loop;
789 
 
790 
 
791 
        write( str, string'(" Блок 3 - прочитано: " ));
792 
        writeline( log, str );
793 
 
794 
        for ii in 0 to 15 loop
795 
 
796 
                adr:= x"00803000";
797 
                adr:=adr + ii*4;
798 
                int_mem_read( cmd, ret, adr,  data );
799 
 
800 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
801 
                writeline( log, str );
802 
 
803 
        end loop;
804 
 
805 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
806 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
807 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
808 
 
809 
 
810 
        writeline( log, str );
811 
        if( error=0 ) then
812 
                write( str, string'(" Тест завершён успешно " ));
813 
                cnt_ok := cnt_ok + 1;
814 
        else
815 
                write( str, string'(" Тест не выполнен " ));
816 
                cnt_error := cnt_error + 1;
817 
        end if;
818 
        writeline( log, str );
819 
        writeline( log, str );
820 
 
821 
end test_adm_read_16kb;
822 
 
823 
 
824 
 
825 
 
826 
--! Запись 16 кБ с использованием двух блоков дескрипторов
827 
procedure test_adm_write_16kb (
828 
                signal  cmd:    out bh_cmd; --! команда
829 
                signal  ret:    in  bh_ret  --! ответ
830 
                )
831 
is
832 
 
833 
variable        adr                             : std_logic_vector( 31 downto 0 );
834 
variable        data                    : std_logic_vector( 31 downto 0 );
835 
variable        str                             : line;
836 
 
837 
variable        error                   : integer:=0;
838 
variable        dma_complete    : integer;
839 
variable        kk                              : integer;
840 
variable        status                  : std_logic_vector( 15 downto 0 );
841 
 
842 
begin
843 
 
844 
        write( str, string'("TEST_ADM_WRITE_16KB" ));
845 
        writeline( log, str );
846 
 
847 
        ---- Формирование блока дескрипторов ---
848 
        for ii in 0 to 256 loop
849 
                adr:= x"00100000";
850 
                adr:=adr + ii*4;
851 
                int_mem_write( cmd, ret, adr,  x"00000000" );
852 
        end loop;
853 
 
854 
        ---- Заполнение памяти ----
855 
        for ii in 0 to 256 loop
856 
                adr:= x"00800000";
857 
                adr:=adr + ii*4;
858 
                data:=x"00A00000";
859 
                data:=data + ii;
860 
                int_mem_write( cmd, ret, adr,  data );
861 
        end loop;
862 
 
863 
        for ii in 0 to 1023 loop
864 
                adr:= x"00801000";
865 
                adr:=adr + ii*4;
866 
                data:=x"00A10000";
867 
                data:=data + ii;
868 
                int_mem_write( cmd, ret, adr,  data );
869 
        end loop;
870 
 
871 
        for ii in 0 to 256 loop
872 
                adr:= x"00802000";
873 
                adr:=adr + ii*4;
874 
                data:=x"00A20000";
875 
                data:=data + ii;
876 
                int_mem_write( cmd, ret, adr,  data );
877 
        end loop;
878 
 
879 
        for ii in 0 to 256 loop
880 
                adr:= x"00803000";
881 
                adr:=adr + ii*4;
882 
                data:=x"00A30000";
883 
                data:=data + ii;
884 
                int_mem_write( cmd, ret, adr,  data );
885 
        end loop;
886 
 
887 
        --- Блок 0 ---
888 
 
889 
        --- Дескриптор 0 ---
890 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
891 
        int_mem_write( cmd, ret, x"00100004",  x"00000011" );   -- переход к следующему дескриптору
892 
 
893 
        --- Дескриптор 1 ---
894 
        int_mem_write( cmd, ret, x"00100008",  x"00008010" );
895 
        int_mem_write( cmd, ret, x"0010000C",  x"00000012" );   -- переход к следующему блоку
896 
 
897 
        --- Дескриптор 2 ---
898 
        int_mem_write( cmd, ret, x"00100010",  x"00001002" );   -- адрес следующего дескриптора
899 
        int_mem_write( cmd, ret, x"00100014",  x"00000000" );
900 
 
901 
 
902 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
903 
        int_mem_write( cmd, ret, x"001001FC",  x"14A44953" );
904 
 
905 
 
906 
        --- Блок 1 ---
907 
 
908 
        --- Дескриптор 0 ---
909 
        int_mem_write( cmd, ret, x"00100200",  x"00008020" );
910 
        int_mem_write( cmd, ret, x"00100204",  x"00000011" );   -- переход к следующему дескриптору
911 
 
912 
        --- Дескриптор 1 ---
913 
        int_mem_write( cmd, ret, x"00100208",  x"00008030" );
914 
        int_mem_write( cmd, ret, x"0010020C",  x"00000010" );   -- остановка
915 
 
916 
 
917 
        int_mem_write( cmd, ret, x"001003F8",  x"00000000" );
918 
        int_mem_write( cmd, ret, x"001003FC",  x"D6BC4953" );
919 
 
920 
 
921 
 
922 
        ---- Программирование канала DMA ----
923 
        block_write( cmd, ret, 4, 8, x"00000023" );             -- DMA_MODE
924 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
925 
 
926 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
927 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
928 
        block_write( cmd, ret, 4, 23, x"0001D000" );    -- LOCAL_ADR
929 
 
930 
 
931 
        ---- Подготовка тетрады ----
932 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
933 
        trd_wait_cmd( cmd, ret, 0, 16, x"1700" );                -- DMAR0 - от тетрады 7 --
934 
 
935 
        trd_wait_cmd( cmd, ret, 1, 16#1D#, x"0001" );   -- Размер блока = 4 кБ --
936 
 
937 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
938 
 
939 
        trd_wait_cmd( cmd, ret, 1, 16#0F#, x"0001" );   -- Подключение выхода генератора к DIO_IN --
940 
 
941 
        trd_wait_cmd( cmd, ret, 7,      0, x"2038" );            -- запуск тетрады DIO_OUT
942 
 
943 
        trd_wait_cmd( cmd, ret, 1, 16#1C#, x"0020" );   -- Запуск тестовой последовательности --
944 
 
945 
        wait for 20 us;
946 
 
947 
 
948 
        for ii in 0 to 20 loop
949 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
950 
 
951 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
952 
                if( data( 8 )='1' ) then
953 
                        write( str, string'(" - Дескриптор правильный" ));
954 
                        error := 0;
955 
                        exit;
956 
                else
957 
                        write( str, string'(" - Ошибка чтения дескриптора" ));
958 
                        error := error + 1;
959 
                        wait for 10 us;
960 
                end if;
961 
 
962 
                writeline( log, str );
963 
        end loop;
964 
 
965 
 
966 
        if( error=0 ) then
967 
 
968 
                kk:=0;
969 
                loop
970 
 
971 
                trd_status( cmd, ret, 6, status );
972 
                write( str, string'("TRD_STATUS: " )); hwrite( str, status );
973 
 
974 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
975 
                write( str, string'("    STATUS: " )); hwrite( str, data( 15 downto 0 ) );
976 
 
977 
                        if( data(4)='1' ) then
978 
                                write( str, string'(" - завершено чтение блока " ));
979 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
980 
                                kk:=kk+1;
981 
                                if( kk=4 ) then
982 
                                        exit;
983 
                                end if;
984 
                        end if;
985 
                        writeline( log, str );
986 
 
987 
                        wait for 500 ns;
988 
 
989 
 
990 
                end loop;
991 
 
992 
                ---- Ожидание завершения DMA ----
993 
                dma_complete := 0;
994 
                for ii in 0 to 100 loop
995 
 
996 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
997 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
998 
                        if( data(5)='1' ) then
999 
                                write( str, string'(" - DMA завершён " ));
1000 
                                dma_complete := 1;
1001 
 
1002 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
1003 
 
1004 
                        end if;
1005 
                        writeline( log, str );
1006 
 
1007 
                        if( dma_complete=1 ) then
1008 
                                exit;
1009 
                        end if;
1010 
 
1011 
                        wait for 1 us;
1012 
 
1013 
                end loop;
1014 
 
1015 
                writeline( log, str );
1016 
 
1017 
                if( dma_complete=0 ) then
1018 
                        write( str, string'("Ошибка - DMA не завершён " ));
1019 
                        writeline( log, str );
1020 
                        error:=error+1;
1021 
                end if;
1022 
 
1023 
        end if;
1024 
 
1025 
        for ii in 0 to 3 loop
1026 
 
1027 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
1028 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
1029 
                writeline( log, str );
1030 
                wait for 500 ns;
1031 
 
1032 
        end loop;
1033 
 
1034 
 
1035 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
1036 
 
1037 
 
1038 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
1039 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
1040 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
1041 
 
1042 
 
1043 
        writeline( log, str );
1044 
        if( error=0 ) then
1045 
                write( str, string'(" Тест завершён успешно " ));
1046 
                cnt_ok := cnt_ok + 1;
1047 
        else
1048 
                write( str, string'(" Тест не выполнен " ));
1049 
                cnt_error := cnt_error + 1;
1050 
        end if;
1051 
        writeline( log, str );
1052 
        writeline( log, str );
1053 
 
1054 
end test_adm_write_16kb;
1055 
 
1056 
end package     body test_pkg;
1057 
 
1058 
 

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