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barabba |
Release 13.3 - xst O.76xd (nt)
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Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
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-->
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Reading constraint file user_logic_cw.xcf.
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XCF parsing done.
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TABLE OF CONTENTS
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1) Synthesis Options Summary
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2) HDL Parsing
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3) HDL Elaboration
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4) HDL Synthesis
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4.1) HDL Synthesis Report
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5) Advanced HDL Synthesis
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5.1) Advanced HDL Synthesis Report
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6) Low Level Synthesis
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7) Partition Report
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8) Design Summary
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8.1) Primitive and Black Box Usage
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8.2) Device utilization summary
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8.3) Partition Resource Summary
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8.4) Timing Report
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8.4.1) Clock Information
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8.4.2) Asynchronous Control Signals Information
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8.4.3) Timing Summary
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8.4.4) Timing Details
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8.4.5) Cross Clock Domains Report
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=========================================================================
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* Synthesis Options Summary *
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=========================================================================
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---- Source Parameters
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Input File Name : "xst_user_logic.prj"
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Input Format : mixed
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Synthesis Constraint File : user_logic_cw.xcf
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---- Target Parameters
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Output File Name : "user_logic_cw.ngc"
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Output Format : NGC
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Target Device : xc6vlx240t-1ff1156
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---- Source Options
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Entity Name : user_logic_cw
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Top Module Name : user_logic_cw
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Automatic Register Balancing : no
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---- Target Options
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Add IO Buffers : NO
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Pack IO Registers into IOBs : Auto
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---- General Options
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Keep Hierarchy : NO
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Bus Delimiter : ()
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Hierarchy Separator : /
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Write Timing Constraints : yes
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---- Other Options
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report_timing_constraint_problems : warning
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=========================================================================
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WARNING:Xst:29 - Optimization Effort not specified
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The following parameters have been added:
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Optimization Goal : SPEED
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=========================================================================
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=========================================================================
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* HDL Parsing *
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=========================================================================
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Parsing VHDL file "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic.vhd" into library work
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing package .
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Parsing package body .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing VHDL file "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" into library work
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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Parsing entity .
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Parsing architecture of entity .
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=========================================================================
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* HDL Elaboration *
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=========================================================================
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Elaborating entity (architecture ) from library .
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 814: Assignment to from_register15_data_out_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 815: Assignment to from_register16_data_out_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 818: Assignment to from_register19_data_out_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 819: Assignment to from_register1_data_out_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 830: Assignment to from_register2_data_out_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 842: Assignment to from_register_data_out_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 844: Assignment to to_register10_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 845: Assignment to to_register11_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 846: Assignment to to_register12_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 847: Assignment to to_register13_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 848: Assignment to to_register14_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 849: Assignment to to_register15_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 850: Assignment to to_register16_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 851: Assignment to to_register17_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 852: Assignment to to_register18_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 853: Assignment to to_register19_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 854: Assignment to to_register1_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 855: Assignment to to_register20_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 856: Assignment to to_register21_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 857: Assignment to to_register22_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 858: Assignment to to_register23_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 859: Assignment to to_register24_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 860: Assignment to to_register25_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 861: Assignment to to_register26_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 862: Assignment to to_register27_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 863: Assignment to to_register2_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 864: Assignment to to_register3_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 865: Assignment to to_register4_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 866: Assignment to to_register5_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 867: Assignment to to_register6_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 868: Assignment to to_register7_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 869: Assignment to to_register8_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 870: Assignment to to_register9_dout_net ignored, since the identifier is never used
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic_cw.vhd" Line 871: Assignment to to_register_dout_net ignored, since the identifier is never used
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture ) with generics from library .
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Elaborating entity (architecture ) with generics from library .
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Elaborating entity (architecture ) with generics from library .
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WARNING:HDLCompiler:89 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic.vhd" Line 1898: remains a black-box since it has no binding entity.
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture <>) from library .
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Elaborating entity (architecture <>) from library .
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture ) with generics from library .
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Elaborating entity (architecture ) with generics from library .
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Elaborating entity (architecture <>) from library .
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Elaborating entity (architecture ) from library .
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WARNING:HDLCompiler:871 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic.vhd" Line 2345: Using initial value false for op_mem_22_20_front_din since it is never assigned
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WARNING:HDLCompiler:1127 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic.vhd" Line 2351: Assignment to op_mem_22_20_back ignored, since the identifier is never used
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Elaborating entity (architecture ) from library .
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Elaborating entity (architecture ) with generics from library .
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WARNING:HDLCompiler:89 - "C:\Temp\Xilinx PCI Express\ML605_ISE13.3\MyUserLogic\UserLogic_00\top_level_1_PCIe_UserLogic_00_USER_LOGIC\synth_model\user_logic.vhd" Line 1909: remains a black-box since it has no binding entity.
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228 |
|
|
Elaborating entity (architecture ) with generics from library .
|
229 |
|
|
|
230 |
|
|
Elaborating entity (architecture ) with generics from library .
|
231 |
|
|
|
232 |
|
|
Elaborating entity (architecture ) with generics from library .
|
233 |
|
|
|
234 |
|
|
Elaborating entity (architecture ) with generics from library .
|
235 |
|
|
|
236 |
|
|
Elaborating entity (architecture ) with generics from library .
|
237 |
|
|
|
238 |
|
|
Elaborating entity (architecture ) with generics from library .
|
239 |
|
|
|
240 |
|
|
Elaborating entity (architecture ) with generics from library .
|
241 |
|
|
|
242 |
|
|
Elaborating entity (architecture ) with generics from library .
|
243 |
|
|
|
244 |
|
|
Elaborating entity (architecture ) with generics from library .
|
245 |
|
|
|
246 |
|
|
Elaborating entity (architecture ) with generics from library .
|
247 |
|
|
|
248 |
|
|
Elaborating entity (architecture ) with generics from library .
|
249 |
|
|
|
250 |
|
|
Elaborating entity (architecture ) with generics from library .
|
251 |
|
|
|
252 |
|
|
Elaborating entity (architecture ) with generics from library .
|
253 |
|
|
|
254 |
|
|
Elaborating entity (architecture ) with generics from library .
|
255 |
|
|
|
256 |
|
|
Elaborating entity (architecture ) with generics from library .
|
257 |
|
|
|
258 |
|
|
Elaborating entity (architecture ) with generics from library .
|
259 |
|
|
|
260 |
|
|
Elaborating entity (architecture ) with generics from library .
|
261 |
|
|
|
262 |
|
|
=========================================================================
|
263 |
|
|
* HDL Synthesis *
|
264 |
|
|
=========================================================================
|
265 |
|
|
|
266 |
|
|
Synthesizing Unit .
|
267 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic_cw.vhd".
|
268 |
|
|
Set property "syn_black_box = true" for instance .
|
269 |
|
|
Set property "syn_noprune = true" for instance .
|
270 |
|
|
Set property "optimize_primitives = false" for instance .
|
271 |
|
|
Set property "dont_touch = true" for instance .
|
272 |
|
|
Set property "MAX_FANOUT = REDUCE" for signal .
|
273 |
|
|
Set property "syn_keep = true" for signal .
|
274 |
|
|
Set property "KEEP = TRUE" for signal .
|
275 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "preserve_signal". This constraint/property is not supported by the current software release and will be ignored.
|
276 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
277 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
278 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
279 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
280 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
281 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
282 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
283 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
284 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
285 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
286 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
287 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
288 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
289 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
290 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
291 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
292 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
293 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
294 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
295 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
296 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
297 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
298 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
299 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
300 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
301 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
302 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
303 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
304 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
305 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
306 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
307 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
308 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
309 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
310 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
311 |
|
|
Summary:
|
312 |
|
|
no macro.
|
313 |
|
|
Unit synthesized.
|
314 |
|
|
|
315 |
|
|
Synthesizing Unit .
|
316 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic_cw.vhd".
|
317 |
|
|
Set property "syn_noprune = true".
|
318 |
|
|
Set property "optimize_primitives = false".
|
319 |
|
|
Set property "dont_touch = true".
|
320 |
|
|
INFO:Xst:3210 - "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic_cw.vhd" line 378: Output port of the instance is unconnected or connected to loadless signal.
|
321 |
|
|
INFO:Xst:3210 - "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic_cw.vhd" line 378: Output port of the instance is unconnected or connected to loadless signal.
|
322 |
|
|
Summary:
|
323 |
|
|
no macro.
|
324 |
|
|
Unit synthesized.
|
325 |
|
|
|
326 |
|
|
Synthesizing Unit .
|
327 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic_cw.vhd".
|
328 |
|
|
period = 1
|
329 |
|
|
log_2_period = 1
|
330 |
|
|
pipeline_regs = 5
|
331 |
|
|
use_bufg = 0
|
332 |
|
|
Set property "MAX_FANOUT = REDUCE" for signal .
|
333 |
|
|
Set property "MAX_FANOUT = REDUCE" for signal .
|
334 |
|
|
INFO:Xst:3210 - "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic_cw.vhd" line 254: Output port of the instance is unconnected or connected to loadless signal.
|
335 |
|
|
Summary:
|
336 |
|
|
no macro.
|
337 |
|
|
Unit synthesized.
|
338 |
|
|
|
339 |
|
|
Synthesizing Unit .
|
340 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
341 |
|
|
width = 1
|
342 |
|
|
init_index = 0
|
343 |
|
|
init_value = "0000"
|
344 |
|
|
latency = 1
|
345 |
|
|
Summary:
|
346 |
|
|
no macro.
|
347 |
|
|
Unit synthesized.
|
348 |
|
|
|
349 |
|
|
Synthesizing Unit .
|
350 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
351 |
|
|
width = 1
|
352 |
|
|
init_index = 0
|
353 |
|
|
init_value = "0000"
|
354 |
|
|
Set property "syn_black_box = true" for instance .
|
355 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
356 |
|
|
Summary:
|
357 |
|
|
no macro.
|
358 |
|
|
Unit synthesized.
|
359 |
|
|
|
360 |
|
|
Synthesizing Unit .
|
361 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
362 |
|
|
Summary:
|
363 |
|
|
no macro.
|
364 |
|
|
Unit synthesized.
|
365 |
|
|
|
366 |
|
|
Synthesizing Unit .
|
367 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
368 |
|
|
Set property "syn_noprune = true".
|
369 |
|
|
Set property "syn_black_box = true" for instance .
|
370 |
|
|
Set property "syn_noprune = true" for instance .
|
371 |
|
|
Set property "syn_black_box = true" for instance .
|
372 |
|
|
Set property "syn_noprune = true" for instance .
|
373 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
374 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
375 |
|
|
Summary:
|
376 |
|
|
no macro.
|
377 |
|
|
Unit synthesized.
|
378 |
|
|
|
379 |
|
|
Synthesizing Unit .
|
380 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
381 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
382 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
383 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
384 |
|
|
Summary:
|
385 |
|
|
no macro.
|
386 |
|
|
Unit synthesized.
|
387 |
|
|
|
388 |
|
|
Synthesizing Unit .
|
389 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
390 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
391 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
392 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
393 |
|
|
Summary:
|
394 |
|
|
no macro.
|
395 |
|
|
Unit synthesized.
|
396 |
|
|
|
397 |
|
|
Synthesizing Unit .
|
398 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
399 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
400 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
401 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
402 |
|
|
Summary:
|
403 |
|
|
no macro.
|
404 |
|
|
Unit synthesized.
|
405 |
|
|
|
406 |
|
|
Synthesizing Unit .
|
407 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
408 |
|
|
din_width = 1
|
409 |
|
|
din_bin_pt = 0
|
410 |
|
|
din_arith = 1
|
411 |
|
|
dout_width = 1
|
412 |
|
|
dout_bin_pt = 0
|
413 |
|
|
dout_arith = 1
|
414 |
|
|
en_width = 1
|
415 |
|
|
en_bin_pt = 0
|
416 |
|
|
en_arith = 1
|
417 |
|
|
bool_conversion = 1
|
418 |
|
|
latency = 0
|
419 |
|
|
quantization = 1
|
420 |
|
|
overflow = 1
|
421 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
422 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
423 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
424 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
425 |
|
|
Summary:
|
426 |
|
|
no macro.
|
427 |
|
|
Unit synthesized.
|
428 |
|
|
|
429 |
|
|
Synthesizing Unit .
|
430 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
431 |
|
|
core_name0 = "cntr_11_0_341fbb8cfa0e669e"
|
432 |
|
|
op_width = 12
|
433 |
|
|
op_arith = 1
|
434 |
|
|
Set property "syn_black_box = true" for instance .
|
435 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
436 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
437 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
438 |
|
|
WARNING:Xst:647 - Input > is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
439 |
|
|
Summary:
|
440 |
|
|
no macro.
|
441 |
|
|
Unit synthesized.
|
442 |
|
|
|
443 |
|
|
Synthesizing Unit .
|
444 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
445 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
446 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
447 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
448 |
|
|
Summary:
|
449 |
|
|
no macro.
|
450 |
|
|
Unit synthesized.
|
451 |
|
|
|
452 |
|
|
Synthesizing Unit .
|
453 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
454 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
455 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
456 |
|
|
WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
457 |
|
|
Summary:
|
458 |
|
|
no macro.
|
459 |
|
|
Unit synthesized.
|
460 |
|
|
|
461 |
|
|
Synthesizing Unit .
|
462 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
463 |
|
|
d_width = 1
|
464 |
|
|
init_value = "0"
|
465 |
|
|
Summary:
|
466 |
|
|
no macro.
|
467 |
|
|
Unit synthesized.
|
468 |
|
|
|
469 |
|
|
Synthesizing Unit .
|
470 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
471 |
|
|
width = 1
|
472 |
|
|
init_index = 2
|
473 |
|
|
init_value = "0"
|
474 |
|
|
latency = 1
|
475 |
|
|
Summary:
|
476 |
|
|
no macro.
|
477 |
|
|
Unit synthesized.
|
478 |
|
|
|
479 |
|
|
Synthesizing Unit .
|
480 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
481 |
|
|
width = 1
|
482 |
|
|
init_index = 2
|
483 |
|
|
init_value = "0"
|
484 |
|
|
Set property "syn_black_box = true" for instance .
|
485 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
486 |
|
|
Summary:
|
487 |
|
|
no macro.
|
488 |
|
|
Unit synthesized.
|
489 |
|
|
|
490 |
|
|
Synthesizing Unit .
|
491 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
492 |
|
|
d_width = 32
|
493 |
|
|
init_value = "00000000000000000000000000000000"
|
494 |
|
|
Summary:
|
495 |
|
|
no macro.
|
496 |
|
|
Unit synthesized.
|
497 |
|
|
|
498 |
|
|
Synthesizing Unit .
|
499 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
500 |
|
|
width = 32
|
501 |
|
|
init_index = 2
|
502 |
|
|
init_value = "00000000000000000000000000000000"
|
503 |
|
|
latency = 1
|
504 |
|
|
Summary:
|
505 |
|
|
no macro.
|
506 |
|
|
Unit synthesized.
|
507 |
|
|
|
508 |
|
|
Synthesizing Unit .
|
509 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
510 |
|
|
width = 32
|
511 |
|
|
init_index = 2
|
512 |
|
|
init_value = "00000000000000000000000000000000"
|
513 |
|
|
Set property "syn_black_box = true" for instance .
|
514 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
515 |
|
|
Set property "syn_black_box = true" for instance .
|
516 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
517 |
|
|
Set property "syn_black_box = true" for instance .
|
518 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
519 |
|
|
Set property "syn_black_box = true" for instance .
|
520 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
521 |
|
|
Set property "syn_black_box = true" for instance .
|
522 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
523 |
|
|
Set property "syn_black_box = true" for instance .
|
524 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
525 |
|
|
Set property "syn_black_box = true" for instance .
|
526 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
527 |
|
|
Set property "syn_black_box = true" for instance .
|
528 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
529 |
|
|
Set property "syn_black_box = true" for instance .
|
530 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
531 |
|
|
Set property "syn_black_box = true" for instance .
|
532 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
533 |
|
|
Set property "syn_black_box = true" for instance .
|
534 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
535 |
|
|
Set property "syn_black_box = true" for instance .
|
536 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
537 |
|
|
Set property "syn_black_box = true" for instance .
|
538 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
539 |
|
|
Set property "syn_black_box = true" for instance .
|
540 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
541 |
|
|
Set property "syn_black_box = true" for instance .
|
542 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
543 |
|
|
Set property "syn_black_box = true" for instance .
|
544 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
545 |
|
|
Set property "syn_black_box = true" for instance .
|
546 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
547 |
|
|
Set property "syn_black_box = true" for instance .
|
548 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
549 |
|
|
Set property "syn_black_box = true" for instance .
|
550 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
551 |
|
|
Set property "syn_black_box = true" for instance .
|
552 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
553 |
|
|
Set property "syn_black_box = true" for instance .
|
554 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
555 |
|
|
Set property "syn_black_box = true" for instance .
|
556 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
557 |
|
|
Set property "syn_black_box = true" for instance .
|
558 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
559 |
|
|
Set property "syn_black_box = true" for instance .
|
560 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
561 |
|
|
Set property "syn_black_box = true" for instance .
|
562 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
563 |
|
|
Set property "syn_black_box = true" for instance .
|
564 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
565 |
|
|
Set property "syn_black_box = true" for instance .
|
566 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
567 |
|
|
Set property "syn_black_box = true" for instance .
|
568 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
569 |
|
|
Set property "syn_black_box = true" for instance .
|
570 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
571 |
|
|
Set property "syn_black_box = true" for instance .
|
572 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
573 |
|
|
Set property "syn_black_box = true" for instance .
|
574 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
575 |
|
|
Set property "syn_black_box = true" for instance .
|
576 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
577 |
|
|
Summary:
|
578 |
|
|
no macro.
|
579 |
|
|
Unit synthesized.
|
580 |
|
|
|
581 |
|
|
Synthesizing Unit .
|
582 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
583 |
|
|
d_width = 12
|
584 |
|
|
init_value = "000000000000"
|
585 |
|
|
Summary:
|
586 |
|
|
no macro.
|
587 |
|
|
Unit synthesized.
|
588 |
|
|
|
589 |
|
|
Synthesizing Unit .
|
590 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
591 |
|
|
width = 12
|
592 |
|
|
init_index = 2
|
593 |
|
|
init_value = "000000000000"
|
594 |
|
|
latency = 1
|
595 |
|
|
Summary:
|
596 |
|
|
no macro.
|
597 |
|
|
Unit synthesized.
|
598 |
|
|
|
599 |
|
|
Synthesizing Unit .
|
600 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
601 |
|
|
width = 12
|
602 |
|
|
init_index = 2
|
603 |
|
|
init_value = "000000000000"
|
604 |
|
|
Set property "syn_black_box = true" for instance .
|
605 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
606 |
|
|
Set property "syn_black_box = true" for instance .
|
607 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
608 |
|
|
Set property "syn_black_box = true" for instance .
|
609 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
610 |
|
|
Set property "syn_black_box = true" for instance .
|
611 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
612 |
|
|
Set property "syn_black_box = true" for instance .
|
613 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
614 |
|
|
Set property "syn_black_box = true" for instance .
|
615 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
616 |
|
|
Set property "syn_black_box = true" for instance .
|
617 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
618 |
|
|
Set property "syn_black_box = true" for instance .
|
619 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
620 |
|
|
Set property "syn_black_box = true" for instance .
|
621 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
622 |
|
|
Set property "syn_black_box = true" for instance .
|
623 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
624 |
|
|
Set property "syn_black_box = true" for instance .
|
625 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
626 |
|
|
Set property "syn_black_box = true" for instance .
|
627 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
628 |
|
|
Summary:
|
629 |
|
|
no macro.
|
630 |
|
|
Unit synthesized.
|
631 |
|
|
|
632 |
|
|
Synthesizing Unit .
|
633 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
634 |
|
|
d_width = 32
|
635 |
|
|
init_value = "00000000000000110000110100100011"
|
636 |
|
|
Summary:
|
637 |
|
|
no macro.
|
638 |
|
|
Unit synthesized.
|
639 |
|
|
|
640 |
|
|
Synthesizing Unit .
|
641 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
642 |
|
|
width = 32
|
643 |
|
|
init_index = 2
|
644 |
|
|
init_value = "00000000000000110000110100100011"
|
645 |
|
|
latency = 1
|
646 |
|
|
Summary:
|
647 |
|
|
no macro.
|
648 |
|
|
Unit synthesized.
|
649 |
|
|
|
650 |
|
|
Synthesizing Unit .
|
651 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
652 |
|
|
width = 32
|
653 |
|
|
init_index = 2
|
654 |
|
|
init_value = "00000000000000110000110100100011"
|
655 |
|
|
Set property "syn_black_box = true" for instance .
|
656 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
657 |
|
|
Set property "syn_black_box = true" for instance .
|
658 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
659 |
|
|
Set property "syn_black_box = true" for instance .
|
660 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
661 |
|
|
Set property "syn_black_box = true" for instance .
|
662 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
663 |
|
|
Set property "syn_black_box = true" for instance .
|
664 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
665 |
|
|
Set property "syn_black_box = true" for instance .
|
666 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
667 |
|
|
Set property "syn_black_box = true" for instance .
|
668 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
669 |
|
|
Set property "syn_black_box = true" for instance .
|
670 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
671 |
|
|
Set property "syn_black_box = true" for instance .
|
672 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
673 |
|
|
Set property "syn_black_box = true" for instance .
|
674 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
675 |
|
|
Set property "syn_black_box = true" for instance .
|
676 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
677 |
|
|
Set property "syn_black_box = true" for instance .
|
678 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
679 |
|
|
Set property "syn_black_box = true" for instance .
|
680 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
681 |
|
|
Set property "syn_black_box = true" for instance .
|
682 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
683 |
|
|
Set property "syn_black_box = true" for instance .
|
684 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
685 |
|
|
Set property "syn_black_box = true" for instance .
|
686 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
687 |
|
|
Set property "syn_black_box = true" for instance .
|
688 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
689 |
|
|
Set property "syn_black_box = true" for instance .
|
690 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
691 |
|
|
Set property "syn_black_box = true" for instance .
|
692 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
693 |
|
|
Set property "syn_black_box = true" for instance .
|
694 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
695 |
|
|
Set property "syn_black_box = true" for instance .
|
696 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
697 |
|
|
Set property "syn_black_box = true" for instance .
|
698 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
699 |
|
|
Set property "syn_black_box = true" for instance .
|
700 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
701 |
|
|
Set property "syn_black_box = true" for instance .
|
702 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
703 |
|
|
Set property "syn_black_box = true" for instance .
|
704 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
705 |
|
|
Set property "syn_black_box = true" for instance .
|
706 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
707 |
|
|
Set property "syn_black_box = true" for instance .
|
708 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
709 |
|
|
Set property "syn_black_box = true" for instance .
|
710 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
711 |
|
|
Set property "syn_black_box = true" for instance .
|
712 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
713 |
|
|
Set property "syn_black_box = true" for instance .
|
714 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
715 |
|
|
Set property "syn_black_box = true" for instance .
|
716 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
717 |
|
|
Set property "syn_black_box = true" for instance .
|
718 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
719 |
|
|
Summary:
|
720 |
|
|
no macro.
|
721 |
|
|
Unit synthesized.
|
722 |
|
|
|
723 |
|
|
Synthesizing Unit .
|
724 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
725 |
|
|
d_width = 32
|
726 |
|
|
init_value = "00000000000000000100101011000000"
|
727 |
|
|
Summary:
|
728 |
|
|
no macro.
|
729 |
|
|
Unit synthesized.
|
730 |
|
|
|
731 |
|
|
Synthesizing Unit .
|
732 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
733 |
|
|
width = 32
|
734 |
|
|
init_index = 2
|
735 |
|
|
init_value = "00000000000000000100101011000000"
|
736 |
|
|
latency = 1
|
737 |
|
|
Summary:
|
738 |
|
|
no macro.
|
739 |
|
|
Unit synthesized.
|
740 |
|
|
|
741 |
|
|
Synthesizing Unit .
|
742 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
743 |
|
|
width = 32
|
744 |
|
|
init_index = 2
|
745 |
|
|
init_value = "00000000000000000100101011000000"
|
746 |
|
|
Set property "syn_black_box = true" for instance .
|
747 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
748 |
|
|
Set property "syn_black_box = true" for instance .
|
749 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
750 |
|
|
Set property "syn_black_box = true" for instance .
|
751 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
752 |
|
|
Set property "syn_black_box = true" for instance .
|
753 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
754 |
|
|
Set property "syn_black_box = true" for instance .
|
755 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
756 |
|
|
Set property "syn_black_box = true" for instance .
|
757 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
758 |
|
|
Set property "syn_black_box = true" for instance .
|
759 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
760 |
|
|
Set property "syn_black_box = true" for instance .
|
761 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
762 |
|
|
Set property "syn_black_box = true" for instance .
|
763 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
764 |
|
|
Set property "syn_black_box = true" for instance .
|
765 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
766 |
|
|
Set property "syn_black_box = true" for instance .
|
767 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
768 |
|
|
Set property "syn_black_box = true" for instance .
|
769 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
770 |
|
|
Set property "syn_black_box = true" for instance .
|
771 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
772 |
|
|
Set property "syn_black_box = true" for instance .
|
773 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
774 |
|
|
Set property "syn_black_box = true" for instance .
|
775 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
776 |
|
|
Set property "syn_black_box = true" for instance .
|
777 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
778 |
|
|
Set property "syn_black_box = true" for instance .
|
779 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
780 |
|
|
Set property "syn_black_box = true" for instance .
|
781 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
782 |
|
|
Set property "syn_black_box = true" for instance .
|
783 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
784 |
|
|
Set property "syn_black_box = true" for instance .
|
785 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
786 |
|
|
Set property "syn_black_box = true" for instance .
|
787 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
788 |
|
|
Set property "syn_black_box = true" for instance .
|
789 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
790 |
|
|
Set property "syn_black_box = true" for instance .
|
791 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
792 |
|
|
Set property "syn_black_box = true" for instance .
|
793 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
794 |
|
|
Set property "syn_black_box = true" for instance .
|
795 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
796 |
|
|
Set property "syn_black_box = true" for instance .
|
797 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
798 |
|
|
Set property "syn_black_box = true" for instance .
|
799 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
800 |
|
|
Set property "syn_black_box = true" for instance .
|
801 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
802 |
|
|
Set property "syn_black_box = true" for instance .
|
803 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
804 |
|
|
Set property "syn_black_box = true" for instance .
|
805 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
806 |
|
|
Set property "syn_black_box = true" for instance .
|
807 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
808 |
|
|
Set property "syn_black_box = true" for instance .
|
809 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
810 |
|
|
Summary:
|
811 |
|
|
no macro.
|
812 |
|
|
Unit synthesized.
|
813 |
|
|
|
814 |
|
|
Synthesizing Unit .
|
815 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
816 |
|
|
d_width = 64
|
817 |
|
|
init_value = "0000000000000000000000000000000000000000000000000000000000000000"
|
818 |
|
|
Summary:
|
819 |
|
|
no macro.
|
820 |
|
|
Unit synthesized.
|
821 |
|
|
|
822 |
|
|
Synthesizing Unit .
|
823 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
824 |
|
|
width = 64
|
825 |
|
|
init_index = 2
|
826 |
|
|
init_value = "0000000000000000000000000000000000000000000000000000000000000000"
|
827 |
|
|
latency = 1
|
828 |
|
|
Summary:
|
829 |
|
|
no macro.
|
830 |
|
|
Unit synthesized.
|
831 |
|
|
|
832 |
|
|
Synthesizing Unit .
|
833 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
834 |
|
|
width = 64
|
835 |
|
|
init_index = 2
|
836 |
|
|
init_value = "0000000000000000000000000000000000000000000000000000000000000000"
|
837 |
|
|
Set property "syn_black_box = true" for instance .
|
838 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
839 |
|
|
Set property "syn_black_box = true" for instance .
|
840 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
841 |
|
|
Set property "syn_black_box = true" for instance .
|
842 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
843 |
|
|
Set property "syn_black_box = true" for instance .
|
844 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
845 |
|
|
Set property "syn_black_box = true" for instance .
|
846 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
847 |
|
|
Set property "syn_black_box = true" for instance .
|
848 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
849 |
|
|
Set property "syn_black_box = true" for instance .
|
850 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
851 |
|
|
Set property "syn_black_box = true" for instance .
|
852 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
853 |
|
|
Set property "syn_black_box = true" for instance .
|
854 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
855 |
|
|
Set property "syn_black_box = true" for instance .
|
856 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
857 |
|
|
Set property "syn_black_box = true" for instance .
|
858 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
859 |
|
|
Set property "syn_black_box = true" for instance .
|
860 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
861 |
|
|
Set property "syn_black_box = true" for instance .
|
862 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
863 |
|
|
Set property "syn_black_box = true" for instance .
|
864 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
865 |
|
|
Set property "syn_black_box = true" for instance .
|
866 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
867 |
|
|
Set property "syn_black_box = true" for instance .
|
868 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
869 |
|
|
Set property "syn_black_box = true" for instance .
|
870 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
871 |
|
|
Set property "syn_black_box = true" for instance .
|
872 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
873 |
|
|
Set property "syn_black_box = true" for instance .
|
874 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
875 |
|
|
Set property "syn_black_box = true" for instance .
|
876 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
877 |
|
|
Set property "syn_black_box = true" for instance .
|
878 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
879 |
|
|
Set property "syn_black_box = true" for instance .
|
880 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
881 |
|
|
Set property "syn_black_box = true" for instance .
|
882 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
883 |
|
|
Set property "syn_black_box = true" for instance .
|
884 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
885 |
|
|
Set property "syn_black_box = true" for instance .
|
886 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
887 |
|
|
Set property "syn_black_box = true" for instance .
|
888 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
889 |
|
|
Set property "syn_black_box = true" for instance .
|
890 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
891 |
|
|
Set property "syn_black_box = true" for instance .
|
892 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
893 |
|
|
Set property "syn_black_box = true" for instance .
|
894 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
895 |
|
|
Set property "syn_black_box = true" for instance .
|
896 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
897 |
|
|
Set property "syn_black_box = true" for instance .
|
898 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
899 |
|
|
Set property "syn_black_box = true" for instance .
|
900 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
901 |
|
|
Set property "syn_black_box = true" for instance .
|
902 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
903 |
|
|
Set property "syn_black_box = true" for instance .
|
904 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
905 |
|
|
Set property "syn_black_box = true" for instance .
|
906 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
907 |
|
|
Set property "syn_black_box = true" for instance .
|
908 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
909 |
|
|
Set property "syn_black_box = true" for instance .
|
910 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
911 |
|
|
Set property "syn_black_box = true" for instance .
|
912 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
913 |
|
|
Set property "syn_black_box = true" for instance .
|
914 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
915 |
|
|
Set property "syn_black_box = true" for instance .
|
916 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
917 |
|
|
Set property "syn_black_box = true" for instance .
|
918 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
919 |
|
|
Set property "syn_black_box = true" for instance .
|
920 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
921 |
|
|
Set property "syn_black_box = true" for instance .
|
922 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
923 |
|
|
Set property "syn_black_box = true" for instance .
|
924 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
925 |
|
|
Set property "syn_black_box = true" for instance .
|
926 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
927 |
|
|
Set property "syn_black_box = true" for instance .
|
928 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
929 |
|
|
Set property "syn_black_box = true" for instance .
|
930 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
931 |
|
|
Set property "syn_black_box = true" for instance .
|
932 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
933 |
|
|
Set property "syn_black_box = true" for instance .
|
934 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
935 |
|
|
Set property "syn_black_box = true" for instance .
|
936 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
937 |
|
|
Set property "syn_black_box = true" for instance .
|
938 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
939 |
|
|
Set property "syn_black_box = true" for instance .
|
940 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
941 |
|
|
Set property "syn_black_box = true" for instance .
|
942 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
943 |
|
|
Set property "syn_black_box = true" for instance .
|
944 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
945 |
|
|
Set property "syn_black_box = true" for instance .
|
946 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
947 |
|
|
Set property "syn_black_box = true" for instance .
|
948 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
949 |
|
|
Set property "syn_black_box = true" for instance .
|
950 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
951 |
|
|
Set property "syn_black_box = true" for instance .
|
952 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
953 |
|
|
Set property "syn_black_box = true" for instance .
|
954 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
955 |
|
|
Set property "syn_black_box = true" for instance .
|
956 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
957 |
|
|
Set property "syn_black_box = true" for instance .
|
958 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
959 |
|
|
Set property "syn_black_box = true" for instance .
|
960 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
961 |
|
|
Set property "syn_black_box = true" for instance .
|
962 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
963 |
|
|
Set property "syn_black_box = true" for instance .
|
964 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
965 |
|
|
Summary:
|
966 |
|
|
no macro.
|
967 |
|
|
Unit synthesized.
|
968 |
|
|
|
969 |
|
|
Synthesizing Unit .
|
970 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
971 |
|
|
d_width = 8
|
972 |
|
|
init_value = "00000000"
|
973 |
|
|
Summary:
|
974 |
|
|
no macro.
|
975 |
|
|
Unit synthesized.
|
976 |
|
|
|
977 |
|
|
Synthesizing Unit .
|
978 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
979 |
|
|
width = 8
|
980 |
|
|
init_index = 2
|
981 |
|
|
init_value = "00000000"
|
982 |
|
|
latency = 1
|
983 |
|
|
Summary:
|
984 |
|
|
no macro.
|
985 |
|
|
Unit synthesized.
|
986 |
|
|
|
987 |
|
|
Synthesizing Unit .
|
988 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
989 |
|
|
width = 8
|
990 |
|
|
init_index = 2
|
991 |
|
|
init_value = "00000000"
|
992 |
|
|
Set property "syn_black_box = true" for instance .
|
993 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
994 |
|
|
Set property "syn_black_box = true" for instance .
|
995 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
996 |
|
|
Set property "syn_black_box = true" for instance .
|
997 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
998 |
|
|
Set property "syn_black_box = true" for instance .
|
999 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1000 |
|
|
Set property "syn_black_box = true" for instance .
|
1001 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1002 |
|
|
Set property "syn_black_box = true" for instance .
|
1003 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1004 |
|
|
Set property "syn_black_box = true" for instance .
|
1005 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1006 |
|
|
Set property "syn_black_box = true" for instance .
|
1007 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1008 |
|
|
Summary:
|
1009 |
|
|
no macro.
|
1010 |
|
|
Unit synthesized.
|
1011 |
|
|
|
1012 |
|
|
Synthesizing Unit .
|
1013 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1014 |
|
|
d_width = 72
|
1015 |
|
|
init_value = "000000000000000000000000000000000000000000000000000000000000000000000000"
|
1016 |
|
|
Summary:
|
1017 |
|
|
no macro.
|
1018 |
|
|
Unit synthesized.
|
1019 |
|
|
|
1020 |
|
|
Synthesizing Unit .
|
1021 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1022 |
|
|
width = 72
|
1023 |
|
|
init_index = 2
|
1024 |
|
|
init_value = "000000000000000000000000000000000000000000000000000000000000000000000000"
|
1025 |
|
|
latency = 1
|
1026 |
|
|
Summary:
|
1027 |
|
|
no macro.
|
1028 |
|
|
Unit synthesized.
|
1029 |
|
|
|
1030 |
|
|
Synthesizing Unit .
|
1031 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1032 |
|
|
width = 72
|
1033 |
|
|
init_index = 2
|
1034 |
|
|
init_value = "000000000000000000000000000000000000000000000000000000000000000000000000"
|
1035 |
|
|
Set property "syn_black_box = true" for instance .
|
1036 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1037 |
|
|
Set property "syn_black_box = true" for instance .
|
1038 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1039 |
|
|
Set property "syn_black_box = true" for instance .
|
1040 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1041 |
|
|
Set property "syn_black_box = true" for instance .
|
1042 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1043 |
|
|
Set property "syn_black_box = true" for instance .
|
1044 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1045 |
|
|
Set property "syn_black_box = true" for instance .
|
1046 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1047 |
|
|
Set property "syn_black_box = true" for instance .
|
1048 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1049 |
|
|
Set property "syn_black_box = true" for instance .
|
1050 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1051 |
|
|
Set property "syn_black_box = true" for instance .
|
1052 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1053 |
|
|
Set property "syn_black_box = true" for instance .
|
1054 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1055 |
|
|
Set property "syn_black_box = true" for instance .
|
1056 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1057 |
|
|
Set property "syn_black_box = true" for instance .
|
1058 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1059 |
|
|
Set property "syn_black_box = true" for instance .
|
1060 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1061 |
|
|
Set property "syn_black_box = true" for instance .
|
1062 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1063 |
|
|
Set property "syn_black_box = true" for instance .
|
1064 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1065 |
|
|
Set property "syn_black_box = true" for instance .
|
1066 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1067 |
|
|
Set property "syn_black_box = true" for instance .
|
1068 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1069 |
|
|
Set property "syn_black_box = true" for instance .
|
1070 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1071 |
|
|
Set property "syn_black_box = true" for instance .
|
1072 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1073 |
|
|
Set property "syn_black_box = true" for instance .
|
1074 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1075 |
|
|
Set property "syn_black_box = true" for instance .
|
1076 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1077 |
|
|
Set property "syn_black_box = true" for instance .
|
1078 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1079 |
|
|
Set property "syn_black_box = true" for instance .
|
1080 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1081 |
|
|
Set property "syn_black_box = true" for instance .
|
1082 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1083 |
|
|
Set property "syn_black_box = true" for instance .
|
1084 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1085 |
|
|
Set property "syn_black_box = true" for instance .
|
1086 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1087 |
|
|
Set property "syn_black_box = true" for instance .
|
1088 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1089 |
|
|
Set property "syn_black_box = true" for instance .
|
1090 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1091 |
|
|
Set property "syn_black_box = true" for instance .
|
1092 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1093 |
|
|
Set property "syn_black_box = true" for instance .
|
1094 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1095 |
|
|
Set property "syn_black_box = true" for instance .
|
1096 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1097 |
|
|
Set property "syn_black_box = true" for instance .
|
1098 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1099 |
|
|
Set property "syn_black_box = true" for instance .
|
1100 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1101 |
|
|
Set property "syn_black_box = true" for instance .
|
1102 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1103 |
|
|
Set property "syn_black_box = true" for instance .
|
1104 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1105 |
|
|
Set property "syn_black_box = true" for instance .
|
1106 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1107 |
|
|
Set property "syn_black_box = true" for instance .
|
1108 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1109 |
|
|
Set property "syn_black_box = true" for instance .
|
1110 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1111 |
|
|
Set property "syn_black_box = true" for instance .
|
1112 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1113 |
|
|
Set property "syn_black_box = true" for instance .
|
1114 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1115 |
|
|
Set property "syn_black_box = true" for instance .
|
1116 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1117 |
|
|
Set property "syn_black_box = true" for instance .
|
1118 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1119 |
|
|
Set property "syn_black_box = true" for instance .
|
1120 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1121 |
|
|
Set property "syn_black_box = true" for instance .
|
1122 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1123 |
|
|
Set property "syn_black_box = true" for instance .
|
1124 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1125 |
|
|
Set property "syn_black_box = true" for instance .
|
1126 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1127 |
|
|
Set property "syn_black_box = true" for instance .
|
1128 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1129 |
|
|
Set property "syn_black_box = true" for instance .
|
1130 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1131 |
|
|
Set property "syn_black_box = true" for instance .
|
1132 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1133 |
|
|
Set property "syn_black_box = true" for instance .
|
1134 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1135 |
|
|
Set property "syn_black_box = true" for instance .
|
1136 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1137 |
|
|
Set property "syn_black_box = true" for instance .
|
1138 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1139 |
|
|
Set property "syn_black_box = true" for instance .
|
1140 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1141 |
|
|
Set property "syn_black_box = true" for instance .
|
1142 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1143 |
|
|
Set property "syn_black_box = true" for instance .
|
1144 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1145 |
|
|
Set property "syn_black_box = true" for instance .
|
1146 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1147 |
|
|
Set property "syn_black_box = true" for instance .
|
1148 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1149 |
|
|
Set property "syn_black_box = true" for instance .
|
1150 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1151 |
|
|
Set property "syn_black_box = true" for instance .
|
1152 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1153 |
|
|
Set property "syn_black_box = true" for instance .
|
1154 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1155 |
|
|
Set property "syn_black_box = true" for instance .
|
1156 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1157 |
|
|
Set property "syn_black_box = true" for instance .
|
1158 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1159 |
|
|
Set property "syn_black_box = true" for instance .
|
1160 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1161 |
|
|
Set property "syn_black_box = true" for instance .
|
1162 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1163 |
|
|
Set property "syn_black_box = true" for instance .
|
1164 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1165 |
|
|
Set property "syn_black_box = true" for instance .
|
1166 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1167 |
|
|
Set property "syn_black_box = true" for instance .
|
1168 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1169 |
|
|
Set property "syn_black_box = true" for instance .
|
1170 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1171 |
|
|
Set property "syn_black_box = true" for instance .
|
1172 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1173 |
|
|
Set property "syn_black_box = true" for instance .
|
1174 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1175 |
|
|
Set property "syn_black_box = true" for instance .
|
1176 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1177 |
|
|
Set property "syn_black_box = true" for instance .
|
1178 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1179 |
|
|
Summary:
|
1180 |
|
|
no macro.
|
1181 |
|
|
Unit synthesized.
|
1182 |
|
|
|
1183 |
|
|
Synthesizing Unit .
|
1184 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1185 |
|
|
d_width = 15
|
1186 |
|
|
init_value = "000000000000000"
|
1187 |
|
|
Summary:
|
1188 |
|
|
no macro.
|
1189 |
|
|
Unit synthesized.
|
1190 |
|
|
|
1191 |
|
|
Synthesizing Unit .
|
1192 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1193 |
|
|
width = 15
|
1194 |
|
|
init_index = 2
|
1195 |
|
|
init_value = "000000000000000"
|
1196 |
|
|
latency = 1
|
1197 |
|
|
Summary:
|
1198 |
|
|
no macro.
|
1199 |
|
|
Unit synthesized.
|
1200 |
|
|
|
1201 |
|
|
Synthesizing Unit .
|
1202 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1203 |
|
|
width = 15
|
1204 |
|
|
init_index = 2
|
1205 |
|
|
init_value = "000000000000000"
|
1206 |
|
|
Set property "syn_black_box = true" for instance .
|
1207 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1208 |
|
|
Set property "syn_black_box = true" for instance .
|
1209 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1210 |
|
|
Set property "syn_black_box = true" for instance .
|
1211 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1212 |
|
|
Set property "syn_black_box = true" for instance .
|
1213 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1214 |
|
|
Set property "syn_black_box = true" for instance .
|
1215 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1216 |
|
|
Set property "syn_black_box = true" for instance .
|
1217 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1218 |
|
|
Set property "syn_black_box = true" for instance .
|
1219 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1220 |
|
|
Set property "syn_black_box = true" for instance .
|
1221 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1222 |
|
|
Set property "syn_black_box = true" for instance .
|
1223 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1224 |
|
|
Set property "syn_black_box = true" for instance .
|
1225 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1226 |
|
|
Set property "syn_black_box = true" for instance .
|
1227 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1228 |
|
|
Set property "syn_black_box = true" for instance .
|
1229 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1230 |
|
|
Set property "syn_black_box = true" for instance .
|
1231 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1232 |
|
|
Set property "syn_black_box = true" for instance .
|
1233 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1234 |
|
|
Set property "syn_black_box = true" for instance .
|
1235 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1236 |
|
|
Summary:
|
1237 |
|
|
no macro.
|
1238 |
|
|
Unit synthesized.
|
1239 |
|
|
|
1240 |
|
|
Synthesizing Unit .
|
1241 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1242 |
|
|
d_width = 32
|
1243 |
|
|
init_value = "00000000000000000000000000000001"
|
1244 |
|
|
Summary:
|
1245 |
|
|
no macro.
|
1246 |
|
|
Unit synthesized.
|
1247 |
|
|
|
1248 |
|
|
Synthesizing Unit .
|
1249 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1250 |
|
|
width = 32
|
1251 |
|
|
init_index = 2
|
1252 |
|
|
init_value = "00000000000000000000000000000001"
|
1253 |
|
|
latency = 1
|
1254 |
|
|
Summary:
|
1255 |
|
|
no macro.
|
1256 |
|
|
Unit synthesized.
|
1257 |
|
|
|
1258 |
|
|
Synthesizing Unit .
|
1259 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1260 |
|
|
width = 32
|
1261 |
|
|
init_index = 2
|
1262 |
|
|
init_value = "00000000000000000000000000000001"
|
1263 |
|
|
Set property "syn_black_box = true" for instance .
|
1264 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1265 |
|
|
Set property "syn_black_box = true" for instance .
|
1266 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1267 |
|
|
Set property "syn_black_box = true" for instance .
|
1268 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1269 |
|
|
Set property "syn_black_box = true" for instance .
|
1270 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1271 |
|
|
Set property "syn_black_box = true" for instance .
|
1272 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1273 |
|
|
Set property "syn_black_box = true" for instance .
|
1274 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1275 |
|
|
Set property "syn_black_box = true" for instance .
|
1276 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1277 |
|
|
Set property "syn_black_box = true" for instance .
|
1278 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1279 |
|
|
Set property "syn_black_box = true" for instance .
|
1280 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1281 |
|
|
Set property "syn_black_box = true" for instance .
|
1282 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1283 |
|
|
Set property "syn_black_box = true" for instance .
|
1284 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1285 |
|
|
Set property "syn_black_box = true" for instance .
|
1286 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1287 |
|
|
Set property "syn_black_box = true" for instance .
|
1288 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1289 |
|
|
Set property "syn_black_box = true" for instance .
|
1290 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1291 |
|
|
Set property "syn_black_box = true" for instance .
|
1292 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1293 |
|
|
Set property "syn_black_box = true" for instance .
|
1294 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1295 |
|
|
Set property "syn_black_box = true" for instance .
|
1296 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1297 |
|
|
Set property "syn_black_box = true" for instance .
|
1298 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1299 |
|
|
Set property "syn_black_box = true" for instance .
|
1300 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1301 |
|
|
Set property "syn_black_box = true" for instance .
|
1302 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1303 |
|
|
Set property "syn_black_box = true" for instance .
|
1304 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1305 |
|
|
Set property "syn_black_box = true" for instance .
|
1306 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1307 |
|
|
Set property "syn_black_box = true" for instance .
|
1308 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1309 |
|
|
Set property "syn_black_box = true" for instance .
|
1310 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1311 |
|
|
Set property "syn_black_box = true" for instance .
|
1312 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1313 |
|
|
Set property "syn_black_box = true" for instance .
|
1314 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1315 |
|
|
Set property "syn_black_box = true" for instance .
|
1316 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1317 |
|
|
Set property "syn_black_box = true" for instance .
|
1318 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1319 |
|
|
Set property "syn_black_box = true" for instance .
|
1320 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1321 |
|
|
Set property "syn_black_box = true" for instance .
|
1322 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1323 |
|
|
Set property "syn_black_box = true" for instance .
|
1324 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1325 |
|
|
Set property "syn_black_box = true" for instance .
|
1326 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1327 |
|
|
Summary:
|
1328 |
|
|
no macro.
|
1329 |
|
|
Unit synthesized.
|
1330 |
|
|
|
1331 |
|
|
Synthesizing Unit .
|
1332 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1333 |
|
|
d_width = 32
|
1334 |
|
|
init_value = "10000000000000000000000000000000"
|
1335 |
|
|
Summary:
|
1336 |
|
|
no macro.
|
1337 |
|
|
Unit synthesized.
|
1338 |
|
|
|
1339 |
|
|
Synthesizing Unit .
|
1340 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1341 |
|
|
width = 32
|
1342 |
|
|
init_index = 2
|
1343 |
|
|
init_value = "10000000000000000000000000000000"
|
1344 |
|
|
latency = 1
|
1345 |
|
|
Summary:
|
1346 |
|
|
no macro.
|
1347 |
|
|
Unit synthesized.
|
1348 |
|
|
|
1349 |
|
|
Synthesizing Unit .
|
1350 |
|
|
Related source file is "c:/temp/xilinx pci express/ml605_ise13.3/myuserlogic/userlogic_00/top_level_1_pcie_userlogic_00_user_logic/synth_model/user_logic.vhd".
|
1351 |
|
|
width = 32
|
1352 |
|
|
init_index = 2
|
1353 |
|
|
init_value = "10000000000000000000000000000000"
|
1354 |
|
|
Set property "syn_black_box = true" for instance .
|
1355 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1356 |
|
|
Set property "syn_black_box = true" for instance .
|
1357 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1358 |
|
|
Set property "syn_black_box = true" for instance .
|
1359 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1360 |
|
|
Set property "syn_black_box = true" for instance .
|
1361 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1362 |
|
|
Set property "syn_black_box = true" for instance .
|
1363 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1364 |
|
|
Set property "syn_black_box = true" for instance .
|
1365 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1366 |
|
|
Set property "syn_black_box = true" for instance .
|
1367 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1368 |
|
|
Set property "syn_black_box = true" for instance .
|
1369 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1370 |
|
|
Set property "syn_black_box = true" for instance .
|
1371 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1372 |
|
|
Set property "syn_black_box = true" for instance .
|
1373 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1374 |
|
|
Set property "syn_black_box = true" for instance .
|
1375 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1376 |
|
|
Set property "syn_black_box = true" for instance .
|
1377 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1378 |
|
|
Set property "syn_black_box = true" for instance .
|
1379 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1380 |
|
|
Set property "syn_black_box = true" for instance .
|
1381 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1382 |
|
|
Set property "syn_black_box = true" for instance .
|
1383 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1384 |
|
|
Set property "syn_black_box = true" for instance .
|
1385 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1386 |
|
|
Set property "syn_black_box = true" for instance .
|
1387 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1388 |
|
|
Set property "syn_black_box = true" for instance .
|
1389 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1390 |
|
|
Set property "syn_black_box = true" for instance .
|
1391 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1392 |
|
|
Set property "syn_black_box = true" for instance .
|
1393 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1394 |
|
|
Set property "syn_black_box = true" for instance .
|
1395 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1396 |
|
|
Set property "syn_black_box = true" for instance .
|
1397 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1398 |
|
|
Set property "syn_black_box = true" for instance .
|
1399 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1400 |
|
|
Set property "syn_black_box = true" for instance .
|
1401 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1402 |
|
|
Set property "syn_black_box = true" for instance .
|
1403 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1404 |
|
|
Set property "syn_black_box = true" for instance .
|
1405 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1406 |
|
|
Set property "syn_black_box = true" for instance .
|
1407 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1408 |
|
|
Set property "syn_black_box = true" for instance .
|
1409 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1410 |
|
|
Set property "syn_black_box = true" for instance .
|
1411 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1412 |
|
|
Set property "syn_black_box = true" for instance .
|
1413 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1414 |
|
|
Set property "syn_black_box = true" for instance .
|
1415 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1416 |
|
|
Set property "syn_black_box = true" for instance .
|
1417 |
|
|
WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.
|
1418 |
|
|
Summary:
|
1419 |
|
|
no macro.
|
1420 |
|
|
Unit synthesized.
|
1421 |
|
|
|
1422 |
|
|
=========================================================================
|
1423 |
|
|
HDL Synthesis Report
|
1424 |
|
|
|
1425 |
|
|
Found no macro
|
1426 |
|
|
=========================================================================
|
1427 |
|
|
|
1428 |
|
|
=========================================================================
|
1429 |
|
|
* Advanced HDL Synthesis *
|
1430 |
|
|
=========================================================================
|
1431 |
|
|
|
1432 |
|
|
Reading core .
|
1433 |
|
|
Reading core .
|
1434 |
|
|
Reading core .
|
1435 |
|
|
Reading core .
|
1436 |
|
|
Loading core for timing and area information for instance .
|
1437 |
|
|
Loading core for timing and area information for instance .
|
1438 |
|
|
Loading core for timing and area information for instance .
|
1439 |
|
|
Loading core for timing and area information for instance .
|
1440 |
|
|
INFO:Xst:1901 - Instance U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36 in unit U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36 of type RAMB36 has been replaced by RAMB36E1
|
1441 |
|
|
INFO:Xst:1901 - Instance U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36 in unit U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36 of type RAMB36 has been replaced by RAMB36E1
|
1442 |
|
|
INFO:Xst:1901 - Instance U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36 in unit U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36 of type RAMB36 has been replaced by RAMB36E1
|
1443 |
|
|
INFO:Xst:1901 - Instance U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36 in unit U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36 of type RAMB36 has been replaced by RAMB36E1
|
1444 |
|
|
INFO:Xst:1901 - Instance U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36 in unit U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36 of type RAMB36 has been replaced by RAMB36E1
|
1445 |
|
|
|
1446 |
|
|
=========================================================================
|
1447 |
|
|
Advanced HDL Synthesis Report
|
1448 |
|
|
|
1449 |
|
|
Macro Statistics
|
1450 |
|
|
# Registers : 1329
|
1451 |
|
|
Flip-Flops : 1329
|
1452 |
|
|
|
1453 |
|
|
=========================================================================
|
1454 |
|
|
|
1455 |
|
|
=========================================================================
|
1456 |
|
|
* Low Level Synthesis *
|
1457 |
|
|
=========================================================================
|
1458 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1459 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1460 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1461 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1462 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1463 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1464 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1465 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1466 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1467 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1468 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1469 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1470 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1471 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1472 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1473 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1474 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1475 |
|
|
WARNING:Xst:1989 - Unit : instances , of unit are equivalent, second instance is removed
|
1476 |
|
|
|
1477 |
|
|
Optimizing unit ...
|
1478 |
|
|
|
1479 |
|
|
Optimizing unit ...
|
1480 |
|
|
|
1481 |
|
|
Optimizing unit ...
|
1482 |
|
|
|
1483 |
|
|
Optimizing unit ...
|
1484 |
|
|
|
1485 |
|
|
Optimizing unit ...
|
1486 |
|
|
|
1487 |
|
|
Optimizing unit ...
|
1488 |
|
|
|
1489 |
|
|
Optimizing unit ...
|
1490 |
|
|
|
1491 |
|
|
Optimizing unit ...
|
1492 |
|
|
|
1493 |
|
|
Optimizing unit ...
|
1494 |
|
|
|
1495 |
|
|
Optimizing unit ...
|
1496 |
|
|
|
1497 |
|
|
Optimizing unit ...
|
1498 |
|
|
|
1499 |
|
|
Optimizing unit ...
|
1500 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1501 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1502 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1503 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1504 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1505 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1506 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1507 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1508 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1509 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1510 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1511 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1512 |
|
|
|
1513 |
|
|
Mapping all equations...
|
1514 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1515 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1516 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1517 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1518 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1519 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1520 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1521 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1522 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1523 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1524 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1525 |
|
|
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1526 |
|
|
Annotating constraints using XCF file 'user_logic_cw.xcf'
|
1527 |
|
|
XCF parsing done.
|
1528 |
|
|
WARNING:Xst:1513 - No elements found for TNM 'D_CLK' on object 'user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_G2_SQ.U_CAPCTRL/U_CAP_ADDRGEN/U_SCNT_CMP/I_CS_GAND.U_CS_GAND_SRL/I_V6.U_CS_GAND_SRL_V6/I_USE_RPM_EQ0.U_GAND_SRL_SET/CLK_I'.
|
1529 |
|
|
WARNING:Xst:1513 - No elements found for TNM 'D_CLK' on object 'user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_G2_SQ.U_CAPCTRL/U_CAP_ADDRGEN/U_WCNT_HCMP/I_CS_GAND.U_CS_GAND_SRL/I_V6.U_CS_GAND_SRL_V6/I_USE_RPM_EQ0.U_GAND_SRL_SET/CLK_I'.
|
1530 |
|
|
WARNING:Xst:1513 - No elements found for TNM 'D_CLK' on object 'user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_G2_SQ.U_CAPCTRL/U_CAP_ADDRGEN/U_WCNT_LCMP/I_CS_GAND.U_CS_GAND_SRL/I_V6.U_CS_GAND_SRL_V6/I_USE_RPM_EQ0.U_GAND_SRL_SET/CLK_I'.
|
1531 |
|
|
Building and optimizing final netlist ...
|
1532 |
|
|
Found area constraint ratio of 100 (+ 0) on block user_logic_cw, actual ratio is 1.
|
1533 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1534 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1535 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1536 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1537 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1538 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1539 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1540 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1541 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1542 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1543 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1544 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1545 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1546 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1547 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1548 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1549 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1550 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1551 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1552 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1553 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1554 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1555 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1556 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1557 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1558 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1559 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1560 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1561 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1562 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1563 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1564 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1565 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1566 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1567 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1568 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1569 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1570 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1571 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1572 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1573 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1574 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1575 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following 2 FFs/Latches :
|
1576 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1577 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1578 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1579 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1580 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1581 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1582 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1583 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1584 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1585 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1586 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1587 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1588 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1589 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1590 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1591 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1592 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1593 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1594 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following 7 FFs/Latches :
|
1595 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1596 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1597 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1598 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1599 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1600 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1601 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1602 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1603 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1604 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1605 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1606 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1607 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1608 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1609 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1610 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1611 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1612 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1613 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1614 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1615 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1616 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1617 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1618 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1619 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1620 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1621 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1622 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1623 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1624 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1625 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1626 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1627 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1628 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1629 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1630 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1631 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1632 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1633 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1634 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1635 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1636 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1637 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1638 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1639 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1640 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1641 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1642 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1643 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1644 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1645 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1646 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1647 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1648 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1649 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1650 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1651 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1652 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1653 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1654 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1655 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1656 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1657 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1658 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1659 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1660 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1661 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1662 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1663 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1664 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1665 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1666 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1667 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1668 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1669 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1670 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1671 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1672 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1673 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1674 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1675 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1676 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1677 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1678 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1679 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1680 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1681 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1682 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1683 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1684 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1685 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1686 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1687 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1688 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1689 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1690 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1691 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1692 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1693 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1694 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1695 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1696 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1697 |
|
|
INFO:Xst:2260 - The FF/Latch in Unit is equivalent to the following FF/Latch :
|
1698 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1699 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1700 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1701 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1702 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1703 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1704 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1705 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1706 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1707 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1708 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1709 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1710 |
|
|
|
1711 |
|
|
Final Macro Processing ...
|
1712 |
|
|
|
1713 |
|
|
=========================================================================
|
1714 |
|
|
Final Register Report
|
1715 |
|
|
|
1716 |
|
|
Macro Statistics
|
1717 |
|
|
# Registers : 1329
|
1718 |
|
|
Flip-Flops : 1329
|
1719 |
|
|
|
1720 |
|
|
=========================================================================
|
1721 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1722 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1723 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1724 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1725 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1726 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1727 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1728 |
|
|
WARNING:Xst:1710 - FF/Latch (without init value) has a constant value of 0 in block . This FF/Latch will be trimmed during the optimization process.
|
1729 |
|
|
|
1730 |
|
|
=========================================================================
|
1731 |
|
|
* Partition Report *
|
1732 |
|
|
=========================================================================
|
1733 |
|
|
|
1734 |
|
|
Partition Implementation Status
|
1735 |
|
|
-------------------------------
|
1736 |
|
|
|
1737 |
|
|
No Partitions were found in this design.
|
1738 |
|
|
|
1739 |
|
|
-------------------------------
|
1740 |
|
|
|
1741 |
|
|
=========================================================================
|
1742 |
|
|
* Design Summary *
|
1743 |
|
|
=========================================================================
|
1744 |
|
|
|
1745 |
|
|
Top Level Output File Name : user_logic_cw.ngc
|
1746 |
|
|
|
1747 |
|
|
Primitive and Black Box Usage:
|
1748 |
|
|
------------------------------
|
1749 |
|
|
# BELS : 617
|
1750 |
|
|
# GND : 29
|
1751 |
|
|
# INV : 9
|
1752 |
|
|
# LUT1 : 74
|
1753 |
|
|
# LUT2 : 26
|
1754 |
|
|
# LUT3 : 24
|
1755 |
|
|
# LUT4 : 105
|
1756 |
|
|
# LUT5 : 2
|
1757 |
|
|
# LUT6 : 63
|
1758 |
|
|
# MUXCY : 11
|
1759 |
|
|
# MUXCY_L : 149
|
1760 |
|
|
# MUXF5 : 2
|
1761 |
|
|
# MUXF6 : 1
|
1762 |
|
|
# MUXF7 : 9
|
1763 |
|
|
# MUXF8 : 2
|
1764 |
|
|
# VCC : 37
|
1765 |
|
|
# XORCY : 74
|
1766 |
|
|
# FlipFlops/Latches : 2132
|
1767 |
|
|
# FD : 370
|
1768 |
|
|
# FDC : 9
|
1769 |
|
|
# FDCE : 16
|
1770 |
|
|
# FDE : 32
|
1771 |
|
|
# FDP : 196
|
1772 |
|
|
# FDR : 52
|
1773 |
|
|
# FDRE : 1411
|
1774 |
|
|
# FDS : 30
|
1775 |
|
|
# FDSE : 15
|
1776 |
|
|
# LDC : 1
|
1777 |
|
|
# RAMS : 6
|
1778 |
|
|
# RAMB18E1 : 1
|
1779 |
|
|
# RAMB36E1 : 5
|
1780 |
|
|
# Shift Registers : 292
|
1781 |
|
|
# SRL16 : 184
|
1782 |
|
|
# SRL16E : 1
|
1783 |
|
|
# SRLC16E : 10
|
1784 |
|
|
# SRLC32E : 97
|
1785 |
|
|
# Clock Buffers : 1
|
1786 |
|
|
# BUFG : 1
|
1787 |
|
|
# Others : 4
|
1788 |
|
|
# BSCAN_VIRTEX6 : 1
|
1789 |
|
|
# TIMESPEC : 3
|
1790 |
|
|
|
1791 |
|
|
Device utilization summary:
|
1792 |
|
|
---------------------------
|
1793 |
|
|
|
1794 |
|
|
Selected Device : 6vlx240tff1156-1
|
1795 |
|
|
|
1796 |
|
|
|
1797 |
|
|
Slice Logic Utilization:
|
1798 |
|
|
Number of Slice Registers: 2132 out of 301440 0%
|
1799 |
|
|
Number of Slice LUTs: 595 out of 150720 0%
|
1800 |
|
|
Number used as Logic: 303 out of 150720 0%
|
1801 |
|
|
Number used as Memory: 292 out of 58400 0%
|
1802 |
|
|
Number used as SRL: 292
|
1803 |
|
|
|
1804 |
|
|
Slice Logic Distribution:
|
1805 |
|
|
Number of LUT Flip Flop pairs used: 2450
|
1806 |
|
|
Number with an unused Flip Flop: 318 out of 2450 12%
|
1807 |
|
|
Number with an unused LUT: 1855 out of 2450 75%
|
1808 |
|
|
Number of fully used LUT-FF pairs: 277 out of 2450 11%
|
1809 |
|
|
Number of unique control sets: 89
|
1810 |
|
|
|
1811 |
|
|
IO Utilization:
|
1812 |
|
|
Number of IOs: 1976
|
1813 |
|
|
Number of bonded IOBs: 0 out of 600 0%
|
1814 |
|
|
|
1815 |
|
|
Specific Feature Utilization:
|
1816 |
|
|
Number of Block RAM/FIFO: 6 out of 416 1%
|
1817 |
|
|
Number using Block RAM only: 6
|
1818 |
|
|
Number of BUFG/BUFGCTRLs: 1 out of 32 3%
|
1819 |
|
|
|
1820 |
|
|
---------------------------
|
1821 |
|
|
Partition Resource Summary:
|
1822 |
|
|
---------------------------
|
1823 |
|
|
|
1824 |
|
|
No Partitions were found in this design.
|
1825 |
|
|
|
1826 |
|
|
---------------------------
|
1827 |
|
|
|
1828 |
|
|
|
1829 |
|
|
=========================================================================
|
1830 |
|
|
Timing Report
|
1831 |
|
|
|
1832 |
|
|
NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
|
1833 |
|
|
FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
|
1834 |
|
|
GENERATED AFTER PLACE-and-ROUTE.
|
1835 |
|
|
|
1836 |
|
|
Clock Information:
|
1837 |
|
|
------------------
|
1838 |
|
|
------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------+
|
1839 |
|
|
Clock Signal | Clock buffer(FF name) | Load |
|
1840 |
|
|
------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------+
|
1841 |
|
|
to_register_clk | NONE(default_clock_driver_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_array[0].bit_is_0.fdre_comp)| 2225 |
|
1842 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/I_YES_BSCAN.U_BS/iDRCK_LOCAL | BUFG | 209 |
|
1843 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/CONTROL0(13)(user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_CTRL_OUT/F_NCP[0].F_CMD[9].U_LCE:O)| NONE(*)(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_STAT/U_DIRTY_LDC) | 1 |
|
1844 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT | NONE(user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD) | 1 |
|
1845 |
|
|
------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------+
|
1846 |
|
|
(*) This 1 clock signal(s) are generated by combinatorial logic,
|
1847 |
|
|
and XST is not able to identify which are the primary clock signals.
|
1848 |
|
|
Please use the CLOCK_SIGNAL constraint to specify the clock signal(s) generated by combinatorial logic.
|
1849 |
|
|
INFO:Xst:2169 - HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
|
1850 |
|
|
|
1851 |
|
|
Asynchronous Control Signals Information:
|
1852 |
|
|
----------------------------------------
|
1853 |
|
|
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------+
|
1854 |
|
|
Control Signal | Buffer(FF name) | Load |
|
1855 |
|
|
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------+
|
1856 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36/N11(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36/XST_VCC:P)| NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36)| 124 |
|
1857 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36/N11(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36/XST_VCC:P)| NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36)| 124 |
|
1858 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/N11(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/XST_VCC:P)| NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36)| 124 |
|
1859 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36/N11(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36/XST_VCC:P)| NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36)| 124 |
|
1860 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36/N11(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36/XST_VCC:P)| NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36)| 124 |
|
1861 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36/N0(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36/XST_GND:G) | NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[0].u_ramb36/U_RAMB36)| 72 |
|
1862 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36/N0(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36/XST_GND:G) | NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[1].u_ramb36/U_RAMB36)| 72 |
|
1863 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/N0(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/XST_GND:G) | NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36)| 72 |
|
1864 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36/N0(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36/XST_GND:G) | NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[3].u_ramb36/U_RAMB36)| 72 |
|
1865 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36/N0(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36/XST_GND:G) | NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[4].u_ramb36/U_RAMB36)| 72 |
|
1866 |
|
|
user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_STAT/U_ECR_glue_set(user_logic_x0/chipscope/i_ila/XST_VCC:P) | NONE(user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36/U0/I_NO_D.U_ILA/U_CAPSTOR/I_CASE1.I_YES_TB.U_TRACE_BUFFER/U_RAM/I_V6.U_CS_BRAM_CASCADE_V6/I_DEPTH_LTEQ_32K.U_SBRAM_0/I_B36KGT0.G_RAMB36[2].u_ramb36/U_RAMB36)| 20 |
|
1867 |
|
|
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------+
|
1868 |
|
|
|
1869 |
|
|
Timing Summary:
|
1870 |
|
|
---------------
|
1871 |
|
|
Speed Grade: -1
|
1872 |
|
|
|
1873 |
|
|
Minimum period: 5.669ns (Maximum Frequency: 176.398MHz)
|
1874 |
|
|
Minimum input arrival time before clock: 1.383ns
|
1875 |
|
|
Maximum output required time after clock: 0.375ns
|
1876 |
|
|
Maximum combinational path delay: 0.000ns
|
1877 |
|
|
|
1878 |
|
|
=========================================================================
|
1879 |
|
|
Timing constraint: TS_D2_TO_T2 = FROM TIMEGRP "D2_CLK" TO TIMEGRP "FFS" TIG;
|
1880 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
1881 |
|
|
Total number of paths / destination ports: 3 / 3
|
1882 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
1883 |
|
|
-------------------------------------------------------------------------
|
1884 |
|
|
Delay: -2.606ns
|
1885 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
1886 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1887 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
1888 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
1889 |
|
|
Destination Clock: to_register_clk rising at 0.000ns
|
1890 |
|
|
|
1891 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1892 |
|
|
Gate Net
|
1893 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
1894 |
|
|
---------------------------------------- ------------
|
1895 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
1896 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
1897 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
1898 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
1899 |
|
|
----------------------------------------
|
1900 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
1901 |
|
|
(39.5% logic, 60.5% route)
|
1902 |
|
|
|
1903 |
|
|
=========================================================================
|
1904 |
|
|
Timing constraint: TS_J2_TO_D2 = FROM TIMEGRP "FFS" TO TIMEGRP "D2_CLK" TIG;
|
1905 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
1906 |
|
|
Total number of paths / destination ports: 1 / 1
|
1907 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
1908 |
|
|
-------------------------------------------------------------------------
|
1909 |
|
|
Delay: -2.606ns
|
1910 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
1911 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1912 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
1913 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
1914 |
|
|
Destination Clock: to_register_clk rising at 0.000ns
|
1915 |
|
|
|
1916 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1917 |
|
|
Gate Net
|
1918 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
1919 |
|
|
---------------------------------------- ------------
|
1920 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
1921 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
1922 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
1923 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
1924 |
|
|
----------------------------------------
|
1925 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
1926 |
|
|
(39.5% logic, 60.5% route)
|
1927 |
|
|
|
1928 |
|
|
=========================================================================
|
1929 |
|
|
Timing constraint: TS_J3_TO_D2 = FROM TIMEGRP "FFS" TO TIMEGRP "D2_CLK" TIG;
|
1930 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
1931 |
|
|
Total number of paths / destination ports: 1 / 1
|
1932 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
1933 |
|
|
-------------------------------------------------------------------------
|
1934 |
|
|
Delay: -2.606ns
|
1935 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
1936 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1937 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
1938 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
1939 |
|
|
Destination Clock: to_register_clk rising at 0.000ns
|
1940 |
|
|
|
1941 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1942 |
|
|
Gate Net
|
1943 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
1944 |
|
|
---------------------------------------- ------------
|
1945 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
1946 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
1947 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
1948 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
1949 |
|
|
----------------------------------------
|
1950 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
1951 |
|
|
(39.5% logic, 60.5% route)
|
1952 |
|
|
|
1953 |
|
|
=========================================================================
|
1954 |
|
|
Timing constraint: TS_J4_TO_D2 = FROM TIMEGRP "FFS" TO TIMEGRP "D2_CLK" TIG;
|
1955 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
1956 |
|
|
Total number of paths / destination ports: 1 / 1
|
1957 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
1958 |
|
|
-------------------------------------------------------------------------
|
1959 |
|
|
Delay: -2.606ns
|
1960 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
1961 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1962 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
1963 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
1964 |
|
|
Destination Clock: to_register_clk rising at 0.000ns
|
1965 |
|
|
|
1966 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
1967 |
|
|
Gate Net
|
1968 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
1969 |
|
|
---------------------------------------- ------------
|
1970 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
1971 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
1972 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
1973 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
1974 |
|
|
----------------------------------------
|
1975 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
1976 |
|
|
(39.5% logic, 60.5% route)
|
1977 |
|
|
|
1978 |
|
|
=========================================================================
|
1979 |
|
|
Timing constraint: TS_J_CLK = PERIOD TIMEGRP "J_CLK" 30 nS HIGH 15 nS
|
1980 |
|
|
Clock period: 1.753ns (frequency: 570.451MHz)
|
1981 |
|
|
Total number of paths / destination ports: 4056 / 488
|
1982 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
1983 |
|
|
-------------------------------------------------------------------------
|
1984 |
|
|
Slack: 13.247ns
|
1985 |
|
|
Source: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF)
|
1986 |
|
|
Destination: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_SYNC/G_SYNC_WORD[6].I_EQ0.U_FDR (FF)
|
1987 |
|
|
Data Path Delay: 1.753ns (Levels of Logic = 1)
|
1988 |
|
|
Source Clock: user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT rising at 0.000ns
|
1989 |
|
|
Destination Clock: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/I_YES_BSCAN.U_BS/iDRCK_LOCAL rising at 30.000ns
|
1990 |
|
|
|
1991 |
|
|
Data Path: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF) to user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_SYNC/G_SYNC_WORD[6].I_EQ0.U_FDR (FF)
|
1992 |
|
|
Gate Net
|
1993 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
1994 |
|
|
---------------------------------------- ------------
|
1995 |
|
|
FDC:C->Q 3 0.375 0.413 U0/U_ICON/U_iDATA_CMD (U0/U_ICON/iDATA_CMD)
|
1996 |
|
|
INV:I->O 8 0.086 0.445 U0/U_ICON/U_SYNC/U_iDATA_CMD_n (U0/U_ICON/U_SYNC/iDATA_CMD_n)
|
1997 |
|
|
FDR:R 0.434 U0/U_ICON/U_SYNC/G_SYNC_WORD[6].I_EQ0.U_FDR
|
1998 |
|
|
----------------------------------------
|
1999 |
|
|
Total 1.753ns (0.895ns logic, 0.858ns route)
|
2000 |
|
|
(51.1% logic, 48.9% route)
|
2001 |
|
|
|
2002 |
|
|
=========================================================================
|
2003 |
|
|
Timing constraint: TS_U_TO_J = MAXDELAY FROM TIMEGRP "U_CLK" TO TIMEGRP "J_CLK" 15 nS
|
2004 |
|
|
Clock period: 1.753ns (frequency: 570.451MHz)
|
2005 |
|
|
Total number of paths / destination ports: 18 / 18
|
2006 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
2007 |
|
|
-------------------------------------------------------------------------
|
2008 |
|
|
Slack: 13.247ns
|
2009 |
|
|
Source: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF)
|
2010 |
|
|
Destination: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_SYNC/G_SYNC_WORD[6].I_EQ0.U_FDR (FF)
|
2011 |
|
|
Data Path Delay: 1.753ns (Levels of Logic = 1)
|
2012 |
|
|
Source Clock: user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT rising at 0.000ns
|
2013 |
|
|
Destination Clock: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/I_YES_BSCAN.U_BS/iDRCK_LOCAL rising at 15.000ns
|
2014 |
|
|
|
2015 |
|
|
Data Path: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF) to user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_SYNC/G_SYNC_WORD[6].I_EQ0.U_FDR (FF)
|
2016 |
|
|
Gate Net
|
2017 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
2018 |
|
|
---------------------------------------- ------------
|
2019 |
|
|
FDC:C->Q 3 0.375 0.413 U0/U_ICON/U_iDATA_CMD (U0/U_ICON/iDATA_CMD)
|
2020 |
|
|
INV:I->O 8 0.086 0.445 U0/U_ICON/U_SYNC/U_iDATA_CMD_n (U0/U_ICON/U_SYNC/iDATA_CMD_n)
|
2021 |
|
|
FDR:R 0.434 U0/U_ICON/U_SYNC/G_SYNC_WORD[6].I_EQ0.U_FDR
|
2022 |
|
|
----------------------------------------
|
2023 |
|
|
Total 1.753ns (0.895ns logic, 0.858ns route)
|
2024 |
|
|
(51.1% logic, 48.9% route)
|
2025 |
|
|
|
2026 |
|
|
=========================================================================
|
2027 |
|
|
Timing constraint: TS_U_TO_U = MAXDELAY FROM TIMEGRP "U_CLK" TO TIMEGRP "U_CLK" 15 nS
|
2028 |
|
|
Clock period: 1.284ns (frequency: 778.816MHz)
|
2029 |
|
|
Total number of paths / destination ports: 1 / 1
|
2030 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
2031 |
|
|
-------------------------------------------------------------------------
|
2032 |
|
|
Slack: 13.716ns
|
2033 |
|
|
Source: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF)
|
2034 |
|
|
Destination: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF)
|
2035 |
|
|
Data Path Delay: 1.284ns (Levels of Logic = 1)
|
2036 |
|
|
Source Clock: user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT rising at 0.000ns
|
2037 |
|
|
Destination Clock: user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT rising at 15.000ns
|
2038 |
|
|
|
2039 |
|
|
Data Path: user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF) to user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/U_iDATA_CMD (FF)
|
2040 |
|
|
Gate Net
|
2041 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
2042 |
|
|
---------------------------------------- ------------
|
2043 |
|
|
FDC:C->Q 3 0.375 0.413 U0/U_ICON/U_iDATA_CMD (U0/U_ICON/iDATA_CMD)
|
2044 |
|
|
INV:I->O 1 0.086 0.399 U0/U_ICON/U_iDATA_CMD_n (U0/U_ICON/iDATA_CMD_n)
|
2045 |
|
|
FDC:D 0.011 U0/U_ICON/U_iDATA_CMD
|
2046 |
|
|
----------------------------------------
|
2047 |
|
|
Total 1.284ns (0.472ns logic, 0.812ns route)
|
2048 |
|
|
(36.8% logic, 63.2% route)
|
2049 |
|
|
|
2050 |
|
|
=========================================================================
|
2051 |
|
|
Timing constraint: TS_J_TO_D = FROM TIMEGRP "J_CLK" TO TIMEGRP "D_CLK" TIG;
|
2052 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
2053 |
|
|
Total number of paths / destination ports: 2417 / 341
|
2054 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
2055 |
|
|
-------------------------------------------------------------------------
|
2056 |
|
|
Delay: -2.606ns
|
2057 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
2058 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
2059 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
2060 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
2061 |
|
|
Destination Clock: to_register_clk rising at 0.000ns
|
2062 |
|
|
|
2063 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
2064 |
|
|
Gate Net
|
2065 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
2066 |
|
|
---------------------------------------- ------------
|
2067 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
2068 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
2069 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
2070 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
2071 |
|
|
----------------------------------------
|
2072 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
2073 |
|
|
(39.5% logic, 60.5% route)
|
2074 |
|
|
|
2075 |
|
|
=========================================================================
|
2076 |
|
|
Timing constraint: TS_D_TO_J = FROM TIMEGRP "D_CLK" TO TIMEGRP "J_CLK" TIG;
|
2077 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
2078 |
|
|
Total number of paths / destination ports: 724 / 610
|
2079 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
2080 |
|
|
-------------------------------------------------------------------------
|
2081 |
|
|
Delay: -2.606ns
|
2082 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
2083 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
2084 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
2085 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
2086 |
|
|
Destination Clock: to_register_clk rising at 0.000ns
|
2087 |
|
|
|
2088 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
2089 |
|
|
Gate Net
|
2090 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
2091 |
|
|
---------------------------------------- ------------
|
2092 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
2093 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
2094 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
2095 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
2096 |
|
|
----------------------------------------
|
2097 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
2098 |
|
|
(39.5% logic, 60.5% route)
|
2099 |
|
|
|
2100 |
|
|
=========================================================================
|
2101 |
|
|
Timing constraint: TS_clk_5cc36873 = PERIOD TIMEGRP "clk_5cc36873" 5 nS HIGH 2.500 nS
|
2102 |
|
|
Clock period: 2.394ns (frequency: 417.711MHz)
|
2103 |
|
|
Total number of paths / destination ports: 2603 / 2296
|
2104 |
|
|
Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)
|
2105 |
|
|
-------------------------------------------------------------------------
|
2106 |
|
|
Slack: 2.606ns
|
2107 |
|
|
Source: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF)
|
2108 |
|
|
Destination: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
2109 |
|
|
Data Path Delay: 2.394ns (Levels of Logic = 2)
|
2110 |
|
|
Source Clock: to_register_clk rising at 0.000ns
|
2111 |
|
|
Destination Clock: to_register_clk rising at 5.000ns
|
2112 |
|
|
|
2113 |
|
|
Data Path: user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (FF) to user_logic_x0/chipscope/i_ila/U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST (FF)
|
2114 |
|
|
Gate Net
|
2115 |
|
|
Cell:in->out fanout Delay Delay Logical Name (Net Name)
|
2116 |
|
|
---------------------------------------- ------------
|
2117 |
|
|
FDE:C->Q 2 0.375 0.587 U0/I_NO_D.U_ILA/U_RST/U_HALT_XFER/U_GEN_DELAY[1].U_FD (U0/I_NO_D.U_ILA/U_RST/HALT_pulse)
|
2118 |
|
|
LUT3:I0->O 1 0.068 0.417 U0/I_NO_D.U_ILA/U_RST/U_PRST1 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET1)
|
2119 |
|
|
LUT4:I3->O 8 0.068 0.445 U0/I_NO_D.U_ILA/U_RST/U_PRST0 (U0/I_NO_D.U_ILA/U_RST/PRE_RESET0)
|
2120 |
|
|
FDS:S 0.434 U0/I_NO_D.U_ILA/U_RST/G_RST[0].U_RST
|
2121 |
|
|
----------------------------------------
|
2122 |
|
|
Total 2.394ns (0.945ns logic, 1.449ns route)
|
2123 |
|
|
(39.5% logic, 60.5% route)
|
2124 |
|
|
|
2125 |
|
|
=========================================================================
|
2126 |
|
|
|
2127 |
|
|
Cross Clock Domains Report:
|
2128 |
|
|
--------------------------
|
2129 |
|
|
|
2130 |
|
|
Clock to Setup on destination clock to_register_clk
|
2131 |
|
|
-----------------------------------------------------------------------------+---------+---------+---------+---------+
|
2132 |
|
|
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
2133 |
|
|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
2134 |
|
|
-----------------------------------------------------------------------------+---------+---------+---------+---------+
|
2135 |
|
|
to_register_clk | 2.394| | | |
|
2136 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/I_YES_BSCAN.U_BS/iDRCK_LOCAL| 3.276| | | |
|
2137 |
|
|
-----------------------------------------------------------------------------+---------+---------+---------+---------+
|
2138 |
|
|
|
2139 |
|
|
Clock to Setup on destination clock user_logic_x0/chipscope/i_icon_for_syn/CONTROL0(13)
|
2140 |
|
|
---------------+---------+---------+---------+---------+
|
2141 |
|
|
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
2142 |
|
|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
2143 |
|
|
---------------+---------+---------+---------+---------+
|
2144 |
|
|
to_register_clk| | | 1.327| |
|
2145 |
|
|
---------------+---------+---------+---------+---------+
|
2146 |
|
|
|
2147 |
|
|
Clock to Setup on destination clock user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/I_YES_BSCAN.U_BS/iDRCK_LOCAL
|
2148 |
|
|
-----------------------------------------------------------------------------+---------+---------+---------+---------+
|
2149 |
|
|
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
2150 |
|
|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
2151 |
|
|
-----------------------------------------------------------------------------+---------+---------+---------+---------+
|
2152 |
|
|
to_register_clk | 2.842| | | |
|
2153 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/CONTROL0(13) | | 3.112| | |
|
2154 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/U0/U_ICON/I_YES_BSCAN.U_BS/iDRCK_LOCAL| 5.669| | | |
|
2155 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT | 1.753| | | |
|
2156 |
|
|
-----------------------------------------------------------------------------+---------+---------+---------+---------+
|
2157 |
|
|
|
2158 |
|
|
Clock to Setup on destination clock user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT
|
2159 |
|
|
-----------------------------------------------------+---------+---------+---------+---------+
|
2160 |
|
|
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
|
2161 |
|
|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
|
2162 |
|
|
-----------------------------------------------------+---------+---------+---------+---------+
|
2163 |
|
|
user_logic_x0/chipscope/i_icon_for_syn/U0/iUPDATE_OUT| 1.284| | | |
|
2164 |
|
|
-----------------------------------------------------+---------+---------+---------+---------+
|
2165 |
|
|
|
2166 |
|
|
=========================================================================
|
2167 |
|
|
|
2168 |
|
|
|
2169 |
|
|
Total REAL time to Xst completion: 38.00 secs
|
2170 |
|
|
Total CPU time to Xst completion: 37.28 secs
|
2171 |
|
|
|
2172 |
|
|
-->
|
2173 |
|
|
|
2174 |
|
|
Total memory usage is 166760 kilobytes
|
2175 |
|
|
|
2176 |
|
|
Number of errors : 0 ( 0 filtered)
|
2177 |
|
|
Number of warnings : 498 ( 0 filtered)
|
2178 |
|
|
Number of infos : 174 ( 0 filtered)
|
2179 |
|
|
|