URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [MyUserLogic/] [UserLogic_00/] [top_level_1_PCIe_UserLogic_00_USER_LOGIC/] [synth_model/] [user_logic_cw.ucf] - Blame information for rev 13


 
 
# Global period constraint
NET "clk" TNM_NET = "clk_5cc36873";
TIMESPEC "TS_clk_5cc36873" = PERIOD "clk_5cc36873" 5.0 ns HIGH 50 %;

Line No.	Rev	Author	Line
1	13	barabba
2
3			`# Global period constraint`
4			`NET "clk" TNM_NET = "clk_5cc36873";`
5			`TIMESPEC "TS_clk_5cc36873" = PERIOD "clk_5cc36873" 5.0 ns HIGH 50 %;`