OpenCores
URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [MyUserLogic/] [UserLogic_00/] [top_level_1_PCIe_UserLogic_00_USER_LOGIC/] [sysgen/] [synopsis_com.xilinx.sysgen.netlister.ClockWrapper] - Blame information for rev 13

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 13 barabba 
{
2 
  'attributes' => {
3 
    'HDLCodeGenStatus' => 0,
4 
    'HDL_PATH' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen',
5 
    'Impl_file' => 'ISE Defaults',
6 
    'Impl_file_sgadvanced' => '',
7 
    'Synth_file' => 'XST Defaults',
8 
    'Synth_file_sgadvanced' => '',
9 
    'TEMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
10 
    'TMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
11 
    'Temp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
12 
    'Tmp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
13 
    'base_system_period_hardware' => 5,
14 
    'base_system_period_simulink' => '5e-009',
15 
    'block_icon_display' => 'Default',
16 
    'block_type' => 'sysgen',
17 
    'block_version' => '',
18 
    'ce_clr' => 0,
19 
    'clkWrapper' => 'user_logic_cw',
20 
    'clkWrapperFile' => 'user_logic_cw.vhd',
21 
    'clock_loc' => '',
22 
    'clock_wrapper' => 'Clock Enables',
23 
    'clock_wrapper_sgadvanced' => '',
24 
    'compilation' => 'NGC Netlist',
25 
    'compilation_lut' => {
26 
      'keys' => [
27 
        'HDL Netlist',
28 
        'Bitstream',
29 
        'NGC Netlist',
30 
      ],
31 
      'values' => [
32 
        'target1',
33 
        'target2',
34 
        'target3',
35 
      ],
36 
    },
37 
    'compilation_target' => 'NGC Netlist',
38 
    'core_generation' => 1,
39 
    'core_generation_sgadvanced' => '',
40 
    'core_is_deployed' => 0,
41 
    'coregen_core_generation_tmpdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root/cg_wk/c1fefddc63a4b8747',
42 
    'coregen_part_family' => 'virtex6',
43 
    'createTestbench' => 0,
44 
    'create_interface_document' => 'off',
45 
    'dbl_ovrd' => -1,
46 
    'dbl_ovrd_sgadvanced' => '',
47 
    'dcm_info' => {},
48 
    'dcm_input_clock_period' => 5,
49 
    'deprecated_control' => 'off',
50 
    'deprecated_control_sgadvanced' => '',
51 
    'design' => 'user_logic',
52 
    'designFile' => 'user_logic.vhd',
53 
    'design_full_path' => 'C:\\Temp\\Xilinx PCI Express\\ML605_ISE13.3\\MySysGen\\PCIe_UserLogic_00.mdl',
54 
    'device' => 'xc6vlx240t-1ff1156',
55 
    'device_speed' => -1,
56 
    'directory' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
57 
    'dsp_cache_root_path' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
58 
    'entityNamingInstrs' => {
59 
      'nameMap' => undef,
60 
      'namesAlreadyUsed' => {
61 
        'default_clock_driver' => 1,
62 
        'user_logic_cw' => 1,
63 
      },
64 
    },
65 
    'eval_field' => 0,
66 
    'fileAttributes' => {
67 
      'cntr_11_0_341fbb8cfa0e669e.ngc' => { 'producer' => 'coregen', },
68 
      'icon_1_06_a_87e2f476e984e565.ngc' => { 'producer' => 'coregen', },
69 
      'ila_1_05_a_b6735eb4b876dee5.ngc' => { 'producer' => 'coregen', },
70 
    },
71 
    'files' => [
72 
      'cntr_11_0_341fbb8cfa0e669e.ngc',
73 
      'icon_1_06_a_87e2f476e984e565.ngc',
74 
      'ila_1_05_a_b6735eb4b876dee5.ngc',
75 
      'xlpersistentdff.ngc',
76 
      'synopsis',
77 
      'user_logic.vhd',
78 
      'xlpersistentdff.ngc',
79 
      'user_logic_cw.vhd',
80 
    ],
81 
    'fxdptinstalled' => 1,
82 
    'generateUsing71FrontEnd' => 1,
83 
    'generating_island_subsystem_handle' => 2341.00048828125,
84 
    'generating_subsystem_handle' => 2341.00048828125,
85 
    'generation_directory' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
86 
    'has_advanced_control' => 0,
87 
    'hdlDir' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen/hdl',
88 
    'hdlKind' => 'vhdl',
89 
    'hdl_path' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen',
90 
    'impl_file' => 'ISE Defaults*',
91 
    'incr_netlist' => 'off',
92 
    'incr_netlist_sgadvanced' => '',
93 
    'infoedit' => ' System Generator',
94 
    'isdeployed' => 0,
95 
    'ise_version' => '13.3i',
96 
    'master_sysgen_token_handle' => 2342.00048828125,
97 
    'matlab' => 'C:/Programmi/MATLAB/R2010b',
98 
    'matlab_fixedpoint' => 1,
99 
    'mdlHandle' => 2083.00048828125,
100 
    'mdlPath' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen/PCIe_UserLogic_00.mdl',
101 
    'modelDiagnostics' => [
102 
      {
103 
        'count' => 351,
104 
        'isMask' => 0,
105 
        'type' => 'PCIe_UserLogic_00 Total blocks',
106 
      },
107 
      {
108 
        'count' => 4,
109 
        'isMask' => 0,
110 
        'type' => 'DiscretePulseGenerator',
111 
      },
112 
      {
113 
        'count' => 339,
114 
        'isMask' => 0,
115 
        'type' => 'S-Function',
116 
      },
117 
      {
118 
        'count' => 4,
119 
        'isMask' => 0,
120 
        'type' => 'SubSystem',
121 
      },
122 
      {
123 
        'count' => 4,
124 
        'isMask' => 0,
125 
        'type' => 'Terminator',
126 
      },
127 
      {
128 
        'count' => 1,
129 
        'isMask' => 1,
130 
        'type' => 'Xilinx ChipScope Block',
131 
      },
132 
      {
133 
        'count' => 23,
134 
        'isMask' => 1,
135 
        'type' => 'Xilinx Constant Block Block',
136 
      },
137 
      {
138 
        'count' => 1,
139 
        'isMask' => 1,
140 
        'type' => 'Xilinx Counter Block',
141 
      },
142 
      {
143 
        'count' => 44,
144 
        'isMask' => 1,
145 
        'type' => 'Xilinx Gateway In Block',
146 
      },
147 
      {
148 
        'count' => 39,
149 
        'isMask' => 1,
150 
        'type' => 'Xilinx Gateway Out Block',
151 
      },
152 
      {
153 
        'count' => 2,
154 
        'isMask' => 1,
155 
        'type' => 'Xilinx Inverter Block',
156 
      },
157 
      {
158 
        'count' => 1,
159 
        'isMask' => 1,
160 
        'type' => 'Xilinx Logical Block Block',
161 
      },
162 
      {
163 
        'count' => 89,
164 
        'isMask' => 1,
165 
        'type' => 'Xilinx Register Block',
166 
      },
167 
      {
168 
        'count' => 62,
169 
        'isMask' => 1,
170 
        'type' => 'Xilinx Shared Memory Based From Register Block',
171 
      },
172 
      {
173 
        'count' => 62,
174 
        'isMask' => 1,
175 
        'type' => 'Xilinx Shared Memory Based To Register Block',
176 
      },
177 
      {
178 
        'count' => 1,
179 
        'isMask' => 1,
180 
        'type' => 'Xilinx Subsystem Generator Block',
181 
      },
182 
      {
183 
        'count' => 2,
184 
        'isMask' => 1,
185 
        'type' => 'Xilinx System Generator Block',
186 
      },
187 
      {
188 
        'count' => 14,
189 
        'isMask' => 1,
190 
        'type' => 'Xilinx Type Converter Block',
191 
      },
192 
    ],
193 
    'model_globals_initialized' => 1,
194 
    'model_path' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MySysGen/PCIe_UserLogic_00.mdl',
195 
    'myxilinx' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE',
196 
    'netlistingWrapupScript' => 'java:com.xilinx.sysgen.netlister.DefaultWrapupNetlister',
197 
    'ngc_config' => {
198 
      'include_cf' => 1,
199 
      'include_clockwrapper' => 1,
200 
    },
201 
    'ngc_files' => [ 'xlpersistentdff.ngc', ],
202 
    'num_sim_cycles' => 2000000000,
203 
    'package' => 'ff1156',
204 
    'part' => 'xc6vlx240t',
205 
    'partFamily' => 'virtex6',
206 
    'port_data_types_enabled' => 1,
207 
    'postgeneration_fcn' => 'xlNGCPostGeneration',
208 
    'preserve_hierarchy' => 0,
209 
    'proj_type' => 'Project Navigator',
210 
    'proj_type_sgadvanced' => '',
211 
    'run_coregen' => 'off',
212 
    'run_coregen_sgadvanced' => '',
213 
    'sample_time_colors_enabled' => 1,
214 
    'sampletimecolors' => 1,
215 
    'settings_fcn' => 'xlngcsettings',
216 
    'sg_blockgui_xml' => '',
217 
    'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
218 
    'sg_list_contents' => '',
219 
    'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
220 
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
221 
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
222 
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
223 
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
224 
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
225 
fprintf(\'\',\'COMMENT: end icon graphics\');
226 
fprintf(\'\',\'COMMENT: begin icon text\');
227 
fprintf(\'\',\'COMMENT: end icon text\');',
228 
    'sg_version' => '',
229 
    'sggui_pos' => '-1,-1,-1,-1',
230 
    'simulation_island_subsystem_handle' => 2341.00048828125,
231 
    'simulinkName' => 'parking_lot',
232 
    'simulink_accelerator_running' => 0,
233 
    'simulink_debugger_running' => 0,
234 
    'simulink_period' => '5e-009',
235 
    'speed' => -1,
236 
    'synth_file' => 'XST Defaults*',
237 
    'synthesisTool' => 'XST',
238 
    'synthesis_language' => 'vhdl',
239 
    'synthesis_tool' => 'XST',
240 
    'synthesis_tool_sgadvanced' => '',
241 
    'sysclk_period' => 5,
242 
    'sysgen' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen',
243 
    'sysgenRoot' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen',
244 
    'sysgenTokenSettings' => {
245 
      'Impl_file' => 'ISE Defaults',
246 
      'Impl_file_sgadvanced' => '',
247 
      'Synth_file' => 'XST Defaults',
248 
      'Synth_file_sgadvanced' => '',
249 
      'base_system_period_hardware' => 5,
250 
      'base_system_period_simulink' => '5e-009',
251 
      'block_icon_display' => 'Default',
252 
      'block_type' => 'sysgen',
253 
      'block_version' => '',
254 
      'ce_clr' => 0,
255 
      'clock_loc' => '',
256 
      'clock_wrapper' => 'Clock Enables',
257 
      'clock_wrapper_sgadvanced' => '',
258 
      'compilation' => 'NGC Netlist',
259 
      'compilation_lut' => {
260 
        'keys' => [
261 
          'HDL Netlist',
262 
          'Bitstream',
263 
          'NGC Netlist',
264 
        ],
265 
        'values' => [
266 
          'target1',
267 
          'target2',
268 
          'target3',
269 
        ],
270 
      },
271 
      'core_generation' => 1,
272 
      'core_generation_sgadvanced' => '',
273 
      'coregen_part_family' => 'virtex6',
274 
      'create_interface_document' => 'off',
275 
      'dbl_ovrd' => -1,
276 
      'dbl_ovrd_sgadvanced' => '',
277 
      'dcm_input_clock_period' => 5,
278 
      'deprecated_control' => 'off',
279 
      'deprecated_control_sgadvanced' => '',
280 
      'directory' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
281 
      'eval_field' => 0,
282 
      'has_advanced_control' => 0,
283 
      'impl_file' => 'ISE Defaults*',
284 
      'incr_netlist' => 'off',
285 
      'incr_netlist_sgadvanced' => '',
286 
      'infoedit' => ' System Generator',
287 
      'master_sysgen_token_handle' => 2342.00048828125,
288 
      'ngc_config' => {
289 
        'include_cf' => 1,
290 
        'include_clockwrapper' => 1,
291 
      },
292 
      'package' => 'ff1156',
293 
      'part' => 'xc6vlx240t',
294 
      'postgeneration_fcn' => 'xlNGCPostGeneration',
295 
      'preserve_hierarchy' => 0,
296 
      'proj_type' => 'Project Navigator',
297 
      'proj_type_sgadvanced' => '',
298 
      'run_coregen' => 'off',
299 
      'run_coregen_sgadvanced' => '',
300 
      'settings_fcn' => 'xlngcsettings',
301 
      'sg_blockgui_xml' => '',
302 
      'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
303 
      'sg_list_contents' => '',
304 
      'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
305 
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
306 
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
307 
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
308 
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
309 
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
310 
fprintf(\'\',\'COMMENT: end icon graphics\');
311 
fprintf(\'\',\'COMMENT: begin icon text\');
312 
fprintf(\'\',\'COMMENT: end icon text\');',
313 
      'sggui_pos' => '-1,-1,-1,-1',
314 
      'simulation_island_subsystem_handle' => 2341.00048828125,
315 
      'simulink_period' => '5e-009',
316 
      'speed' => -1,
317 
      'synth_file' => 'XST Defaults*',
318 
      'synthesis_language' => 'vhdl',
319 
      'synthesis_tool' => 'XST',
320 
      'synthesis_tool_sgadvanced' => '',
321 
      'sysclk_period' => 5,
322 
      'testbench' => 0,
323 
      'testbench_sgadvanced' => '',
324 
      'trim_vbits' => 1,
325 
      'trim_vbits_sgadvanced' => '',
326 
      'xilinx_device' => 'xc6vlx240t-1ff1156',
327 
      'xilinxfamily' => 'virtex6',
328 
    },
329 
    'sysgen_Root' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE/sysgen',
330 
    'systemClockPeriod' => 5,
331 
    'tempdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
332 
    'testbench' => 0,
333 
    'testbench_sgadvanced' => '',
334 
    'tmpDir' => 'C:/Temp/Xilinx PCI Express/ML605_ISE13.3/MyUserLogic/UserLogic_00/top_level_1_PCIe_UserLogic_00_USER_LOGIC/sysgen',
335 
    'trim_vbits' => 1,
336 
    'trim_vbits_sgadvanced' => '',
337 
    'use_ce_syn_keep' => 1,
338 
    'use_strict_names' => 1,
339 
    'user_tips_enabled' => 0,
340 
    'usertemp' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
341 
    'using71Netlister' => 1,
342 
    'verilog_files' => [
343 
      'conv_pkg.v',
344 
      'synth_reg.v',
345 
      'synth_reg_w_init.v',
346 
      'convert_type.v',
347 
    ],
348 
    'version' => '',
349 
    'vhdl_files' => [
350 
      'conv_pkg.vhd',
351 
      'synth_reg.vhd',
352 
      'synth_reg_w_init.vhd',
353 
    ],
354 
    'vsimtime' => '11000000275.000000 ns',
355 
    'xilinx' => 'C:/Programmi/Xilinx/13.3/ISE_DS/ISE',
356 
    'xilinx_device' => 'xc6vlx240t-1ff1156',
357 
    'xilinx_family' => 'virtex6',
358 
    'xilinx_package' => 'ff1156',
359 
    'xilinx_part' => 'xc6vlx240t',
360 
    'xilinxdevice' => 'xc6vlx240t-1ff1156',
361 
    'xilinxfamily' => 'virtex6',
362 
    'xilinxpart' => 'xc6vlx240t',
363 
  },
364 
  'entityName' => '',
365 
  'nets' => {
366 
    '.bram_rd_dout' => {
367 
      'hdlType' => 'std_logic_vector(63 downto 0)',
368 
      'width' => 64,
369 
    },
370 
    '.clk' => {
371 
      'hdlType' => 'std_logic',
372 
      'width' => 1,
373 
    },
374 
    '.fifo_rd_count' => {
375 
      'hdlType' => 'std_logic_vector(14 downto 0)',
376 
      'width' => 15,
377 
    },
378 
    '.fifo_rd_dout' => {
379 
      'hdlType' => 'std_logic_vector(71 downto 0)',
380 
      'width' => 72,
381 
    },
382 
    '.fifo_rd_empty' => {
383 
      'hdlType' => 'std_logic',
384 
      'width' => 1,
385 
    },
386 
    '.fifo_rd_pempty' => {
387 
      'hdlType' => 'std_logic',
388 
      'width' => 1,
389 
    },
390 
    '.fifo_rd_valid' => {
391 
      'hdlType' => 'std_logic',
392 
      'width' => 1,
393 
    },
394 
    '.fifo_wr_count' => {
395 
      'hdlType' => 'std_logic_vector(14 downto 0)',
396 
      'width' => 15,
397 
    },
398 
    '.fifo_wr_full' => {
399 
      'hdlType' => 'std_logic',
400 
      'width' => 1,
401 
    },
402 
    '.fifo_wr_pfull' => {
403 
      'hdlType' => 'std_logic',
404 
      'width' => 1,
405 
    },
406 
    '.rst_i' => {
407 
      'hdlType' => 'std_logic',
408 
      'width' => 1,
409 
    },
410 
    'from_register.data_out' => {
411 
      'hdlType' => 'std_logic_vector(31 downto 0)',
412 
      'width' => 32,
413 
    },
414 
    'from_register1.data_out' => {
415 
      'hdlType' => 'std_logic_vector(31 downto 0)',
416 
      'width' => 32,
417 
    },
418 
    'from_register10.data_out' => {
419 
      'hdlType' => 'std_logic',
420 
      'width' => 1,
421 
    },
422 
    'from_register11.data_out' => {
423 
      'hdlType' => 'std_logic_vector(31 downto 0)',
424 
      'width' => 32,
425 
    },
426 
    'from_register12.data_out' => {
427 
      'hdlType' => 'std_logic',
428 
      'width' => 1,
429 
    },
430 
    'from_register13.data_out' => {
431 
      'hdlType' => 'std_logic_vector(31 downto 0)',
432 
      'width' => 32,
433 
    },
434 
    'from_register14.data_out' => {
435 
      'hdlType' => 'std_logic',
436 
      'width' => 1,
437 
    },
438 
    'from_register15.data_out' => {
439 
      'hdlType' => 'std_logic',
440 
      'width' => 1,
441 
    },
442 
    'from_register16.data_out' => {
443 
      'hdlType' => 'std_logic',
444 
      'width' => 1,
445 
    },
446 
    'from_register17.data_out' => {
447 
      'hdlType' => 'std_logic_vector(31 downto 0)',
448 
      'width' => 32,
449 
    },
450 
    'from_register18.data_out' => {
451 
      'hdlType' => 'std_logic',
452 
      'width' => 1,
453 
    },
454 
    'from_register19.data_out' => {
455 
      'hdlType' => 'std_logic_vector(31 downto 0)',
456 
      'width' => 32,
457 
    },
458 
    'from_register2.data_out' => {
459 
      'hdlType' => 'std_logic_vector(31 downto 0)',
460 
      'width' => 32,
461 
    },
462 
    'from_register20.data_out' => {
463 
      'hdlType' => 'std_logic_vector(31 downto 0)',
464 
      'width' => 32,
465 
    },
466 
    'from_register21.data_out' => {
467 
      'hdlType' => 'std_logic',
468 
      'width' => 1,
469 
    },
470 
    'from_register22.data_out' => {
471 
      'hdlType' => 'std_logic_vector(31 downto 0)',
472 
      'width' => 32,
473 
    },
474 
    'from_register23.data_out' => {
475 
      'hdlType' => 'std_logic',
476 
      'width' => 1,
477 
    },
478 
    'from_register24.data_out' => {
479 
      'hdlType' => 'std_logic_vector(31 downto 0)',
480 
      'width' => 32,
481 
    },
482 
    'from_register25.data_out' => {
483 
      'hdlType' => 'std_logic',
484 
      'width' => 1,
485 
    },
486 
    'from_register26.data_out' => {
487 
      'hdlType' => 'std_logic_vector(31 downto 0)',
488 
      'width' => 32,
489 
    },
490 
    'from_register27.data_out' => {
491 
      'hdlType' => 'std_logic',
492 
      'width' => 1,
493 
    },
494 
    'from_register28.data_out' => {
495 
      'hdlType' => 'std_logic_vector(31 downto 0)',
496 
      'width' => 32,
497 
    },
498 
    'from_register29.data_out' => {
499 
      'hdlType' => 'std_logic',
500 
      'width' => 1,
501 
    },
502 
    'from_register3.data_out' => {
503 
      'hdlType' => 'std_logic_vector(31 downto 0)',
504 
      'width' => 32,
505 
    },
506 
    'from_register30.data_out' => {
507 
      'hdlType' => 'std_logic_vector(31 downto 0)',
508 
      'width' => 32,
509 
    },
510 
    'from_register31.data_out' => {
511 
      'hdlType' => 'std_logic',
512 
      'width' => 1,
513 
    },
514 
    'from_register32.data_out' => {
515 
      'hdlType' => 'std_logic_vector(31 downto 0)',
516 
      'width' => 32,
517 
    },
518 
    'from_register33.data_out' => {
519 
      'hdlType' => 'std_logic',
520 
      'width' => 1,
521 
    },
522 
    'from_register4.data_out' => {
523 
      'hdlType' => 'std_logic',
524 
      'width' => 1,
525 
    },
526 
    'from_register5.data_out' => {
527 
      'hdlType' => 'std_logic_vector(31 downto 0)',
528 
      'width' => 32,
529 
    },
530 
    'from_register6.data_out' => {
531 
      'hdlType' => 'std_logic',
532 
      'width' => 1,
533 
    },
534 
    'from_register7.data_out' => {
535 
      'hdlType' => 'std_logic_vector(31 downto 0)',
536 
      'width' => 32,
537 
    },
538 
    'from_register8.data_out' => {
539 
      'hdlType' => 'std_logic',
540 
      'width' => 1,
541 
    },
542 
    'from_register9.data_out' => {
543 
      'hdlType' => 'std_logic_vector(31 downto 0)',
544 
      'width' => 32,
545 
    },
546 
    'sysgen_dut.bram_rd_addr' => {
547 
      'hdlType' => 'std_logic_vector(11 downto 0)',
548 
      'width' => 12,
549 
    },
550 
    'sysgen_dut.bram_wr_addr' => {
551 
      'hdlType' => 'std_logic_vector(11 downto 0)',
552 
      'width' => 12,
553 
    },
554 
    'sysgen_dut.bram_wr_din' => {
555 
      'hdlType' => 'std_logic_vector(63 downto 0)',
556 
      'width' => 64,
557 
    },
558 
    'sysgen_dut.bram_wr_en' => {
559 
      'hdlType' => 'std_logic_vector(7 downto 0)',
560 
      'width' => 8,
561 
    },
562 
    'sysgen_dut.fifo_rd_en' => {
563 
      'hdlType' => 'std_logic',
564 
      'width' => 1,
565 
    },
566 
    'sysgen_dut.fifo_wr_din' => {
567 
      'hdlType' => 'std_logic_vector(71 downto 0)',
568 
      'width' => 72,
569 
    },
570 
    'sysgen_dut.fifo_wr_en' => {
571 
      'hdlType' => 'std_logic',
572 
      'width' => 1,
573 
    },
574 
    'sysgen_dut.rst_o' => {
575 
      'hdlType' => 'std_logic',
576 
      'width' => 1,
577 
    },
578 
    'sysgen_dut.to_register10_ce' => {
579 
      'hdlType' => 'std_logic',
580 
      'width' => 1,
581 
    },
582 
    'sysgen_dut.to_register10_clk' => {
583 
      'hdlType' => 'std_logic',
584 
      'width' => 1,
585 
    },
586 
    'sysgen_dut.to_register10_clr' => {
587 
      'hdlType' => 'std_logic',
588 
      'width' => 1,
589 
    },
590 
    'sysgen_dut.to_register10_data_in' => {
591 
      'hdlType' => 'std_logic',
592 
      'width' => 1,
593 
    },
594 
    'sysgen_dut.to_register10_en' => {
595 
      'hdlType' => 'std_logic',
596 
      'width' => 1,
597 
    },
598 
    'sysgen_dut.to_register11_ce' => {
599 
      'hdlType' => 'std_logic',
600 
      'width' => 1,
601 
    },
602 
    'sysgen_dut.to_register11_clk' => {
603 
      'hdlType' => 'std_logic',
604 
      'width' => 1,
605 
    },
606 
    'sysgen_dut.to_register11_clr' => {
607 
      'hdlType' => 'std_logic',
608 
      'width' => 1,
609 
    },
610 
    'sysgen_dut.to_register11_data_in' => {
611 
      'hdlType' => 'std_logic',
612 
      'width' => 1,
613 
    },
614 
    'sysgen_dut.to_register11_en' => {
615 
      'hdlType' => 'std_logic',
616 
      'width' => 1,
617 
    },
618 
    'sysgen_dut.to_register12_ce' => {
619 
      'hdlType' => 'std_logic',
620 
      'width' => 1,
621 
    },
622 
    'sysgen_dut.to_register12_clk' => {
623 
      'hdlType' => 'std_logic',
624 
      'width' => 1,
625 
    },
626 
    'sysgen_dut.to_register12_clr' => {
627 
      'hdlType' => 'std_logic',
628 
      'width' => 1,
629 
    },
630 
    'sysgen_dut.to_register12_data_in' => {
631 
      'hdlType' => 'std_logic',
632 
      'width' => 1,
633 
    },
634 
    'sysgen_dut.to_register12_en' => {
635 
      'hdlType' => 'std_logic',
636 
      'width' => 1,
637 
    },
638 
    'sysgen_dut.to_register13_ce' => {
639 
      'hdlType' => 'std_logic',
640 
      'width' => 1,
641 
    },
642 
    'sysgen_dut.to_register13_clk' => {
643 
      'hdlType' => 'std_logic',
644 
      'width' => 1,
645 
    },
646 
    'sysgen_dut.to_register13_clr' => {
647 
      'hdlType' => 'std_logic',
648 
      'width' => 1,
649 
    },
650 
    'sysgen_dut.to_register13_data_in' => {
651 
      'hdlType' => 'std_logic_vector(31 downto 0)',
652 
      'width' => 32,
653 
    },
654 
    'sysgen_dut.to_register13_en' => {
655 
      'hdlType' => 'std_logic',
656 
      'width' => 1,
657 
    },
658 
    'sysgen_dut.to_register14_ce' => {
659 
      'hdlType' => 'std_logic',
660 
      'width' => 1,
661 
    },
662 
    'sysgen_dut.to_register14_clk' => {
663 
      'hdlType' => 'std_logic',
664 
      'width' => 1,
665 
    },
666 
    'sysgen_dut.to_register14_clr' => {
667 
      'hdlType' => 'std_logic',
668 
      'width' => 1,
669 
    },
670 
    'sysgen_dut.to_register14_data_in' => {
671 
      'hdlType' => 'std_logic',
672 
      'width' => 1,
673 
    },
674 
    'sysgen_dut.to_register14_en' => {
675 
      'hdlType' => 'std_logic',
676 
      'width' => 1,
677 
    },
678 
    'sysgen_dut.to_register15_ce' => {
679 
      'hdlType' => 'std_logic',
680 
      'width' => 1,
681 
    },
682 
    'sysgen_dut.to_register15_clk' => {
683 
      'hdlType' => 'std_logic',
684 
      'width' => 1,
685 
    },
686 
    'sysgen_dut.to_register15_clr' => {
687 
      'hdlType' => 'std_logic',
688 
      'width' => 1,
689 
    },
690 
    'sysgen_dut.to_register15_data_in' => {
691 
      'hdlType' => 'std_logic_vector(31 downto 0)',
692 
      'width' => 32,
693 
    },
694 
    'sysgen_dut.to_register15_en' => {
695 
      'hdlType' => 'std_logic',
696 
      'width' => 1,
697 
    },
698 
    'sysgen_dut.to_register16_ce' => {
699 
      'hdlType' => 'std_logic',
700 
      'width' => 1,
701 
    },
702 
    'sysgen_dut.to_register16_clk' => {
703 
      'hdlType' => 'std_logic',
704 
      'width' => 1,
705 
    },
706 
    'sysgen_dut.to_register16_clr' => {
707 
      'hdlType' => 'std_logic',
708 
      'width' => 1,
709 
    },
710 
    'sysgen_dut.to_register16_data_in' => {
711 
      'hdlType' => 'std_logic',
712 
      'width' => 1,
713 
    },
714 
    'sysgen_dut.to_register16_en' => {
715 
      'hdlType' => 'std_logic',
716 
      'width' => 1,
717 
    },
718 
    'sysgen_dut.to_register17_ce' => {
719 
      'hdlType' => 'std_logic',
720 
      'width' => 1,
721 
    },
722 
    'sysgen_dut.to_register17_clk' => {
723 
      'hdlType' => 'std_logic',
724 
      'width' => 1,
725 
    },
726 
    'sysgen_dut.to_register17_clr' => {
727 
      'hdlType' => 'std_logic',
728 
      'width' => 1,
729 
    },
730 
    'sysgen_dut.to_register17_data_in' => {
731 
      'hdlType' => 'std_logic_vector(31 downto 0)',
732 
      'width' => 32,
733 
    },
734 
    'sysgen_dut.to_register17_en' => {
735 
      'hdlType' => 'std_logic',
736 
      'width' => 1,
737 
    },
738 
    'sysgen_dut.to_register18_ce' => {
739 
      'hdlType' => 'std_logic',
740 
      'width' => 1,
741 
    },
742 
    'sysgen_dut.to_register18_clk' => {
743 
      'hdlType' => 'std_logic',
744 
      'width' => 1,
745 
    },
746 
    'sysgen_dut.to_register18_clr' => {
747 
      'hdlType' => 'std_logic',
748 
      'width' => 1,
749 
    },
750 
    'sysgen_dut.to_register18_data_in' => {
751 
      'hdlType' => 'std_logic',
752 
      'width' => 1,
753 
    },
754 
    'sysgen_dut.to_register18_en' => {
755 
      'hdlType' => 'std_logic',
756 
      'width' => 1,
757 
    },
758 
    'sysgen_dut.to_register19_ce' => {
759 
      'hdlType' => 'std_logic',
760 
      'width' => 1,
761 
    },
762 
    'sysgen_dut.to_register19_clk' => {
763 
      'hdlType' => 'std_logic',
764 
      'width' => 1,
765 
    },
766 
    'sysgen_dut.to_register19_clr' => {
767 
      'hdlType' => 'std_logic',
768 
      'width' => 1,
769 
    },
770 
    'sysgen_dut.to_register19_data_in' => {
771 
      'hdlType' => 'std_logic_vector(31 downto 0)',
772 
      'width' => 32,
773 
    },
774 
    'sysgen_dut.to_register19_en' => {
775 
      'hdlType' => 'std_logic',
776 
      'width' => 1,
777 
    },
778 
    'sysgen_dut.to_register1_ce' => {
779 
      'hdlType' => 'std_logic',
780 
      'width' => 1,
781 
    },
782 
    'sysgen_dut.to_register1_clk' => {
783 
      'hdlType' => 'std_logic',
784 
      'width' => 1,
785 
    },
786 
    'sysgen_dut.to_register1_clr' => {
787 
      'hdlType' => 'std_logic',
788 
      'width' => 1,
789 
    },
790 
    'sysgen_dut.to_register1_data_in' => {
791 
      'hdlType' => 'std_logic',
792 
      'width' => 1,
793 
    },
794 
    'sysgen_dut.to_register1_en' => {
795 
      'hdlType' => 'std_logic',
796 
      'width' => 1,
797 
    },
798 
    'sysgen_dut.to_register20_ce' => {
799 
      'hdlType' => 'std_logic',
800 
      'width' => 1,
801 
    },
802 
    'sysgen_dut.to_register20_clk' => {
803 
      'hdlType' => 'std_logic',
804 
      'width' => 1,
805 
    },
806 
    'sysgen_dut.to_register20_clr' => {
807 
      'hdlType' => 'std_logic',
808 
      'width' => 1,
809 
    },
810 
    'sysgen_dut.to_register20_data_in' => {
811 
      'hdlType' => 'std_logic',
812 
      'width' => 1,
813 
    },
814 
    'sysgen_dut.to_register20_en' => {
815 
      'hdlType' => 'std_logic',
816 
      'width' => 1,
817 
    },
818 
    'sysgen_dut.to_register21_ce' => {
819 
      'hdlType' => 'std_logic',
820 
      'width' => 1,
821 
    },
822 
    'sysgen_dut.to_register21_clk' => {
823 
      'hdlType' => 'std_logic',
824 
      'width' => 1,
825 
    },
826 
    'sysgen_dut.to_register21_clr' => {
827 
      'hdlType' => 'std_logic',
828 
      'width' => 1,
829 
    },
830 
    'sysgen_dut.to_register21_data_in' => {
831 
      'hdlType' => 'std_logic_vector(31 downto 0)',
832 
      'width' => 32,
833 
    },
834 
    'sysgen_dut.to_register21_en' => {
835 
      'hdlType' => 'std_logic',
836 
      'width' => 1,
837 
    },
838 
    'sysgen_dut.to_register22_ce' => {
839 
      'hdlType' => 'std_logic',
840 
      'width' => 1,
841 
    },
842 
    'sysgen_dut.to_register22_clk' => {
843 
      'hdlType' => 'std_logic',
844 
      'width' => 1,
845 
    },
846 
    'sysgen_dut.to_register22_clr' => {
847 
      'hdlType' => 'std_logic',
848 
      'width' => 1,
849 
    },
850 
    'sysgen_dut.to_register22_data_in' => {
851 
      'hdlType' => 'std_logic',
852 
      'width' => 1,
853 
    },
854 
    'sysgen_dut.to_register22_en' => {
855 
      'hdlType' => 'std_logic',
856 
      'width' => 1,
857 
    },
858 
    'sysgen_dut.to_register23_ce' => {
859 
      'hdlType' => 'std_logic',
860 
      'width' => 1,
861 
    },
862 
    'sysgen_dut.to_register23_clk' => {
863 
      'hdlType' => 'std_logic',
864 
      'width' => 1,
865 
    },
866 
    'sysgen_dut.to_register23_clr' => {
867 
      'hdlType' => 'std_logic',
868 
      'width' => 1,
869 
    },
870 
    'sysgen_dut.to_register23_data_in' => {
871 
      'hdlType' => 'std_logic_vector(31 downto 0)',
872 
      'width' => 32,
873 
    },
874 
    'sysgen_dut.to_register23_en' => {
875 
      'hdlType' => 'std_logic',
876 
      'width' => 1,
877 
    },
878 
    'sysgen_dut.to_register24_ce' => {
879 
      'hdlType' => 'std_logic',
880 
      'width' => 1,
881 
    },
882 
    'sysgen_dut.to_register24_clk' => {
883 
      'hdlType' => 'std_logic',
884 
      'width' => 1,
885 
    },
886 
    'sysgen_dut.to_register24_clr' => {
887 
      'hdlType' => 'std_logic',
888 
      'width' => 1,
889 
    },
890 
    'sysgen_dut.to_register24_data_in' => {
891 
      'hdlType' => 'std_logic',
892 
      'width' => 1,
893 
    },
894 
    'sysgen_dut.to_register24_en' => {
895 
      'hdlType' => 'std_logic',
896 
      'width' => 1,
897 
    },
898 
    'sysgen_dut.to_register25_ce' => {
899 
      'hdlType' => 'std_logic',
900 
      'width' => 1,
901 
    },
902 
    'sysgen_dut.to_register25_clk' => {
903 
      'hdlType' => 'std_logic',
904 
      'width' => 1,
905 
    },
906 
    'sysgen_dut.to_register25_clr' => {
907 
      'hdlType' => 'std_logic',
908 
      'width' => 1,
909 
    },
910 
    'sysgen_dut.to_register25_data_in' => {
911 
      'hdlType' => 'std_logic_vector(31 downto 0)',
912 
      'width' => 32,
913 
    },
914 
    'sysgen_dut.to_register25_en' => {
915 
      'hdlType' => 'std_logic',
916 
      'width' => 1,
917 
    },
918 
    'sysgen_dut.to_register26_ce' => {
919 
      'hdlType' => 'std_logic',
920 
      'width' => 1,
921 
    },
922 
    'sysgen_dut.to_register26_clk' => {
923 
      'hdlType' => 'std_logic',
924 
      'width' => 1,
925 
    },
926 
    'sysgen_dut.to_register26_clr' => {
927 
      'hdlType' => 'std_logic',
928 
      'width' => 1,
929 
    },
930 
    'sysgen_dut.to_register26_data_in' => {
931 
      'hdlType' => 'std_logic',
932 
      'width' => 1,
933 
    },
934 
    'sysgen_dut.to_register26_en' => {
935 
      'hdlType' => 'std_logic',
936 
      'width' => 1,
937 
    },
938 
    'sysgen_dut.to_register27_ce' => {
939 
      'hdlType' => 'std_logic',
940 
      'width' => 1,
941 
    },
942 
    'sysgen_dut.to_register27_clk' => {
943 
      'hdlType' => 'std_logic',
944 
      'width' => 1,
945 
    },
946 
    'sysgen_dut.to_register27_clr' => {
947 
      'hdlType' => 'std_logic',
948 
      'width' => 1,
949 
    },
950 
    'sysgen_dut.to_register27_data_in' => {
951 
      'hdlType' => 'std_logic_vector(31 downto 0)',
952 
      'width' => 32,
953 
    },
954 
    'sysgen_dut.to_register27_en' => {
955 
      'hdlType' => 'std_logic',
956 
      'width' => 1,
957 
    },
958 
    'sysgen_dut.to_register2_ce' => {
959 
      'hdlType' => 'std_logic',
960 
      'width' => 1,
961 
    },
962 
    'sysgen_dut.to_register2_clk' => {
963 
      'hdlType' => 'std_logic',
964 
      'width' => 1,
965 
    },
966 
    'sysgen_dut.to_register2_clr' => {
967 
      'hdlType' => 'std_logic',
968 
      'width' => 1,
969 
    },
970 
    'sysgen_dut.to_register2_data_in' => {
971 
      'hdlType' => 'std_logic_vector(31 downto 0)',
972 
      'width' => 32,
973 
    },
974 
    'sysgen_dut.to_register2_en' => {
975 
      'hdlType' => 'std_logic',
976 
      'width' => 1,
977 
    },
978 
    'sysgen_dut.to_register3_ce' => {
979 
      'hdlType' => 'std_logic',
980 
      'width' => 1,
981 
    },
982 
    'sysgen_dut.to_register3_clk' => {
983 
      'hdlType' => 'std_logic',
984 
      'width' => 1,
985 
    },
986 
    'sysgen_dut.to_register3_clr' => {
987 
      'hdlType' => 'std_logic',
988 
      'width' => 1,
989 
    },
990 
    'sysgen_dut.to_register3_data_in' => {
991 
      'hdlType' => 'std_logic_vector(31 downto 0)',
992 
      'width' => 32,
993 
    },
994 
    'sysgen_dut.to_register3_en' => {
995 
      'hdlType' => 'std_logic',
996 
      'width' => 1,
997 
    },
998 
    'sysgen_dut.to_register4_ce' => {
999 
      'hdlType' => 'std_logic',
1000 
      'width' => 1,
1001 
    },
1002 
    'sysgen_dut.to_register4_clk' => {
1003 
      'hdlType' => 'std_logic',
1004 
      'width' => 1,
1005 
    },
1006 
    'sysgen_dut.to_register4_clr' => {
1007 
      'hdlType' => 'std_logic',
1008 
      'width' => 1,
1009 
    },
1010 
    'sysgen_dut.to_register4_data_in' => {
1011 
      'hdlType' => 'std_logic',
1012 
      'width' => 1,
1013 
    },
1014 
    'sysgen_dut.to_register4_en' => {
1015 
      'hdlType' => 'std_logic',
1016 
      'width' => 1,
1017 
    },
1018 
    'sysgen_dut.to_register5_ce' => {
1019 
      'hdlType' => 'std_logic',
1020 
      'width' => 1,
1021 
    },
1022 
    'sysgen_dut.to_register5_clk' => {
1023 
      'hdlType' => 'std_logic',
1024 
      'width' => 1,
1025 
    },
1026 
    'sysgen_dut.to_register5_clr' => {
1027 
      'hdlType' => 'std_logic',
1028 
      'width' => 1,
1029 
    },
1030 
    'sysgen_dut.to_register5_data_in' => {
1031 
      'hdlType' => 'std_logic',
1032 
      'width' => 1,
1033 
    },
1034 
    'sysgen_dut.to_register5_en' => {
1035 
      'hdlType' => 'std_logic',
1036 
      'width' => 1,
1037 
    },
1038 
    'sysgen_dut.to_register6_ce' => {
1039 
      'hdlType' => 'std_logic',
1040 
      'width' => 1,
1041 
    },
1042 
    'sysgen_dut.to_register6_clk' => {
1043 
      'hdlType' => 'std_logic',
1044 
      'width' => 1,
1045 
    },
1046 
    'sysgen_dut.to_register6_clr' => {
1047 
      'hdlType' => 'std_logic',
1048 
      'width' => 1,
1049 
    },
1050 
    'sysgen_dut.to_register6_data_in' => {
1051 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1052 
      'width' => 32,
1053 
    },
1054 
    'sysgen_dut.to_register6_en' => {
1055 
      'hdlType' => 'std_logic',
1056 
      'width' => 1,
1057 
    },
1058 
    'sysgen_dut.to_register7_ce' => {
1059 
      'hdlType' => 'std_logic',
1060 
      'width' => 1,
1061 
    },
1062 
    'sysgen_dut.to_register7_clk' => {
1063 
      'hdlType' => 'std_logic',
1064 
      'width' => 1,
1065 
    },
1066 
    'sysgen_dut.to_register7_clr' => {
1067 
      'hdlType' => 'std_logic',
1068 
      'width' => 1,
1069 
    },
1070 
    'sysgen_dut.to_register7_data_in' => {
1071 
      'hdlType' => 'std_logic',
1072 
      'width' => 1,
1073 
    },
1074 
    'sysgen_dut.to_register7_en' => {
1075 
      'hdlType' => 'std_logic',
1076 
      'width' => 1,
1077 
    },
1078 
    'sysgen_dut.to_register8_ce' => {
1079 
      'hdlType' => 'std_logic',
1080 
      'width' => 1,
1081 
    },
1082 
    'sysgen_dut.to_register8_clk' => {
1083 
      'hdlType' => 'std_logic',
1084 
      'width' => 1,
1085 
    },
1086 
    'sysgen_dut.to_register8_clr' => {
1087 
      'hdlType' => 'std_logic',
1088 
      'width' => 1,
1089 
    },
1090 
    'sysgen_dut.to_register8_data_in' => {
1091 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1092 
      'width' => 32,
1093 
    },
1094 
    'sysgen_dut.to_register8_en' => {
1095 
      'hdlType' => 'std_logic',
1096 
      'width' => 1,
1097 
    },
1098 
    'sysgen_dut.to_register9_ce' => {
1099 
      'hdlType' => 'std_logic',
1100 
      'width' => 1,
1101 
    },
1102 
    'sysgen_dut.to_register9_clk' => {
1103 
      'hdlType' => 'std_logic',
1104 
      'width' => 1,
1105 
    },
1106 
    'sysgen_dut.to_register9_clr' => {
1107 
      'hdlType' => 'std_logic',
1108 
      'width' => 1,
1109 
    },
1110 
    'sysgen_dut.to_register9_data_in' => {
1111 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1112 
      'width' => 32,
1113 
    },
1114 
    'sysgen_dut.to_register9_en' => {
1115 
      'hdlType' => 'std_logic',
1116 
      'width' => 1,
1117 
    },
1118 
    'sysgen_dut.to_register_ce' => {
1119 
      'hdlType' => 'std_logic',
1120 
      'width' => 1,
1121 
    },
1122 
    'sysgen_dut.to_register_clk' => {
1123 
      'hdlType' => 'std_logic',
1124 
      'width' => 1,
1125 
    },
1126 
    'sysgen_dut.to_register_clr' => {
1127 
      'hdlType' => 'std_logic',
1128 
      'width' => 1,
1129 
    },
1130 
    'sysgen_dut.to_register_data_in' => {
1131 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1132 
      'width' => 32,
1133 
    },
1134 
    'sysgen_dut.to_register_en' => {
1135 
      'hdlType' => 'std_logic',
1136 
      'width' => 1,
1137 
    },
1138 
    'sysgen_dut.user_int_1o' => {
1139 
      'hdlType' => 'std_logic',
1140 
      'width' => 1,
1141 
    },
1142 
    'sysgen_dut.user_int_2o' => {
1143 
      'hdlType' => 'std_logic',
1144 
      'width' => 1,
1145 
    },
1146 
    'sysgen_dut.user_int_3o' => {
1147 
      'hdlType' => 'std_logic',
1148 
      'width' => 1,
1149 
    },
1150 
    'to_register.dout' => {
1151 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1152 
      'width' => 32,
1153 
    },
1154 
    'to_register1.dout' => {
1155 
      'hdlType' => 'std_logic',
1156 
      'width' => 1,
1157 
    },
1158 
    'to_register10.dout' => {
1159 
      'hdlType' => 'std_logic',
1160 
      'width' => 1,
1161 
    },
1162 
    'to_register11.dout' => {
1163 
      'hdlType' => 'std_logic',
1164 
      'width' => 1,
1165 
    },
1166 
    'to_register12.dout' => {
1167 
      'hdlType' => 'std_logic',
1168 
      'width' => 1,
1169 
    },
1170 
    'to_register13.dout' => {
1171 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1172 
      'width' => 32,
1173 
    },
1174 
    'to_register14.dout' => {
1175 
      'hdlType' => 'std_logic',
1176 
      'width' => 1,
1177 
    },
1178 
    'to_register15.dout' => {
1179 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1180 
      'width' => 32,
1181 
    },
1182 
    'to_register16.dout' => {
1183 
      'hdlType' => 'std_logic',
1184 
      'width' => 1,
1185 
    },
1186 
    'to_register17.dout' => {
1187 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1188 
      'width' => 32,
1189 
    },
1190 
    'to_register18.dout' => {
1191 
      'hdlType' => 'std_logic',
1192 
      'width' => 1,
1193 
    },
1194 
    'to_register19.dout' => {
1195 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1196 
      'width' => 32,
1197 
    },
1198 
    'to_register2.dout' => {
1199 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1200 
      'width' => 32,
1201 
    },
1202 
    'to_register20.dout' => {
1203 
      'hdlType' => 'std_logic',
1204 
      'width' => 1,
1205 
    },
1206 
    'to_register21.dout' => {
1207 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1208 
      'width' => 32,
1209 
    },
1210 
    'to_register22.dout' => {
1211 
      'hdlType' => 'std_logic',
1212 
      'width' => 1,
1213 
    },
1214 
    'to_register23.dout' => {
1215 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1216 
      'width' => 32,
1217 
    },
1218 
    'to_register24.dout' => {
1219 
      'hdlType' => 'std_logic',
1220 
      'width' => 1,
1221 
    },
1222 
    'to_register25.dout' => {
1223 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1224 
      'width' => 32,
1225 
    },
1226 
    'to_register26.dout' => {
1227 
      'hdlType' => 'std_logic',
1228 
      'width' => 1,
1229 
    },
1230 
    'to_register27.dout' => {
1231 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1232 
      'width' => 32,
1233 
    },
1234 
    'to_register3.dout' => {
1235 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1236 
      'width' => 32,
1237 
    },
1238 
    'to_register4.dout' => {
1239 
      'hdlType' => 'std_logic',
1240 
      'width' => 1,
1241 
    },
1242 
    'to_register5.dout' => {
1243 
      'hdlType' => 'std_logic',
1244 
      'width' => 1,
1245 
    },
1246 
    'to_register6.dout' => {
1247 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1248 
      'width' => 32,
1249 
    },
1250 
    'to_register7.dout' => {
1251 
      'hdlType' => 'std_logic',
1252 
      'width' => 1,
1253 
    },
1254 
    'to_register8.dout' => {
1255 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1256 
      'width' => 32,
1257 
    },
1258 
    'to_register9.dout' => {
1259 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1260 
      'width' => 32,
1261 
    },
1262 
  },
1263 
  'subblocks' => {
1264 
    'bram_rd_addr' => {
1265 
      'connections' => { 'bram_rd_addr' => 'sysgen_dut.bram_rd_addr', },
1266 
      'entity' => {
1267 
        'attributes' => {
1268 
          'entityAlreadyNetlisted' => 1,
1269 
          'isGateway' => 1,
1270 
          'is_floating_block' => 1,
1271 
        },
1272 
        'entityName' => 'bram_rd_addr',
1273 
        'ports' => {
1274 
          'bram_rd_addr' => {
1275 
            'attributes' => {
1276 
              'bin_pt' => 0,
1277 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
1278 
              'is_floating_block' => 1,
1279 
              'is_gateway_port' => 1,
1280 
              'must_be_hdl_vector' => 1,
1281 
              'period' => 1,
1282 
              'port_id' => 0,
1283 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr/BRAM_rd_addr',
1284 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr',
1285 
              'timingConstraint' => 'none',
1286 
              'type' => 'UFix_12_0',
1287 
            },
1288 
            'direction' => 'in',
1289 
            'hdlType' => 'std_logic_vector(11 downto 0)',
1290 
            'width' => 12,
1291 
          },
1292 
        },
1293 
      },
1294 
      'entityName' => 'bram_rd_addr',
1295 
    },
1296 
    'bram_rd_dout' => {
1297 
      'connections' => { 'bram_rd_dout' => '.bram_rd_dout', },
1298 
      'entity' => {
1299 
        'attributes' => {
1300 
          'entityAlreadyNetlisted' => 1,
1301 
          'isGateway' => 1,
1302 
          'is_floating_block' => 1,
1303 
        },
1304 
        'entityName' => 'bram_rd_dout',
1305 
        'ports' => {
1306 
          'bram_rd_dout' => {
1307 
            'attributes' => {
1308 
              'bin_pt' => 0,
1309 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
1310 
              'is_floating_block' => 1,
1311 
              'is_gateway_port' => 1,
1312 
              'must_be_hdl_vector' => 1,
1313 
              'period' => 1,
1314 
              'port_id' => 0,
1315 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout/BRAM_rd_dout',
1316 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout',
1317 
              'timingConstraint' => 'none',
1318 
              'type' => 'UFix_64_0',
1319 
            },
1320 
            'direction' => 'out',
1321 
            'hdlType' => 'std_logic_vector(63 downto 0)',
1322 
            'width' => 64,
1323 
          },
1324 
        },
1325 
      },
1326 
      'entityName' => 'bram_rd_dout',
1327 
    },
1328 
    'bram_wr_addr' => {
1329 
      'connections' => { 'bram_wr_addr' => 'sysgen_dut.bram_wr_addr', },
1330 
      'entity' => {
1331 
        'attributes' => {
1332 
          'entityAlreadyNetlisted' => 1,
1333 
          'isGateway' => 1,
1334 
          'is_floating_block' => 1,
1335 
        },
1336 
        'entityName' => 'bram_wr_addr',
1337 
        'ports' => {
1338 
          'bram_wr_addr' => {
1339 
            'attributes' => {
1340 
              'bin_pt' => 0,
1341 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
1342 
              'is_floating_block' => 1,
1343 
              'is_gateway_port' => 1,
1344 
              'must_be_hdl_vector' => 1,
1345 
              'period' => 1,
1346 
              'port_id' => 0,
1347 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr/BRAM_wr_addr',
1348 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr',
1349 
              'timingConstraint' => 'none',
1350 
              'type' => 'UFix_12_0',
1351 
            },
1352 
            'direction' => 'in',
1353 
            'hdlType' => 'std_logic_vector(11 downto 0)',
1354 
            'width' => 12,
1355 
          },
1356 
        },
1357 
      },
1358 
      'entityName' => 'bram_wr_addr',
1359 
    },
1360 
    'bram_wr_din' => {
1361 
      'connections' => { 'bram_wr_din' => 'sysgen_dut.bram_wr_din', },
1362 
      'entity' => {
1363 
        'attributes' => {
1364 
          'entityAlreadyNetlisted' => 1,
1365 
          'isGateway' => 1,
1366 
          'is_floating_block' => 1,
1367 
        },
1368 
        'entityName' => 'bram_wr_din',
1369 
        'ports' => {
1370 
          'bram_wr_din' => {
1371 
            'attributes' => {
1372 
              'bin_pt' => 0,
1373 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
1374 
              'is_floating_block' => 1,
1375 
              'is_gateway_port' => 1,
1376 
              'must_be_hdl_vector' => 1,
1377 
              'period' => 1,
1378 
              'port_id' => 0,
1379 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din/BRAM_wr_din',
1380 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din',
1381 
              'timingConstraint' => 'none',
1382 
              'type' => 'UFix_64_0',
1383 
            },
1384 
            'direction' => 'in',
1385 
            'hdlType' => 'std_logic_vector(63 downto 0)',
1386 
            'width' => 64,
1387 
          },
1388 
        },
1389 
      },
1390 
      'entityName' => 'bram_wr_din',
1391 
    },
1392 
    'bram_wr_en' => {
1393 
      'connections' => { 'bram_wr_en' => 'sysgen_dut.bram_wr_en', },
1394 
      'entity' => {
1395 
        'attributes' => {
1396 
          'entityAlreadyNetlisted' => 1,
1397 
          'isGateway' => 1,
1398 
          'is_floating_block' => 1,
1399 
        },
1400 
        'entityName' => 'bram_wr_en',
1401 
        'ports' => {
1402 
          'bram_wr_en' => {
1403 
            'attributes' => {
1404 
              'bin_pt' => 0,
1405 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
1406 
              'is_floating_block' => 1,
1407 
              'is_gateway_port' => 1,
1408 
              'must_be_hdl_vector' => 1,
1409 
              'period' => 1,
1410 
              'port_id' => 0,
1411 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en/BRAM_wr_en',
1412 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en',
1413 
              'timingConstraint' => 'none',
1414 
              'type' => 'UFix_8_0',
1415 
            },
1416 
            'direction' => 'in',
1417 
            'hdlType' => 'std_logic_vector(7 downto 0)',
1418 
            'width' => 8,
1419 
          },
1420 
        },
1421 
      },
1422 
      'entityName' => 'bram_wr_en',
1423 
    },
1424 
    'fifo_rd_count' => {
1425 
      'connections' => { 'fifo_rd_count' => '.fifo_rd_count', },
1426 
      'entity' => {
1427 
        'attributes' => {
1428 
          'entityAlreadyNetlisted' => 1,
1429 
          'isGateway' => 1,
1430 
          'is_floating_block' => 1,
1431 
        },
1432 
        'entityName' => 'fifo_rd_count',
1433 
        'ports' => {
1434 
          'fifo_rd_count' => {
1435 
            'attributes' => {
1436 
              'bin_pt' => 0,
1437 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
1438 
              'is_floating_block' => 1,
1439 
              'is_gateway_port' => 1,
1440 
              'must_be_hdl_vector' => 1,
1441 
              'period' => 1,
1442 
              'port_id' => 0,
1443 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count/FIFO_rd_count',
1444 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count',
1445 
              'timingConstraint' => 'none',
1446 
              'type' => 'UFix_15_0',
1447 
            },
1448 
            'direction' => 'out',
1449 
            'hdlType' => 'std_logic_vector(14 downto 0)',
1450 
            'width' => 15,
1451 
          },
1452 
        },
1453 
      },
1454 
      'entityName' => 'fifo_rd_count',
1455 
    },
1456 
    'fifo_rd_dout' => {
1457 
      'connections' => { 'fifo_rd_dout' => '.fifo_rd_dout', },
1458 
      'entity' => {
1459 
        'attributes' => {
1460 
          'entityAlreadyNetlisted' => 1,
1461 
          'isGateway' => 1,
1462 
          'is_floating_block' => 1,
1463 
        },
1464 
        'entityName' => 'fifo_rd_dout',
1465 
        'ports' => {
1466 
          'fifo_rd_dout' => {
1467 
            'attributes' => {
1468 
              'bin_pt' => 0,
1469 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
1470 
              'is_floating_block' => 1,
1471 
              'is_gateway_port' => 1,
1472 
              'must_be_hdl_vector' => 1,
1473 
              'period' => 1,
1474 
              'port_id' => 0,
1475 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout/FIFO_rd_dout',
1476 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout',
1477 
              'timingConstraint' => 'none',
1478 
              'type' => 'UFix_72_0',
1479 
            },
1480 
            'direction' => 'out',
1481 
            'hdlType' => 'std_logic_vector(71 downto 0)',
1482 
            'width' => 72,
1483 
          },
1484 
        },
1485 
      },
1486 
      'entityName' => 'fifo_rd_dout',
1487 
    },
1488 
    'fifo_rd_empty' => {
1489 
      'connections' => { 'fifo_rd_empty' => '.fifo_rd_empty', },
1490 
      'entity' => {
1491 
        'attributes' => {
1492 
          'entityAlreadyNetlisted' => 1,
1493 
          'isGateway' => 1,
1494 
          'is_floating_block' => 1,
1495 
        },
1496 
        'entityName' => 'fifo_rd_empty',
1497 
        'ports' => {
1498 
          'fifo_rd_empty' => {
1499 
            'attributes' => {
1500 
              'bin_pt' => 0,
1501 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
1502 
              'is_floating_block' => 1,
1503 
              'is_gateway_port' => 1,
1504 
              'must_be_hdl_vector' => 1,
1505 
              'period' => 1,
1506 
              'port_id' => 0,
1507 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty/FIFO_rd_empty',
1508 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty',
1509 
              'timingConstraint' => 'none',
1510 
              'type' => 'Bool',
1511 
            },
1512 
            'direction' => 'out',
1513 
            'hdlType' => 'std_logic',
1514 
            'width' => 1,
1515 
          },
1516 
        },
1517 
      },
1518 
      'entityName' => 'fifo_rd_empty',
1519 
    },
1520 
    'fifo_rd_en' => {
1521 
      'connections' => { 'fifo_rd_en' => 'sysgen_dut.fifo_rd_en', },
1522 
      'entity' => {
1523 
        'attributes' => {
1524 
          'entityAlreadyNetlisted' => 1,
1525 
          'isGateway' => 1,
1526 
          'is_floating_block' => 1,
1527 
        },
1528 
        'entityName' => 'fifo_rd_en',
1529 
        'ports' => {
1530 
          'fifo_rd_en' => {
1531 
            'attributes' => {
1532 
              'bin_pt' => 0,
1533 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
1534 
              'is_floating_block' => 1,
1535 
              'is_gateway_port' => 1,
1536 
              'must_be_hdl_vector' => 1,
1537 
              'period' => 1,
1538 
              'port_id' => 0,
1539 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en/FIFO_rd_en',
1540 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en',
1541 
              'timingConstraint' => 'none',
1542 
              'type' => 'Bool',
1543 
            },
1544 
            'direction' => 'in',
1545 
            'hdlType' => 'std_logic',
1546 
            'width' => 1,
1547 
          },
1548 
        },
1549 
      },
1550 
      'entityName' => 'fifo_rd_en',
1551 
    },
1552 
    'fifo_rd_pempty' => {
1553 
      'connections' => { 'fifo_rd_pempty' => '.fifo_rd_pempty', },
1554 
      'entity' => {
1555 
        'attributes' => {
1556 
          'entityAlreadyNetlisted' => 1,
1557 
          'isGateway' => 1,
1558 
          'is_floating_block' => 1,
1559 
        },
1560 
        'entityName' => 'fifo_rd_pempty',
1561 
        'ports' => {
1562 
          'fifo_rd_pempty' => {
1563 
            'attributes' => {
1564 
              'bin_pt' => 0,
1565 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
1566 
              'is_floating_block' => 1,
1567 
              'is_gateway_port' => 1,
1568 
              'must_be_hdl_vector' => 1,
1569 
              'period' => 1,
1570 
              'port_id' => 0,
1571 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty/FIFO_rd_pempty',
1572 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty',
1573 
              'timingConstraint' => 'none',
1574 
              'type' => 'Bool',
1575 
            },
1576 
            'direction' => 'out',
1577 
            'hdlType' => 'std_logic',
1578 
            'width' => 1,
1579 
          },
1580 
        },
1581 
      },
1582 
      'entityName' => 'fifo_rd_pempty',
1583 
    },
1584 
    'fifo_rd_valid' => {
1585 
      'connections' => { 'fifo_rd_valid' => '.fifo_rd_valid', },
1586 
      'entity' => {
1587 
        'attributes' => {
1588 
          'entityAlreadyNetlisted' => 1,
1589 
          'isGateway' => 1,
1590 
          'is_floating_block' => 1,
1591 
        },
1592 
        'entityName' => 'fifo_rd_valid',
1593 
        'ports' => {
1594 
          'fifo_rd_valid' => {
1595 
            'attributes' => {
1596 
              'bin_pt' => 0,
1597 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
1598 
              'is_floating_block' => 1,
1599 
              'is_gateway_port' => 1,
1600 
              'must_be_hdl_vector' => 1,
1601 
              'period' => 1,
1602 
              'port_id' => 0,
1603 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid/FIFO_rd_valid',
1604 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid',
1605 
              'timingConstraint' => 'none',
1606 
              'type' => 'Bool',
1607 
            },
1608 
            'direction' => 'out',
1609 
            'hdlType' => 'std_logic',
1610 
            'width' => 1,
1611 
          },
1612 
        },
1613 
      },
1614 
      'entityName' => 'fifo_rd_valid',
1615 
    },
1616 
    'fifo_wr_count' => {
1617 
      'connections' => { 'fifo_wr_count' => '.fifo_wr_count', },
1618 
      'entity' => {
1619 
        'attributes' => {
1620 
          'entityAlreadyNetlisted' => 1,
1621 
          'isGateway' => 1,
1622 
          'is_floating_block' => 1,
1623 
        },
1624 
        'entityName' => 'fifo_wr_count',
1625 
        'ports' => {
1626 
          'fifo_wr_count' => {
1627 
            'attributes' => {
1628 
              'bin_pt' => 0,
1629 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
1630 
              'is_floating_block' => 1,
1631 
              'is_gateway_port' => 1,
1632 
              'must_be_hdl_vector' => 1,
1633 
              'period' => 1,
1634 
              'port_id' => 0,
1635 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count/FIFO_wr_count',
1636 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count',
1637 
              'timingConstraint' => 'none',
1638 
              'type' => 'UFix_15_0',
1639 
            },
1640 
            'direction' => 'out',
1641 
            'hdlType' => 'std_logic_vector(14 downto 0)',
1642 
            'width' => 15,
1643 
          },
1644 
        },
1645 
      },
1646 
      'entityName' => 'fifo_wr_count',
1647 
    },
1648 
    'fifo_wr_din' => {
1649 
      'connections' => { 'fifo_wr_din' => 'sysgen_dut.fifo_wr_din', },
1650 
      'entity' => {
1651 
        'attributes' => {
1652 
          'entityAlreadyNetlisted' => 1,
1653 
          'isGateway' => 1,
1654 
          'is_floating_block' => 1,
1655 
        },
1656 
        'entityName' => 'fifo_wr_din',
1657 
        'ports' => {
1658 
          'fifo_wr_din' => {
1659 
            'attributes' => {
1660 
              'bin_pt' => 0,
1661 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
1662 
              'is_floating_block' => 1,
1663 
              'is_gateway_port' => 1,
1664 
              'must_be_hdl_vector' => 1,
1665 
              'period' => 1,
1666 
              'port_id' => 0,
1667 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din/FIFO_wr_din',
1668 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din',
1669 
              'timingConstraint' => 'none',
1670 
              'type' => 'UFix_72_0',
1671 
            },
1672 
            'direction' => 'in',
1673 
            'hdlType' => 'std_logic_vector(71 downto 0)',
1674 
            'width' => 72,
1675 
          },
1676 
        },
1677 
      },
1678 
      'entityName' => 'fifo_wr_din',
1679 
    },
1680 
    'fifo_wr_en' => {
1681 
      'connections' => { 'fifo_wr_en' => 'sysgen_dut.fifo_wr_en', },
1682 
      'entity' => {
1683 
        'attributes' => {
1684 
          'entityAlreadyNetlisted' => 1,
1685 
          'isGateway' => 1,
1686 
          'is_floating_block' => 1,
1687 
        },
1688 
        'entityName' => 'fifo_wr_en',
1689 
        'ports' => {
1690 
          'fifo_wr_en' => {
1691 
            'attributes' => {
1692 
              'bin_pt' => 0,
1693 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
1694 
              'is_floating_block' => 1,
1695 
              'is_gateway_port' => 1,
1696 
              'must_be_hdl_vector' => 1,
1697 
              'period' => 1,
1698 
              'port_id' => 0,
1699 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en/FIFO_wr_en',
1700 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en',
1701 
              'timingConstraint' => 'none',
1702 
              'type' => 'Bool',
1703 
            },
1704 
            'direction' => 'in',
1705 
            'hdlType' => 'std_logic',
1706 
            'width' => 1,
1707 
          },
1708 
        },
1709 
      },
1710 
      'entityName' => 'fifo_wr_en',
1711 
    },
1712 
    'fifo_wr_full' => {
1713 
      'connections' => { 'fifo_wr_full' => '.fifo_wr_full', },
1714 
      'entity' => {
1715 
        'attributes' => {
1716 
          'entityAlreadyNetlisted' => 1,
1717 
          'isGateway' => 1,
1718 
          'is_floating_block' => 1,
1719 
        },
1720 
        'entityName' => 'fifo_wr_full',
1721 
        'ports' => {
1722 
          'fifo_wr_full' => {
1723 
            'attributes' => {
1724 
              'bin_pt' => 0,
1725 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
1726 
              'is_floating_block' => 1,
1727 
              'is_gateway_port' => 1,
1728 
              'must_be_hdl_vector' => 1,
1729 
              'period' => 1,
1730 
              'port_id' => 0,
1731 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full/FIFO_wr_full',
1732 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full',
1733 
              'timingConstraint' => 'none',
1734 
              'type' => 'Bool',
1735 
            },
1736 
            'direction' => 'out',
1737 
            'hdlType' => 'std_logic',
1738 
            'width' => 1,
1739 
          },
1740 
        },
1741 
      },
1742 
      'entityName' => 'fifo_wr_full',
1743 
    },
1744 
    'fifo_wr_pfull' => {
1745 
      'connections' => { 'fifo_wr_pfull' => '.fifo_wr_pfull', },
1746 
      'entity' => {
1747 
        'attributes' => {
1748 
          'entityAlreadyNetlisted' => 1,
1749 
          'isGateway' => 1,
1750 
          'is_floating_block' => 1,
1751 
        },
1752 
        'entityName' => 'fifo_wr_pfull',
1753 
        'ports' => {
1754 
          'fifo_wr_pfull' => {
1755 
            'attributes' => {
1756 
              'bin_pt' => 0,
1757 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
1758 
              'is_floating_block' => 1,
1759 
              'is_gateway_port' => 1,
1760 
              'must_be_hdl_vector' => 1,
1761 
              'period' => 1,
1762 
              'port_id' => 0,
1763 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull/FIFO_wr_pfull',
1764 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull',
1765 
              'timingConstraint' => 'none',
1766 
              'type' => 'Bool',
1767 
            },
1768 
            'direction' => 'out',
1769 
            'hdlType' => 'std_logic',
1770 
            'width' => 1,
1771 
          },
1772 
        },
1773 
      },
1774 
      'entityName' => 'fifo_wr_pfull',
1775 
    },
1776 
    'from_register' => {
1777 
      'connections' => { 'data_out' => 'from_register.data_out', },
1778 
      'entity' => {
1779 
        'attributes' => {
1780 
          'entityAlreadyNetlisted' => 1,
1781 
          'generics' => [],
1782 
          'is_floating_block' => 1,
1783 
          'mask' => {
1784 
            'Block_Handle' => 2395.00048828125,
1785 
            'Block_handle' => 2395.00048828125,
1786 
            'MDL_Handle' => 2083.00048828125,
1787 
            'MDL_handle' => 2083.00048828125,
1788 
            'arith_type' => 2,
1789 
            'bin_pt' => 0,
1790 
            'block_config' => 'sysgen_blockset:fromreg_config',
1791 
            'block_handle' => 2395.00048828125,
1792 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register',
1793 
            'block_type' => 'fromreg',
1794 
            'dbl_ovrd' => 0,
1795 
            'gui_display_data_type' => 1,
1796 
            'init' => 0,
1797 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
1798 
            'mdl_handle' => 2083.00048828125,
1799 
            'model_handle' => 2083.00048828125,
1800 
            'n_bits' => 32,
1801 
            'ownership' => 2,
1802 
            'period' => '5e-009',
1803 
            'preci_type' => 1,
1804 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1805 
            'shared_memory_name' => 'debug1i',
1806 
          },
1807 
          'needs_vhdl_wrapper' => 0,
1808 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register',
1809 
        },
1810 
        'entityName' => 'x_x89',
1811 
        'ports' => {
1812 
          'data_out' => {
1813 
            'attributes' => {
1814 
              'bin_pt' => 0,
1815 
              'is_floating_block' => 1,
1816 
              'must_be_hdl_vector' => 1,
1817 
              'period' => 1,
1818 
              'port_id' => 0,
1819 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register/data_out',
1820 
              'type' => 'UFix_32_0',
1821 
            },
1822 
            'direction' => 'out',
1823 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1824 
            'width' => 32,
1825 
          },
1826 
        },
1827 
      },
1828 
      'entityName' => 'x_x89',
1829 
    },
1830 
    'from_register1' => {
1831 
      'connections' => { 'data_out' => 'from_register1.data_out', },
1832 
      'entity' => {
1833 
        'attributes' => {
1834 
          'entityAlreadyNetlisted' => 1,
1835 
          'generics' => [],
1836 
          'is_floating_block' => 1,
1837 
          'mask' => {
1838 
            'Block_Handle' => 2396.00048828125,
1839 
            'Block_handle' => 2396.00048828125,
1840 
            'MDL_Handle' => 2083.00048828125,
1841 
            'MDL_handle' => 2083.00048828125,
1842 
            'arith_type' => 2,
1843 
            'bin_pt' => 0,
1844 
            'block_config' => 'sysgen_blockset:fromreg_config',
1845 
            'block_handle' => 2396.00048828125,
1846 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1',
1847 
            'block_type' => 'fromreg',
1848 
            'dbl_ovrd' => 0,
1849 
            'gui_display_data_type' => 1,
1850 
            'init' => 0,
1851 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
1852 
            'mdl_handle' => 2083.00048828125,
1853 
            'model_handle' => 2083.00048828125,
1854 
            'n_bits' => 32,
1855 
            'ownership' => 2,
1856 
            'period' => '5e-009',
1857 
            'preci_type' => 1,
1858 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1859 
            'shared_memory_name' => 'debug2i',
1860 
          },
1861 
          'needs_vhdl_wrapper' => 0,
1862 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1',
1863 
        },
1864 
        'entityName' => 'x_x90',
1865 
        'ports' => {
1866 
          'data_out' => {
1867 
            'attributes' => {
1868 
              'bin_pt' => 0,
1869 
              'is_floating_block' => 1,
1870 
              'must_be_hdl_vector' => 1,
1871 
              'period' => 1,
1872 
              'port_id' => 0,
1873 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1/data_out',
1874 
              'type' => 'UFix_32_0',
1875 
            },
1876 
            'direction' => 'out',
1877 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1878 
            'width' => 32,
1879 
          },
1880 
        },
1881 
      },
1882 
      'entityName' => 'x_x90',
1883 
    },
1884 
    'from_register10' => {
1885 
      'connections' => { 'data_out' => 'from_register10.data_out', },
1886 
      'entity' => {
1887 
        'attributes' => {
1888 
          'entityAlreadyNetlisted' => 1,
1889 
          'generics' => [],
1890 
          'is_floating_block' => 1,
1891 
          'mask' => {
1892 
            'Block_Handle' => 2397.00048828125,
1893 
            'Block_handle' => 2397.00048828125,
1894 
            'MDL_Handle' => 2083.00048828125,
1895 
            'MDL_handle' => 2083.00048828125,
1896 
            'arith_type' => 2,
1897 
            'bin_pt' => 0,
1898 
            'block_config' => 'sysgen_blockset:fromreg_config',
1899 
            'block_handle' => 2397.00048828125,
1900 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10',
1901 
            'block_type' => 'fromreg',
1902 
            'dbl_ovrd' => 0,
1903 
            'gui_display_data_type' => 1,
1904 
            'init' => 0,
1905 
            'init_bit_vector' => '\'b0',
1906 
            'mdl_handle' => 2083.00048828125,
1907 
            'model_handle' => 2083.00048828125,
1908 
            'n_bits' => 1,
1909 
            'ownership' => 2,
1910 
            'period' => '5e-009',
1911 
            'preci_type' => 1,
1912 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1913 
            'shared_memory_name' => 'register04tv',
1914 
          },
1915 
          'needs_vhdl_wrapper' => 0,
1916 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10',
1917 
        },
1918 
        'entityName' => 'x_x91',
1919 
        'ports' => {
1920 
          'data_out' => {
1921 
            'attributes' => {
1922 
              'bin_pt' => 0,
1923 
              'is_floating_block' => 1,
1924 
              'must_be_hdl_vector' => 1,
1925 
              'period' => 1,
1926 
              'port_id' => 0,
1927 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10/data_out',
1928 
              'type' => 'UFix_1_0',
1929 
            },
1930 
            'direction' => 'out',
1931 
            'hdlType' => 'std_logic_vector(0 downto 0)',
1932 
            'width' => 1,
1933 
          },
1934 
        },
1935 
      },
1936 
      'entityName' => 'x_x91',
1937 
    },
1938 
    'from_register11' => {
1939 
      'connections' => { 'data_out' => 'from_register11.data_out', },
1940 
      'entity' => {
1941 
        'attributes' => {
1942 
          'entityAlreadyNetlisted' => 1,
1943 
          'generics' => [],
1944 
          'is_floating_block' => 1,
1945 
          'mask' => {
1946 
            'Block_Handle' => 2398.00048828125,
1947 
            'Block_handle' => 2398.00048828125,
1948 
            'MDL_Handle' => 2083.00048828125,
1949 
            'MDL_handle' => 2083.00048828125,
1950 
            'arith_type' => 2,
1951 
            'bin_pt' => 0,
1952 
            'block_config' => 'sysgen_blockset:fromreg_config',
1953 
            'block_handle' => 2398.00048828125,
1954 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11',
1955 
            'block_type' => 'fromreg',
1956 
            'dbl_ovrd' => 0,
1957 
            'gui_display_data_type' => 1,
1958 
            'init' => 0,
1959 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
1960 
            'mdl_handle' => 2083.00048828125,
1961 
            'model_handle' => 2083.00048828125,
1962 
            'n_bits' => 32,
1963 
            'ownership' => 2,
1964 
            'period' => '5e-009',
1965 
            'preci_type' => 1,
1966 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1967 
            'shared_memory_name' => 'register05td',
1968 
          },
1969 
          'needs_vhdl_wrapper' => 0,
1970 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11',
1971 
        },
1972 
        'entityName' => 'x_x92',
1973 
        'ports' => {
1974 
          'data_out' => {
1975 
            'attributes' => {
1976 
              'bin_pt' => 0,
1977 
              'is_floating_block' => 1,
1978 
              'must_be_hdl_vector' => 1,
1979 
              'period' => 1,
1980 
              'port_id' => 0,
1981 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11/data_out',
1982 
              'type' => 'UFix_32_0',
1983 
            },
1984 
            'direction' => 'out',
1985 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1986 
            'width' => 32,
1987 
          },
1988 
        },
1989 
      },
1990 
      'entityName' => 'x_x92',
1991 
    },
1992 
    'from_register12' => {
1993 
      'connections' => { 'data_out' => 'from_register12.data_out', },
1994 
      'entity' => {
1995 
        'attributes' => {
1996 
          'entityAlreadyNetlisted' => 1,
1997 
          'generics' => [],
1998 
          'is_floating_block' => 1,
1999 
          'mask' => {
2000 
            'Block_Handle' => 2399.00048828125,
2001 
            'Block_handle' => 2399.00048828125,
2002 
            'MDL_Handle' => 2083.00048828125,
2003 
            'MDL_handle' => 2083.00048828125,
2004 
            'arith_type' => 2,
2005 
            'bin_pt' => 0,
2006 
            'block_config' => 'sysgen_blockset:fromreg_config',
2007 
            'block_handle' => 2399.00048828125,
2008 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12',
2009 
            'block_type' => 'fromreg',
2010 
            'dbl_ovrd' => 0,
2011 
            'gui_display_data_type' => 1,
2012 
            'init' => 0,
2013 
            'init_bit_vector' => '\'b0',
2014 
            'mdl_handle' => 2083.00048828125,
2015 
            'model_handle' => 2083.00048828125,
2016 
            'n_bits' => 1,
2017 
            'ownership' => 2,
2018 
            'period' => '5e-009',
2019 
            'preci_type' => 1,
2020 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2021 
            'shared_memory_name' => 'register05tv',
2022 
          },
2023 
          'needs_vhdl_wrapper' => 0,
2024 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12',
2025 
        },
2026 
        'entityName' => 'x_x93',
2027 
        'ports' => {
2028 
          'data_out' => {
2029 
            'attributes' => {
2030 
              'bin_pt' => 0,
2031 
              'is_floating_block' => 1,
2032 
              'must_be_hdl_vector' => 1,
2033 
              'period' => 1,
2034 
              'port_id' => 0,
2035 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12/data_out',
2036 
              'type' => 'UFix_1_0',
2037 
            },
2038 
            'direction' => 'out',
2039 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2040 
            'width' => 1,
2041 
          },
2042 
        },
2043 
      },
2044 
      'entityName' => 'x_x93',
2045 
    },
2046 
    'from_register13' => {
2047 
      'connections' => { 'data_out' => 'from_register13.data_out', },
2048 
      'entity' => {
2049 
        'attributes' => {
2050 
          'entityAlreadyNetlisted' => 1,
2051 
          'generics' => [],
2052 
          'is_floating_block' => 1,
2053 
          'mask' => {
2054 
            'Block_Handle' => 2400.00048828125,
2055 
            'Block_handle' => 2400.00048828125,
2056 
            'MDL_Handle' => 2083.00048828125,
2057 
            'MDL_handle' => 2083.00048828125,
2058 
            'arith_type' => 2,
2059 
            'bin_pt' => 0,
2060 
            'block_config' => 'sysgen_blockset:fromreg_config',
2061 
            'block_handle' => 2400.00048828125,
2062 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13',
2063 
            'block_type' => 'fromreg',
2064 
            'dbl_ovrd' => 0,
2065 
            'gui_display_data_type' => 1,
2066 
            'init' => 0,
2067 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2068 
            'mdl_handle' => 2083.00048828125,
2069 
            'model_handle' => 2083.00048828125,
2070 
            'n_bits' => 32,
2071 
            'ownership' => 2,
2072 
            'period' => '5e-009',
2073 
            'preci_type' => 1,
2074 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2075 
            'shared_memory_name' => 'register06td',
2076 
          },
2077 
          'needs_vhdl_wrapper' => 0,
2078 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13',
2079 
        },
2080 
        'entityName' => 'x_x94',
2081 
        'ports' => {
2082 
          'data_out' => {
2083 
            'attributes' => {
2084 
              'bin_pt' => 0,
2085 
              'is_floating_block' => 1,
2086 
              'must_be_hdl_vector' => 1,
2087 
              'period' => 1,
2088 
              'port_id' => 0,
2089 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13/data_out',
2090 
              'type' => 'UFix_32_0',
2091 
            },
2092 
            'direction' => 'out',
2093 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2094 
            'width' => 32,
2095 
          },
2096 
        },
2097 
      },
2098 
      'entityName' => 'x_x94',
2099 
    },
2100 
    'from_register14' => {
2101 
      'connections' => { 'data_out' => 'from_register14.data_out', },
2102 
      'entity' => {
2103 
        'attributes' => {
2104 
          'entityAlreadyNetlisted' => 1,
2105 
          'generics' => [],
2106 
          'is_floating_block' => 1,
2107 
          'mask' => {
2108 
            'Block_Handle' => 2401.00048828125,
2109 
            'Block_handle' => 2401.00048828125,
2110 
            'MDL_Handle' => 2083.00048828125,
2111 
            'MDL_handle' => 2083.00048828125,
2112 
            'arith_type' => 2,
2113 
            'bin_pt' => 0,
2114 
            'block_config' => 'sysgen_blockset:fromreg_config',
2115 
            'block_handle' => 2401.00048828125,
2116 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14',
2117 
            'block_type' => 'fromreg',
2118 
            'dbl_ovrd' => 0,
2119 
            'gui_display_data_type' => 1,
2120 
            'init' => 0,
2121 
            'init_bit_vector' => '\'b0',
2122 
            'mdl_handle' => 2083.00048828125,
2123 
            'model_handle' => 2083.00048828125,
2124 
            'n_bits' => 1,
2125 
            'ownership' => 2,
2126 
            'period' => '5e-009',
2127 
            'preci_type' => 1,
2128 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2129 
            'shared_memory_name' => 'register06tv',
2130 
          },
2131 
          'needs_vhdl_wrapper' => 0,
2132 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14',
2133 
        },
2134 
        'entityName' => 'x_x95',
2135 
        'ports' => {
2136 
          'data_out' => {
2137 
            'attributes' => {
2138 
              'bin_pt' => 0,
2139 
              'is_floating_block' => 1,
2140 
              'must_be_hdl_vector' => 1,
2141 
              'period' => 1,
2142 
              'port_id' => 0,
2143 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14/data_out',
2144 
              'type' => 'UFix_1_0',
2145 
            },
2146 
            'direction' => 'out',
2147 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2148 
            'width' => 1,
2149 
          },
2150 
        },
2151 
      },
2152 
      'entityName' => 'x_x95',
2153 
    },
2154 
    'from_register15' => {
2155 
      'connections' => { 'data_out' => 'from_register15.data_out', },
2156 
      'entity' => {
2157 
        'attributes' => {
2158 
          'entityAlreadyNetlisted' => 1,
2159 
          'generics' => [],
2160 
          'is_floating_block' => 1,
2161 
          'mask' => {
2162 
            'Block_Handle' => 2402.00048828125,
2163 
            'Block_handle' => 2402.00048828125,
2164 
            'MDL_Handle' => 2083.00048828125,
2165 
            'MDL_handle' => 2083.00048828125,
2166 
            'arith_type' => 2,
2167 
            'bin_pt' => 0,
2168 
            'block_config' => 'sysgen_blockset:fromreg_config',
2169 
            'block_handle' => 2402.00048828125,
2170 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15',
2171 
            'block_type' => 'fromreg',
2172 
            'dbl_ovrd' => 0,
2173 
            'gui_display_data_type' => 1,
2174 
            'init' => 0,
2175 
            'init_bit_vector' => '\'b0',
2176 
            'mdl_handle' => 2083.00048828125,
2177 
            'model_handle' => 2083.00048828125,
2178 
            'n_bits' => 1,
2179 
            'ownership' => 2,
2180 
            'period' => '5e-009',
2181 
            'preci_type' => 1,
2182 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2183 
            'shared_memory_name' => 'DMA_Host2Board_Done',
2184 
          },
2185 
          'needs_vhdl_wrapper' => 0,
2186 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15',
2187 
        },
2188 
        'entityName' => 'x_x96',
2189 
        'ports' => {
2190 
          'data_out' => {
2191 
            'attributes' => {
2192 
              'bin_pt' => 0,
2193 
              'is_floating_block' => 1,
2194 
              'must_be_hdl_vector' => 1,
2195 
              'period' => 1,
2196 
              'port_id' => 0,
2197 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15/data_out',
2198 
              'type' => 'UFix_1_0',
2199 
            },
2200 
            'direction' => 'out',
2201 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2202 
            'width' => 1,
2203 
          },
2204 
        },
2205 
      },
2206 
      'entityName' => 'x_x96',
2207 
    },
2208 
    'from_register16' => {
2209 
      'connections' => { 'data_out' => 'from_register16.data_out', },
2210 
      'entity' => {
2211 
        'attributes' => {
2212 
          'entityAlreadyNetlisted' => 1,
2213 
          'generics' => [],
2214 
          'is_floating_block' => 1,
2215 
          'mask' => {
2216 
            'Block_Handle' => 2403.00048828125,
2217 
            'Block_handle' => 2403.00048828125,
2218 
            'MDL_Handle' => 2083.00048828125,
2219 
            'MDL_handle' => 2083.00048828125,
2220 
            'arith_type' => 2,
2221 
            'bin_pt' => 0,
2222 
            'block_config' => 'sysgen_blockset:fromreg_config',
2223 
            'block_handle' => 2403.00048828125,
2224 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16',
2225 
            'block_type' => 'fromreg',
2226 
            'dbl_ovrd' => 0,
2227 
            'gui_display_data_type' => 1,
2228 
            'init' => 0,
2229 
            'init_bit_vector' => '\'b0',
2230 
            'mdl_handle' => 2083.00048828125,
2231 
            'model_handle' => 2083.00048828125,
2232 
            'n_bits' => 1,
2233 
            'ownership' => 2,
2234 
            'period' => '5e-009',
2235 
            'preci_type' => 1,
2236 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2237 
            'shared_memory_name' => 'DMA_Host2Board_Busy',
2238 
          },
2239 
          'needs_vhdl_wrapper' => 0,
2240 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16',
2241 
        },
2242 
        'entityName' => 'x_x97',
2243 
        'ports' => {
2244 
          'data_out' => {
2245 
            'attributes' => {
2246 
              'bin_pt' => 0,
2247 
              'is_floating_block' => 1,
2248 
              'must_be_hdl_vector' => 1,
2249 
              'period' => 1,
2250 
              'port_id' => 0,
2251 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16/data_out',
2252 
              'type' => 'UFix_1_0',
2253 
            },
2254 
            'direction' => 'out',
2255 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2256 
            'width' => 1,
2257 
          },
2258 
        },
2259 
      },
2260 
      'entityName' => 'x_x97',
2261 
    },
2262 
    'from_register17' => {
2263 
      'connections' => { 'data_out' => 'from_register17.data_out', },
2264 
      'entity' => {
2265 
        'attributes' => {
2266 
          'entityAlreadyNetlisted' => 1,
2267 
          'generics' => [],
2268 
          'is_floating_block' => 1,
2269 
          'mask' => {
2270 
            'Block_Handle' => 2404.00048828125,
2271 
            'Block_handle' => 2404.00048828125,
2272 
            'MDL_Handle' => 2083.00048828125,
2273 
            'MDL_handle' => 2083.00048828125,
2274 
            'arith_type' => 2,
2275 
            'bin_pt' => 0,
2276 
            'block_config' => 'sysgen_blockset:fromreg_config',
2277 
            'block_handle' => 2404.00048828125,
2278 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17',
2279 
            'block_type' => 'fromreg',
2280 
            'dbl_ovrd' => 0,
2281 
            'gui_display_data_type' => 1,
2282 
            'init' => 0,
2283 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2284 
            'mdl_handle' => 2083.00048828125,
2285 
            'model_handle' => 2083.00048828125,
2286 
            'n_bits' => 32,
2287 
            'ownership' => 2,
2288 
            'period' => '5e-009',
2289 
            'preci_type' => 1,
2290 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2291 
            'shared_memory_name' => 'register07td',
2292 
          },
2293 
          'needs_vhdl_wrapper' => 0,
2294 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17',
2295 
        },
2296 
        'entityName' => 'x_x98',
2297 
        'ports' => {
2298 
          'data_out' => {
2299 
            'attributes' => {
2300 
              'bin_pt' => 0,
2301 
              'is_floating_block' => 1,
2302 
              'must_be_hdl_vector' => 1,
2303 
              'period' => 1,
2304 
              'port_id' => 0,
2305 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17/data_out',
2306 
              'type' => 'UFix_32_0',
2307 
            },
2308 
            'direction' => 'out',
2309 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2310 
            'width' => 32,
2311 
          },
2312 
        },
2313 
      },
2314 
      'entityName' => 'x_x98',
2315 
    },
2316 
    'from_register18' => {
2317 
      'connections' => { 'data_out' => 'from_register18.data_out', },
2318 
      'entity' => {
2319 
        'attributes' => {
2320 
          'entityAlreadyNetlisted' => 1,
2321 
          'generics' => [],
2322 
          'is_floating_block' => 1,
2323 
          'mask' => {
2324 
            'Block_Handle' => 2405.00048828125,
2325 
            'Block_handle' => 2405.00048828125,
2326 
            'MDL_Handle' => 2083.00048828125,
2327 
            'MDL_handle' => 2083.00048828125,
2328 
            'arith_type' => 2,
2329 
            'bin_pt' => 0,
2330 
            'block_config' => 'sysgen_blockset:fromreg_config',
2331 
            'block_handle' => 2405.00048828125,
2332 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18',
2333 
            'block_type' => 'fromreg',
2334 
            'dbl_ovrd' => 0,
2335 
            'gui_display_data_type' => 1,
2336 
            'init' => 0,
2337 
            'init_bit_vector' => '\'b0',
2338 
            'mdl_handle' => 2083.00048828125,
2339 
            'model_handle' => 2083.00048828125,
2340 
            'n_bits' => 1,
2341 
            'ownership' => 2,
2342 
            'period' => '5e-009',
2343 
            'preci_type' => 1,
2344 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2345 
            'shared_memory_name' => 'register07tv',
2346 
          },
2347 
          'needs_vhdl_wrapper' => 0,
2348 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18',
2349 
        },
2350 
        'entityName' => 'x_x99',
2351 
        'ports' => {
2352 
          'data_out' => {
2353 
            'attributes' => {
2354 
              'bin_pt' => 0,
2355 
              'is_floating_block' => 1,
2356 
              'must_be_hdl_vector' => 1,
2357 
              'period' => 1,
2358 
              'port_id' => 0,
2359 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18/data_out',
2360 
              'type' => 'UFix_1_0',
2361 
            },
2362 
            'direction' => 'out',
2363 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2364 
            'width' => 1,
2365 
          },
2366 
        },
2367 
      },
2368 
      'entityName' => 'x_x99',
2369 
    },
2370 
    'from_register19' => {
2371 
      'connections' => { 'data_out' => 'from_register19.data_out', },
2372 
      'entity' => {
2373 
        'attributes' => {
2374 
          'entityAlreadyNetlisted' => 1,
2375 
          'generics' => [],
2376 
          'is_floating_block' => 1,
2377 
          'mask' => {
2378 
            'Block_Handle' => 2406.00048828125,
2379 
            'Block_handle' => 2406.00048828125,
2380 
            'MDL_Handle' => 2083.00048828125,
2381 
            'MDL_handle' => 2083.00048828125,
2382 
            'arith_type' => 2,
2383 
            'bin_pt' => 0,
2384 
            'block_config' => 'sysgen_blockset:fromreg_config',
2385 
            'block_handle' => 2406.00048828125,
2386 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19',
2387 
            'block_type' => 'fromreg',
2388 
            'dbl_ovrd' => 0,
2389 
            'gui_display_data_type' => 1,
2390 
            'init' => 0,
2391 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2392 
            'mdl_handle' => 2083.00048828125,
2393 
            'model_handle' => 2083.00048828125,
2394 
            'n_bits' => 32,
2395 
            'ownership' => 2,
2396 
            'period' => '5e-009',
2397 
            'preci_type' => 1,
2398 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2399 
            'shared_memory_name' => 'debug4i',
2400 
          },
2401 
          'needs_vhdl_wrapper' => 0,
2402 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19',
2403 
        },
2404 
        'entityName' => 'x_x100',
2405 
        'ports' => {
2406 
          'data_out' => {
2407 
            'attributes' => {
2408 
              'bin_pt' => 0,
2409 
              'is_floating_block' => 1,
2410 
              'must_be_hdl_vector' => 1,
2411 
              'period' => 1,
2412 
              'port_id' => 0,
2413 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19/data_out',
2414 
              'type' => 'UFix_32_0',
2415 
            },
2416 
            'direction' => 'out',
2417 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2418 
            'width' => 32,
2419 
          },
2420 
        },
2421 
      },
2422 
      'entityName' => 'x_x100',
2423 
    },
2424 
    'from_register2' => {
2425 
      'connections' => { 'data_out' => 'from_register2.data_out', },
2426 
      'entity' => {
2427 
        'attributes' => {
2428 
          'entityAlreadyNetlisted' => 1,
2429 
          'generics' => [],
2430 
          'is_floating_block' => 1,
2431 
          'mask' => {
2432 
            'Block_Handle' => 2407.00048828125,
2433 
            'Block_handle' => 2407.00048828125,
2434 
            'MDL_Handle' => 2083.00048828125,
2435 
            'MDL_handle' => 2083.00048828125,
2436 
            'arith_type' => 2,
2437 
            'bin_pt' => 0,
2438 
            'block_config' => 'sysgen_blockset:fromreg_config',
2439 
            'block_handle' => 2407.00048828125,
2440 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2',
2441 
            'block_type' => 'fromreg',
2442 
            'dbl_ovrd' => 0,
2443 
            'gui_display_data_type' => 1,
2444 
            'init' => 0,
2445 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2446 
            'mdl_handle' => 2083.00048828125,
2447 
            'model_handle' => 2083.00048828125,
2448 
            'n_bits' => 32,
2449 
            'ownership' => 2,
2450 
            'period' => '5e-009',
2451 
            'preci_type' => 1,
2452 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2453 
            'shared_memory_name' => 'debug3i',
2454 
          },
2455 
          'needs_vhdl_wrapper' => 0,
2456 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2',
2457 
        },
2458 
        'entityName' => 'x_x101',
2459 
        'ports' => {
2460 
          'data_out' => {
2461 
            'attributes' => {
2462 
              'bin_pt' => 0,
2463 
              'is_floating_block' => 1,
2464 
              'must_be_hdl_vector' => 1,
2465 
              'period' => 1,
2466 
              'port_id' => 0,
2467 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2/data_out',
2468 
              'type' => 'UFix_32_0',
2469 
            },
2470 
            'direction' => 'out',
2471 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2472 
            'width' => 32,
2473 
          },
2474 
        },
2475 
      },
2476 
      'entityName' => 'x_x101',
2477 
    },
2478 
    'from_register20' => {
2479 
      'connections' => { 'data_out' => 'from_register20.data_out', },
2480 
      'entity' => {
2481 
        'attributes' => {
2482 
          'entityAlreadyNetlisted' => 1,
2483 
          'generics' => [],
2484 
          'is_floating_block' => 1,
2485 
          'mask' => {
2486 
            'Block_Handle' => 2408.00048828125,
2487 
            'Block_handle' => 2408.00048828125,
2488 
            'MDL_Handle' => 2083.00048828125,
2489 
            'MDL_handle' => 2083.00048828125,
2490 
            'arith_type' => 2,
2491 
            'bin_pt' => 0,
2492 
            'block_config' => 'sysgen_blockset:fromreg_config',
2493 
            'block_handle' => 2408.00048828125,
2494 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20',
2495 
            'block_type' => 'fromreg',
2496 
            'dbl_ovrd' => 0,
2497 
            'gui_display_data_type' => 1,
2498 
            'init' => 0,
2499 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2500 
            'mdl_handle' => 2083.00048828125,
2501 
            'model_handle' => 2083.00048828125,
2502 
            'n_bits' => 32,
2503 
            'ownership' => 2,
2504 
            'period' => '5e-009',
2505 
            'preci_type' => 1,
2506 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2507 
            'shared_memory_name' => 'register08td',
2508 
          },
2509 
          'needs_vhdl_wrapper' => 0,
2510 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20',
2511 
        },
2512 
        'entityName' => 'x_x102',
2513 
        'ports' => {
2514 
          'data_out' => {
2515 
            'attributes' => {
2516 
              'bin_pt' => 0,
2517 
              'is_floating_block' => 1,
2518 
              'must_be_hdl_vector' => 1,
2519 
              'period' => 1,
2520 
              'port_id' => 0,
2521 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20/data_out',
2522 
              'type' => 'UFix_32_0',
2523 
            },
2524 
            'direction' => 'out',
2525 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2526 
            'width' => 32,
2527 
          },
2528 
        },
2529 
      },
2530 
      'entityName' => 'x_x102',
2531 
    },
2532 
    'from_register21' => {
2533 
      'connections' => { 'data_out' => 'from_register21.data_out', },
2534 
      'entity' => {
2535 
        'attributes' => {
2536 
          'entityAlreadyNetlisted' => 1,
2537 
          'generics' => [],
2538 
          'is_floating_block' => 1,
2539 
          'mask' => {
2540 
            'Block_Handle' => 2409.00048828125,
2541 
            'Block_handle' => 2409.00048828125,
2542 
            'MDL_Handle' => 2083.00048828125,
2543 
            'MDL_handle' => 2083.00048828125,
2544 
            'arith_type' => 2,
2545 
            'bin_pt' => 0,
2546 
            'block_config' => 'sysgen_blockset:fromreg_config',
2547 
            'block_handle' => 2409.00048828125,
2548 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21',
2549 
            'block_type' => 'fromreg',
2550 
            'dbl_ovrd' => 0,
2551 
            'gui_display_data_type' => 1,
2552 
            'init' => 0,
2553 
            'init_bit_vector' => '\'b0',
2554 
            'mdl_handle' => 2083.00048828125,
2555 
            'model_handle' => 2083.00048828125,
2556 
            'n_bits' => 1,
2557 
            'ownership' => 2,
2558 
            'period' => '5e-009',
2559 
            'preci_type' => 1,
2560 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2561 
            'shared_memory_name' => 'register08tv',
2562 
          },
2563 
          'needs_vhdl_wrapper' => 0,
2564 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21',
2565 
        },
2566 
        'entityName' => 'x_x103',
2567 
        'ports' => {
2568 
          'data_out' => {
2569 
            'attributes' => {
2570 
              'bin_pt' => 0,
2571 
              'is_floating_block' => 1,
2572 
              'must_be_hdl_vector' => 1,
2573 
              'period' => 1,
2574 
              'port_id' => 0,
2575 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21/data_out',
2576 
              'type' => 'UFix_1_0',
2577 
            },
2578 
            'direction' => 'out',
2579 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2580 
            'width' => 1,
2581 
          },
2582 
        },
2583 
      },
2584 
      'entityName' => 'x_x103',
2585 
    },
2586 
    'from_register22' => {
2587 
      'connections' => { 'data_out' => 'from_register22.data_out', },
2588 
      'entity' => {
2589 
        'attributes' => {
2590 
          'entityAlreadyNetlisted' => 1,
2591 
          'generics' => [],
2592 
          'is_floating_block' => 1,
2593 
          'mask' => {
2594 
            'Block_Handle' => 2410.00048828125,
2595 
            'Block_handle' => 2410.00048828125,
2596 
            'MDL_Handle' => 2083.00048828125,
2597 
            'MDL_handle' => 2083.00048828125,
2598 
            'arith_type' => 2,
2599 
            'bin_pt' => 0,
2600 
            'block_config' => 'sysgen_blockset:fromreg_config',
2601 
            'block_handle' => 2410.00048828125,
2602 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22',
2603 
            'block_type' => 'fromreg',
2604 
            'dbl_ovrd' => 0,
2605 
            'gui_display_data_type' => 1,
2606 
            'init' => 0,
2607 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2608 
            'mdl_handle' => 2083.00048828125,
2609 
            'model_handle' => 2083.00048828125,
2610 
            'n_bits' => 32,
2611 
            'ownership' => 2,
2612 
            'period' => '5e-009',
2613 
            'preci_type' => 1,
2614 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2615 
            'shared_memory_name' => 'register09td',
2616 
          },
2617 
          'needs_vhdl_wrapper' => 0,
2618 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22',
2619 
        },
2620 
        'entityName' => 'x_x104',
2621 
        'ports' => {
2622 
          'data_out' => {
2623 
            'attributes' => {
2624 
              'bin_pt' => 0,
2625 
              'is_floating_block' => 1,
2626 
              'must_be_hdl_vector' => 1,
2627 
              'period' => 1,
2628 
              'port_id' => 0,
2629 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22/data_out',
2630 
              'type' => 'UFix_32_0',
2631 
            },
2632 
            'direction' => 'out',
2633 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2634 
            'width' => 32,
2635 
          },
2636 
        },
2637 
      },
2638 
      'entityName' => 'x_x104',
2639 
    },
2640 
    'from_register23' => {
2641 
      'connections' => { 'data_out' => 'from_register23.data_out', },
2642 
      'entity' => {
2643 
        'attributes' => {
2644 
          'entityAlreadyNetlisted' => 1,
2645 
          'generics' => [],
2646 
          'is_floating_block' => 1,
2647 
          'mask' => {
2648 
            'Block_Handle' => 2411.00048828125,
2649 
            'Block_handle' => 2411.00048828125,
2650 
            'MDL_Handle' => 2083.00048828125,
2651 
            'MDL_handle' => 2083.00048828125,
2652 
            'arith_type' => 2,
2653 
            'bin_pt' => 0,
2654 
            'block_config' => 'sysgen_blockset:fromreg_config',
2655 
            'block_handle' => 2411.00048828125,
2656 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23',
2657 
            'block_type' => 'fromreg',
2658 
            'dbl_ovrd' => 0,
2659 
            'gui_display_data_type' => 1,
2660 
            'init' => 0,
2661 
            'init_bit_vector' => '\'b0',
2662 
            'mdl_handle' => 2083.00048828125,
2663 
            'model_handle' => 2083.00048828125,
2664 
            'n_bits' => 1,
2665 
            'ownership' => 2,
2666 
            'period' => '5e-009',
2667 
            'preci_type' => 1,
2668 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2669 
            'shared_memory_name' => 'register09tv',
2670 
          },
2671 
          'needs_vhdl_wrapper' => 0,
2672 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23',
2673 
        },
2674 
        'entityName' => 'x_x105',
2675 
        'ports' => {
2676 
          'data_out' => {
2677 
            'attributes' => {
2678 
              'bin_pt' => 0,
2679 
              'is_floating_block' => 1,
2680 
              'must_be_hdl_vector' => 1,
2681 
              'period' => 1,
2682 
              'port_id' => 0,
2683 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23/data_out',
2684 
              'type' => 'UFix_1_0',
2685 
            },
2686 
            'direction' => 'out',
2687 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2688 
            'width' => 1,
2689 
          },
2690 
        },
2691 
      },
2692 
      'entityName' => 'x_x105',
2693 
    },
2694 
    'from_register24' => {
2695 
      'connections' => { 'data_out' => 'from_register24.data_out', },
2696 
      'entity' => {
2697 
        'attributes' => {
2698 
          'entityAlreadyNetlisted' => 1,
2699 
          'generics' => [],
2700 
          'is_floating_block' => 1,
2701 
          'mask' => {
2702 
            'Block_Handle' => 2412.00048828125,
2703 
            'Block_handle' => 2412.00048828125,
2704 
            'MDL_Handle' => 2083.00048828125,
2705 
            'MDL_handle' => 2083.00048828125,
2706 
            'arith_type' => 2,
2707 
            'bin_pt' => 0,
2708 
            'block_config' => 'sysgen_blockset:fromreg_config',
2709 
            'block_handle' => 2412.00048828125,
2710 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24',
2711 
            'block_type' => 'fromreg',
2712 
            'dbl_ovrd' => 0,
2713 
            'gui_display_data_type' => 1,
2714 
            'init' => 0,
2715 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2716 
            'mdl_handle' => 2083.00048828125,
2717 
            'model_handle' => 2083.00048828125,
2718 
            'n_bits' => 32,
2719 
            'ownership' => 2,
2720 
            'period' => '5e-009',
2721 
            'preci_type' => 1,
2722 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2723 
            'shared_memory_name' => 'register10td',
2724 
          },
2725 
          'needs_vhdl_wrapper' => 0,
2726 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24',
2727 
        },
2728 
        'entityName' => 'x_x106',
2729 
        'ports' => {
2730 
          'data_out' => {
2731 
            'attributes' => {
2732 
              'bin_pt' => 0,
2733 
              'is_floating_block' => 1,
2734 
              'must_be_hdl_vector' => 1,
2735 
              'period' => 1,
2736 
              'port_id' => 0,
2737 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24/data_out',
2738 
              'type' => 'UFix_32_0',
2739 
            },
2740 
            'direction' => 'out',
2741 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2742 
            'width' => 32,
2743 
          },
2744 
        },
2745 
      },
2746 
      'entityName' => 'x_x106',
2747 
    },
2748 
    'from_register25' => {
2749 
      'connections' => { 'data_out' => 'from_register25.data_out', },
2750 
      'entity' => {
2751 
        'attributes' => {
2752 
          'entityAlreadyNetlisted' => 1,
2753 
          'generics' => [],
2754 
          'is_floating_block' => 1,
2755 
          'mask' => {
2756 
            'Block_Handle' => 2413.00048828125,
2757 
            'Block_handle' => 2413.00048828125,
2758 
            'MDL_Handle' => 2083.00048828125,
2759 
            'MDL_handle' => 2083.00048828125,
2760 
            'arith_type' => 2,
2761 
            'bin_pt' => 0,
2762 
            'block_config' => 'sysgen_blockset:fromreg_config',
2763 
            'block_handle' => 2413.00048828125,
2764 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25',
2765 
            'block_type' => 'fromreg',
2766 
            'dbl_ovrd' => 0,
2767 
            'gui_display_data_type' => 1,
2768 
            'init' => 0,
2769 
            'init_bit_vector' => '\'b0',
2770 
            'mdl_handle' => 2083.00048828125,
2771 
            'model_handle' => 2083.00048828125,
2772 
            'n_bits' => 1,
2773 
            'ownership' => 2,
2774 
            'period' => '5e-009',
2775 
            'preci_type' => 1,
2776 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2777 
            'shared_memory_name' => 'register10tv',
2778 
          },
2779 
          'needs_vhdl_wrapper' => 0,
2780 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25',
2781 
        },
2782 
        'entityName' => 'x_x107',
2783 
        'ports' => {
2784 
          'data_out' => {
2785 
            'attributes' => {
2786 
              'bin_pt' => 0,
2787 
              'is_floating_block' => 1,
2788 
              'must_be_hdl_vector' => 1,
2789 
              'period' => 1,
2790 
              'port_id' => 0,
2791 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25/data_out',
2792 
              'type' => 'UFix_1_0',
2793 
            },
2794 
            'direction' => 'out',
2795 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2796 
            'width' => 1,
2797 
          },
2798 
        },
2799 
      },
2800 
      'entityName' => 'x_x107',
2801 
    },
2802 
    'from_register26' => {
2803 
      'connections' => { 'data_out' => 'from_register26.data_out', },
2804 
      'entity' => {
2805 
        'attributes' => {
2806 
          'entityAlreadyNetlisted' => 1,
2807 
          'generics' => [],
2808 
          'is_floating_block' => 1,
2809 
          'mask' => {
2810 
            'Block_Handle' => 2414.00048828125,
2811 
            'Block_handle' => 2414.00048828125,
2812 
            'MDL_Handle' => 2083.00048828125,
2813 
            'MDL_handle' => 2083.00048828125,
2814 
            'arith_type' => 2,
2815 
            'bin_pt' => 0,
2816 
            'block_config' => 'sysgen_blockset:fromreg_config',
2817 
            'block_handle' => 2414.00048828125,
2818 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26',
2819 
            'block_type' => 'fromreg',
2820 
            'dbl_ovrd' => 0,
2821 
            'gui_display_data_type' => 1,
2822 
            'init' => 0,
2823 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2824 
            'mdl_handle' => 2083.00048828125,
2825 
            'model_handle' => 2083.00048828125,
2826 
            'n_bits' => 32,
2827 
            'ownership' => 2,
2828 
            'period' => '5e-009',
2829 
            'preci_type' => 1,
2830 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2831 
            'shared_memory_name' => 'register11td',
2832 
          },
2833 
          'needs_vhdl_wrapper' => 0,
2834 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26',
2835 
        },
2836 
        'entityName' => 'x_x108',
2837 
        'ports' => {
2838 
          'data_out' => {
2839 
            'attributes' => {
2840 
              'bin_pt' => 0,
2841 
              'is_floating_block' => 1,
2842 
              'must_be_hdl_vector' => 1,
2843 
              'period' => 1,
2844 
              'port_id' => 0,
2845 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26/data_out',
2846 
              'type' => 'UFix_32_0',
2847 
            },
2848 
            'direction' => 'out',
2849 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2850 
            'width' => 32,
2851 
          },
2852 
        },
2853 
      },
2854 
      'entityName' => 'x_x108',
2855 
    },
2856 
    'from_register27' => {
2857 
      'connections' => { 'data_out' => 'from_register27.data_out', },
2858 
      'entity' => {
2859 
        'attributes' => {
2860 
          'entityAlreadyNetlisted' => 1,
2861 
          'generics' => [],
2862 
          'is_floating_block' => 1,
2863 
          'mask' => {
2864 
            'Block_Handle' => 2415.00048828125,
2865 
            'Block_handle' => 2415.00048828125,
2866 
            'MDL_Handle' => 2083.00048828125,
2867 
            'MDL_handle' => 2083.00048828125,
2868 
            'arith_type' => 2,
2869 
            'bin_pt' => 0,
2870 
            'block_config' => 'sysgen_blockset:fromreg_config',
2871 
            'block_handle' => 2415.00048828125,
2872 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27',
2873 
            'block_type' => 'fromreg',
2874 
            'dbl_ovrd' => 0,
2875 
            'gui_display_data_type' => 1,
2876 
            'init' => 0,
2877 
            'init_bit_vector' => '\'b0',
2878 
            'mdl_handle' => 2083.00048828125,
2879 
            'model_handle' => 2083.00048828125,
2880 
            'n_bits' => 1,
2881 
            'ownership' => 2,
2882 
            'period' => '5e-009',
2883 
            'preci_type' => 1,
2884 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2885 
            'shared_memory_name' => 'register11tv',
2886 
          },
2887 
          'needs_vhdl_wrapper' => 0,
2888 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27',
2889 
        },
2890 
        'entityName' => 'x_x109',
2891 
        'ports' => {
2892 
          'data_out' => {
2893 
            'attributes' => {
2894 
              'bin_pt' => 0,
2895 
              'is_floating_block' => 1,
2896 
              'must_be_hdl_vector' => 1,
2897 
              'period' => 1,
2898 
              'port_id' => 0,
2899 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27/data_out',
2900 
              'type' => 'UFix_1_0',
2901 
            },
2902 
            'direction' => 'out',
2903 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2904 
            'width' => 1,
2905 
          },
2906 
        },
2907 
      },
2908 
      'entityName' => 'x_x109',
2909 
    },
2910 
    'from_register28' => {
2911 
      'connections' => { 'data_out' => 'from_register28.data_out', },
2912 
      'entity' => {
2913 
        'attributes' => {
2914 
          'entityAlreadyNetlisted' => 1,
2915 
          'generics' => [],
2916 
          'is_floating_block' => 1,
2917 
          'mask' => {
2918 
            'Block_Handle' => 2416.00048828125,
2919 
            'Block_handle' => 2416.00048828125,
2920 
            'MDL_Handle' => 2083.00048828125,
2921 
            'MDL_handle' => 2083.00048828125,
2922 
            'arith_type' => 2,
2923 
            'bin_pt' => 0,
2924 
            'block_config' => 'sysgen_blockset:fromreg_config',
2925 
            'block_handle' => 2416.00048828125,
2926 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28',
2927 
            'block_type' => 'fromreg',
2928 
            'dbl_ovrd' => 0,
2929 
            'gui_display_data_type' => 1,
2930 
            'init' => 0,
2931 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
2932 
            'mdl_handle' => 2083.00048828125,
2933 
            'model_handle' => 2083.00048828125,
2934 
            'n_bits' => 32,
2935 
            'ownership' => 2,
2936 
            'period' => '5e-009',
2937 
            'preci_type' => 1,
2938 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2939 
            'shared_memory_name' => 'register12td',
2940 
          },
2941 
          'needs_vhdl_wrapper' => 0,
2942 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28',
2943 
        },
2944 
        'entityName' => 'x_x110',
2945 
        'ports' => {
2946 
          'data_out' => {
2947 
            'attributes' => {
2948 
              'bin_pt' => 0,
2949 
              'is_floating_block' => 1,
2950 
              'must_be_hdl_vector' => 1,
2951 
              'period' => 1,
2952 
              'port_id' => 0,
2953 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28/data_out',
2954 
              'type' => 'UFix_32_0',
2955 
            },
2956 
            'direction' => 'out',
2957 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2958 
            'width' => 32,
2959 
          },
2960 
        },
2961 
      },
2962 
      'entityName' => 'x_x110',
2963 
    },
2964 
    'from_register29' => {
2965 
      'connections' => { 'data_out' => 'from_register29.data_out', },
2966 
      'entity' => {
2967 
        'attributes' => {
2968 
          'entityAlreadyNetlisted' => 1,
2969 
          'generics' => [],
2970 
          'is_floating_block' => 1,
2971 
          'mask' => {
2972 
            'Block_Handle' => 2417.00048828125,
2973 
            'Block_handle' => 2417.00048828125,
2974 
            'MDL_Handle' => 2083.00048828125,
2975 
            'MDL_handle' => 2083.00048828125,
2976 
            'arith_type' => 2,
2977 
            'bin_pt' => 0,
2978 
            'block_config' => 'sysgen_blockset:fromreg_config',
2979 
            'block_handle' => 2417.00048828125,
2980 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29',
2981 
            'block_type' => 'fromreg',
2982 
            'dbl_ovrd' => 0,
2983 
            'gui_display_data_type' => 1,
2984 
            'init' => 0,
2985 
            'init_bit_vector' => '\'b0',
2986 
            'mdl_handle' => 2083.00048828125,
2987 
            'model_handle' => 2083.00048828125,
2988 
            'n_bits' => 1,
2989 
            'ownership' => 2,
2990 
            'period' => '5e-009',
2991 
            'preci_type' => 1,
2992 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2993 
            'shared_memory_name' => 'register12tv',
2994 
          },
2995 
          'needs_vhdl_wrapper' => 0,
2996 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29',
2997 
        },
2998 
        'entityName' => 'x_x111',
2999 
        'ports' => {
3000 
          'data_out' => {
3001 
            'attributes' => {
3002 
              'bin_pt' => 0,
3003 
              'is_floating_block' => 1,
3004 
              'must_be_hdl_vector' => 1,
3005 
              'period' => 1,
3006 
              'port_id' => 0,
3007 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29/data_out',
3008 
              'type' => 'UFix_1_0',
3009 
            },
3010 
            'direction' => 'out',
3011 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3012 
            'width' => 1,
3013 
          },
3014 
        },
3015 
      },
3016 
      'entityName' => 'x_x111',
3017 
    },
3018 
    'from_register3' => {
3019 
      'connections' => { 'data_out' => 'from_register3.data_out', },
3020 
      'entity' => {
3021 
        'attributes' => {
3022 
          'entityAlreadyNetlisted' => 1,
3023 
          'generics' => [],
3024 
          'is_floating_block' => 1,
3025 
          'mask' => {
3026 
            'Block_Handle' => 2418.00048828125,
3027 
            'Block_handle' => 2418.00048828125,
3028 
            'MDL_Handle' => 2083.00048828125,
3029 
            'MDL_handle' => 2083.00048828125,
3030 
            'arith_type' => 2,
3031 
            'bin_pt' => 0,
3032 
            'block_config' => 'sysgen_blockset:fromreg_config',
3033 
            'block_handle' => 2418.00048828125,
3034 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3',
3035 
            'block_type' => 'fromreg',
3036 
            'dbl_ovrd' => 0,
3037 
            'gui_display_data_type' => 1,
3038 
            'init' => 0,
3039 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3040 
            'mdl_handle' => 2083.00048828125,
3041 
            'model_handle' => 2083.00048828125,
3042 
            'n_bits' => 32,
3043 
            'ownership' => 2,
3044 
            'period' => '5e-009',
3045 
            'preci_type' => 1,
3046 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3047 
            'shared_memory_name' => 'register01td',
3048 
          },
3049 
          'needs_vhdl_wrapper' => 0,
3050 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3',
3051 
        },
3052 
        'entityName' => 'x_x112',
3053 
        'ports' => {
3054 
          'data_out' => {
3055 
            'attributes' => {
3056 
              'bin_pt' => 0,
3057 
              'is_floating_block' => 1,
3058 
              'must_be_hdl_vector' => 1,
3059 
              'period' => 1,
3060 
              'port_id' => 0,
3061 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3/data_out',
3062 
              'type' => 'UFix_32_0',
3063 
            },
3064 
            'direction' => 'out',
3065 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3066 
            'width' => 32,
3067 
          },
3068 
        },
3069 
      },
3070 
      'entityName' => 'x_x112',
3071 
    },
3072 
    'from_register30' => {
3073 
      'connections' => { 'data_out' => 'from_register30.data_out', },
3074 
      'entity' => {
3075 
        'attributes' => {
3076 
          'entityAlreadyNetlisted' => 1,
3077 
          'generics' => [],
3078 
          'is_floating_block' => 1,
3079 
          'mask' => {
3080 
            'Block_Handle' => 2419.00048828125,
3081 
            'Block_handle' => 2419.00048828125,
3082 
            'MDL_Handle' => 2083.00048828125,
3083 
            'MDL_handle' => 2083.00048828125,
3084 
            'arith_type' => 2,
3085 
            'bin_pt' => 0,
3086 
            'block_config' => 'sysgen_blockset:fromreg_config',
3087 
            'block_handle' => 2419.00048828125,
3088 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30',
3089 
            'block_type' => 'fromreg',
3090 
            'dbl_ovrd' => 0,
3091 
            'gui_display_data_type' => 1,
3092 
            'init' => 0,
3093 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3094 
            'mdl_handle' => 2083.00048828125,
3095 
            'model_handle' => 2083.00048828125,
3096 
            'n_bits' => 32,
3097 
            'ownership' => 2,
3098 
            'period' => '5e-009',
3099 
            'preci_type' => 1,
3100 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3101 
            'shared_memory_name' => 'register13td',
3102 
          },
3103 
          'needs_vhdl_wrapper' => 0,
3104 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30',
3105 
        },
3106 
        'entityName' => 'x_x113',
3107 
        'ports' => {
3108 
          'data_out' => {
3109 
            'attributes' => {
3110 
              'bin_pt' => 0,
3111 
              'is_floating_block' => 1,
3112 
              'must_be_hdl_vector' => 1,
3113 
              'period' => 1,
3114 
              'port_id' => 0,
3115 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30/data_out',
3116 
              'type' => 'UFix_32_0',
3117 
            },
3118 
            'direction' => 'out',
3119 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3120 
            'width' => 32,
3121 
          },
3122 
        },
3123 
      },
3124 
      'entityName' => 'x_x113',
3125 
    },
3126 
    'from_register31' => {
3127 
      'connections' => { 'data_out' => 'from_register31.data_out', },
3128 
      'entity' => {
3129 
        'attributes' => {
3130 
          'entityAlreadyNetlisted' => 1,
3131 
          'generics' => [],
3132 
          'is_floating_block' => 1,
3133 
          'mask' => {
3134 
            'Block_Handle' => 2420.00048828125,
3135 
            'Block_handle' => 2420.00048828125,
3136 
            'MDL_Handle' => 2083.00048828125,
3137 
            'MDL_handle' => 2083.00048828125,
3138 
            'arith_type' => 2,
3139 
            'bin_pt' => 0,
3140 
            'block_config' => 'sysgen_blockset:fromreg_config',
3141 
            'block_handle' => 2420.00048828125,
3142 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31',
3143 
            'block_type' => 'fromreg',
3144 
            'dbl_ovrd' => 0,
3145 
            'gui_display_data_type' => 1,
3146 
            'init' => 0,
3147 
            'init_bit_vector' => '\'b0',
3148 
            'mdl_handle' => 2083.00048828125,
3149 
            'model_handle' => 2083.00048828125,
3150 
            'n_bits' => 1,
3151 
            'ownership' => 2,
3152 
            'period' => '5e-009',
3153 
            'preci_type' => 1,
3154 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3155 
            'shared_memory_name' => 'register13tv',
3156 
          },
3157 
          'needs_vhdl_wrapper' => 0,
3158 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31',
3159 
        },
3160 
        'entityName' => 'x_x114',
3161 
        'ports' => {
3162 
          'data_out' => {
3163 
            'attributes' => {
3164 
              'bin_pt' => 0,
3165 
              'is_floating_block' => 1,
3166 
              'must_be_hdl_vector' => 1,
3167 
              'period' => 1,
3168 
              'port_id' => 0,
3169 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31/data_out',
3170 
              'type' => 'UFix_1_0',
3171 
            },
3172 
            'direction' => 'out',
3173 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3174 
            'width' => 1,
3175 
          },
3176 
        },
3177 
      },
3178 
      'entityName' => 'x_x114',
3179 
    },
3180 
    'from_register32' => {
3181 
      'connections' => { 'data_out' => 'from_register32.data_out', },
3182 
      'entity' => {
3183 
        'attributes' => {
3184 
          'entityAlreadyNetlisted' => 1,
3185 
          'generics' => [],
3186 
          'is_floating_block' => 1,
3187 
          'mask' => {
3188 
            'Block_Handle' => 2421.00048828125,
3189 
            'Block_handle' => 2421.00048828125,
3190 
            'MDL_Handle' => 2083.00048828125,
3191 
            'MDL_handle' => 2083.00048828125,
3192 
            'arith_type' => 2,
3193 
            'bin_pt' => 0,
3194 
            'block_config' => 'sysgen_blockset:fromreg_config',
3195 
            'block_handle' => 2421.00048828125,
3196 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32',
3197 
            'block_type' => 'fromreg',
3198 
            'dbl_ovrd' => 0,
3199 
            'gui_display_data_type' => 1,
3200 
            'init' => 0,
3201 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3202 
            'mdl_handle' => 2083.00048828125,
3203 
            'model_handle' => 2083.00048828125,
3204 
            'n_bits' => 32,
3205 
            'ownership' => 2,
3206 
            'period' => '5e-009',
3207 
            'preci_type' => 1,
3208 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3209 
            'shared_memory_name' => 'register14td',
3210 
          },
3211 
          'needs_vhdl_wrapper' => 0,
3212 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32',
3213 
        },
3214 
        'entityName' => 'x_x115',
3215 
        'ports' => {
3216 
          'data_out' => {
3217 
            'attributes' => {
3218 
              'bin_pt' => 0,
3219 
              'is_floating_block' => 1,
3220 
              'must_be_hdl_vector' => 1,
3221 
              'period' => 1,
3222 
              'port_id' => 0,
3223 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32/data_out',
3224 
              'type' => 'UFix_32_0',
3225 
            },
3226 
            'direction' => 'out',
3227 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3228 
            'width' => 32,
3229 
          },
3230 
        },
3231 
      },
3232 
      'entityName' => 'x_x115',
3233 
    },
3234 
    'from_register33' => {
3235 
      'connections' => { 'data_out' => 'from_register33.data_out', },
3236 
      'entity' => {
3237 
        'attributes' => {
3238 
          'entityAlreadyNetlisted' => 1,
3239 
          'generics' => [],
3240 
          'is_floating_block' => 1,
3241 
          'mask' => {
3242 
            'Block_Handle' => 2422.00048828125,
3243 
            'Block_handle' => 2422.00048828125,
3244 
            'MDL_Handle' => 2083.00048828125,
3245 
            'MDL_handle' => 2083.00048828125,
3246 
            'arith_type' => 2,
3247 
            'bin_pt' => 0,
3248 
            'block_config' => 'sysgen_blockset:fromreg_config',
3249 
            'block_handle' => 2422.00048828125,
3250 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33',
3251 
            'block_type' => 'fromreg',
3252 
            'dbl_ovrd' => 0,
3253 
            'gui_display_data_type' => 1,
3254 
            'init' => 0,
3255 
            'init_bit_vector' => '\'b0',
3256 
            'mdl_handle' => 2083.00048828125,
3257 
            'model_handle' => 2083.00048828125,
3258 
            'n_bits' => 1,
3259 
            'ownership' => 2,
3260 
            'period' => '5e-009',
3261 
            'preci_type' => 1,
3262 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3263 
            'shared_memory_name' => 'register14tv',
3264 
          },
3265 
          'needs_vhdl_wrapper' => 0,
3266 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33',
3267 
        },
3268 
        'entityName' => 'x_x116',
3269 
        'ports' => {
3270 
          'data_out' => {
3271 
            'attributes' => {
3272 
              'bin_pt' => 0,
3273 
              'is_floating_block' => 1,
3274 
              'must_be_hdl_vector' => 1,
3275 
              'period' => 1,
3276 
              'port_id' => 0,
3277 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33/data_out',
3278 
              'type' => 'UFix_1_0',
3279 
            },
3280 
            'direction' => 'out',
3281 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3282 
            'width' => 1,
3283 
          },
3284 
        },
3285 
      },
3286 
      'entityName' => 'x_x116',
3287 
    },
3288 
    'from_register4' => {
3289 
      'connections' => { 'data_out' => 'from_register4.data_out', },
3290 
      'entity' => {
3291 
        'attributes' => {
3292 
          'entityAlreadyNetlisted' => 1,
3293 
          'generics' => [],
3294 
          'is_floating_block' => 1,
3295 
          'mask' => {
3296 
            'Block_Handle' => 2423.00048828125,
3297 
            'Block_handle' => 2423.00048828125,
3298 
            'MDL_Handle' => 2083.00048828125,
3299 
            'MDL_handle' => 2083.00048828125,
3300 
            'arith_type' => 2,
3301 
            'bin_pt' => 0,
3302 
            'block_config' => 'sysgen_blockset:fromreg_config',
3303 
            'block_handle' => 2423.00048828125,
3304 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4',
3305 
            'block_type' => 'fromreg',
3306 
            'dbl_ovrd' => 0,
3307 
            'gui_display_data_type' => 1,
3308 
            'init' => 0,
3309 
            'init_bit_vector' => '\'b0',
3310 
            'mdl_handle' => 2083.00048828125,
3311 
            'model_handle' => 2083.00048828125,
3312 
            'n_bits' => 1,
3313 
            'ownership' => 2,
3314 
            'period' => '5e-009',
3315 
            'preci_type' => 1,
3316 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3317 
            'shared_memory_name' => 'register01tv',
3318 
          },
3319 
          'needs_vhdl_wrapper' => 0,
3320 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4',
3321 
        },
3322 
        'entityName' => 'x_x117',
3323 
        'ports' => {
3324 
          'data_out' => {
3325 
            'attributes' => {
3326 
              'bin_pt' => 0,
3327 
              'is_floating_block' => 1,
3328 
              'must_be_hdl_vector' => 1,
3329 
              'period' => 1,
3330 
              'port_id' => 0,
3331 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4/data_out',
3332 
              'type' => 'UFix_1_0',
3333 
            },
3334 
            'direction' => 'out',
3335 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3336 
            'width' => 1,
3337 
          },
3338 
        },
3339 
      },
3340 
      'entityName' => 'x_x117',
3341 
    },
3342 
    'from_register5' => {
3343 
      'connections' => { 'data_out' => 'from_register5.data_out', },
3344 
      'entity' => {
3345 
        'attributes' => {
3346 
          'entityAlreadyNetlisted' => 1,
3347 
          'generics' => [],
3348 
          'is_floating_block' => 1,
3349 
          'mask' => {
3350 
            'Block_Handle' => 2424.00048828125,
3351 
            'Block_handle' => 2424.00048828125,
3352 
            'MDL_Handle' => 2083.00048828125,
3353 
            'MDL_handle' => 2083.00048828125,
3354 
            'arith_type' => 2,
3355 
            'bin_pt' => 0,
3356 
            'block_config' => 'sysgen_blockset:fromreg_config',
3357 
            'block_handle' => 2424.00048828125,
3358 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5',
3359 
            'block_type' => 'fromreg',
3360 
            'dbl_ovrd' => 0,
3361 
            'gui_display_data_type' => 1,
3362 
            'init' => 0,
3363 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3364 
            'mdl_handle' => 2083.00048828125,
3365 
            'model_handle' => 2083.00048828125,
3366 
            'n_bits' => 32,
3367 
            'ownership' => 2,
3368 
            'period' => '5e-009',
3369 
            'preci_type' => 1,
3370 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3371 
            'shared_memory_name' => 'register02td',
3372 
          },
3373 
          'needs_vhdl_wrapper' => 0,
3374 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5',
3375 
        },
3376 
        'entityName' => 'x_x118',
3377 
        'ports' => {
3378 
          'data_out' => {
3379 
            'attributes' => {
3380 
              'bin_pt' => 0,
3381 
              'is_floating_block' => 1,
3382 
              'must_be_hdl_vector' => 1,
3383 
              'period' => 1,
3384 
              'port_id' => 0,
3385 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5/data_out',
3386 
              'type' => 'UFix_32_0',
3387 
            },
3388 
            'direction' => 'out',
3389 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3390 
            'width' => 32,
3391 
          },
3392 
        },
3393 
      },
3394 
      'entityName' => 'x_x118',
3395 
    },
3396 
    'from_register6' => {
3397 
      'connections' => { 'data_out' => 'from_register6.data_out', },
3398 
      'entity' => {
3399 
        'attributes' => {
3400 
          'entityAlreadyNetlisted' => 1,
3401 
          'generics' => [],
3402 
          'is_floating_block' => 1,
3403 
          'mask' => {
3404 
            'Block_Handle' => 2425.00048828125,
3405 
            'Block_handle' => 2425.00048828125,
3406 
            'MDL_Handle' => 2083.00048828125,
3407 
            'MDL_handle' => 2083.00048828125,
3408 
            'arith_type' => 2,
3409 
            'bin_pt' => 0,
3410 
            'block_config' => 'sysgen_blockset:fromreg_config',
3411 
            'block_handle' => 2425.00048828125,
3412 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6',
3413 
            'block_type' => 'fromreg',
3414 
            'dbl_ovrd' => 0,
3415 
            'gui_display_data_type' => 1,
3416 
            'init' => 0,
3417 
            'init_bit_vector' => '\'b0',
3418 
            'mdl_handle' => 2083.00048828125,
3419 
            'model_handle' => 2083.00048828125,
3420 
            'n_bits' => 1,
3421 
            'ownership' => 2,
3422 
            'period' => '5e-009',
3423 
            'preci_type' => 1,
3424 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3425 
            'shared_memory_name' => 'register02tv',
3426 
          },
3427 
          'needs_vhdl_wrapper' => 0,
3428 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6',
3429 
        },
3430 
        'entityName' => 'x_x119',
3431 
        'ports' => {
3432 
          'data_out' => {
3433 
            'attributes' => {
3434 
              'bin_pt' => 0,
3435 
              'is_floating_block' => 1,
3436 
              'must_be_hdl_vector' => 1,
3437 
              'period' => 1,
3438 
              'port_id' => 0,
3439 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6/data_out',
3440 
              'type' => 'UFix_1_0',
3441 
            },
3442 
            'direction' => 'out',
3443 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3444 
            'width' => 1,
3445 
          },
3446 
        },
3447 
      },
3448 
      'entityName' => 'x_x119',
3449 
    },
3450 
    'from_register7' => {
3451 
      'connections' => { 'data_out' => 'from_register7.data_out', },
3452 
      'entity' => {
3453 
        'attributes' => {
3454 
          'entityAlreadyNetlisted' => 1,
3455 
          'generics' => [],
3456 
          'is_floating_block' => 1,
3457 
          'mask' => {
3458 
            'Block_Handle' => 2426.00048828125,
3459 
            'Block_handle' => 2426.00048828125,
3460 
            'MDL_Handle' => 2083.00048828125,
3461 
            'MDL_handle' => 2083.00048828125,
3462 
            'arith_type' => 2,
3463 
            'bin_pt' => 0,
3464 
            'block_config' => 'sysgen_blockset:fromreg_config',
3465 
            'block_handle' => 2426.00048828125,
3466 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7',
3467 
            'block_type' => 'fromreg',
3468 
            'dbl_ovrd' => 0,
3469 
            'gui_display_data_type' => 1,
3470 
            'init' => 0,
3471 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3472 
            'mdl_handle' => 2083.00048828125,
3473 
            'model_handle' => 2083.00048828125,
3474 
            'n_bits' => 32,
3475 
            'ownership' => 2,
3476 
            'period' => '5e-009',
3477 
            'preci_type' => 1,
3478 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3479 
            'shared_memory_name' => 'register03td',
3480 
          },
3481 
          'needs_vhdl_wrapper' => 0,
3482 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7',
3483 
        },
3484 
        'entityName' => 'x_x120',
3485 
        'ports' => {
3486 
          'data_out' => {
3487 
            'attributes' => {
3488 
              'bin_pt' => 0,
3489 
              'is_floating_block' => 1,
3490 
              'must_be_hdl_vector' => 1,
3491 
              'period' => 1,
3492 
              'port_id' => 0,
3493 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7/data_out',
3494 
              'type' => 'UFix_32_0',
3495 
            },
3496 
            'direction' => 'out',
3497 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3498 
            'width' => 32,
3499 
          },
3500 
        },
3501 
      },
3502 
      'entityName' => 'x_x120',
3503 
    },
3504 
    'from_register8' => {
3505 
      'connections' => { 'data_out' => 'from_register8.data_out', },
3506 
      'entity' => {
3507 
        'attributes' => {
3508 
          'entityAlreadyNetlisted' => 1,
3509 
          'generics' => [],
3510 
          'is_floating_block' => 1,
3511 
          'mask' => {
3512 
            'Block_Handle' => 2427.00048828125,
3513 
            'Block_handle' => 2427.00048828125,
3514 
            'MDL_Handle' => 2083.00048828125,
3515 
            'MDL_handle' => 2083.00048828125,
3516 
            'arith_type' => 2,
3517 
            'bin_pt' => 0,
3518 
            'block_config' => 'sysgen_blockset:fromreg_config',
3519 
            'block_handle' => 2427.00048828125,
3520 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8',
3521 
            'block_type' => 'fromreg',
3522 
            'dbl_ovrd' => 0,
3523 
            'gui_display_data_type' => 1,
3524 
            'init' => 0,
3525 
            'init_bit_vector' => '\'b0',
3526 
            'mdl_handle' => 2083.00048828125,
3527 
            'model_handle' => 2083.00048828125,
3528 
            'n_bits' => 1,
3529 
            'ownership' => 2,
3530 
            'period' => '5e-009',
3531 
            'preci_type' => 1,
3532 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3533 
            'shared_memory_name' => 'register03tv',
3534 
          },
3535 
          'needs_vhdl_wrapper' => 0,
3536 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8',
3537 
        },
3538 
        'entityName' => 'x_x121',
3539 
        'ports' => {
3540 
          'data_out' => {
3541 
            'attributes' => {
3542 
              'bin_pt' => 0,
3543 
              'is_floating_block' => 1,
3544 
              'must_be_hdl_vector' => 1,
3545 
              'period' => 1,
3546 
              'port_id' => 0,
3547 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8/data_out',
3548 
              'type' => 'UFix_1_0',
3549 
            },
3550 
            'direction' => 'out',
3551 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3552 
            'width' => 1,
3553 
          },
3554 
        },
3555 
      },
3556 
      'entityName' => 'x_x121',
3557 
    },
3558 
    'from_register9' => {
3559 
      'connections' => { 'data_out' => 'from_register9.data_out', },
3560 
      'entity' => {
3561 
        'attributes' => {
3562 
          'entityAlreadyNetlisted' => 1,
3563 
          'generics' => [],
3564 
          'is_floating_block' => 1,
3565 
          'mask' => {
3566 
            'Block_Handle' => 2428.00048828125,
3567 
            'Block_handle' => 2428.00048828125,
3568 
            'MDL_Handle' => 2083.00048828125,
3569 
            'MDL_handle' => 2083.00048828125,
3570 
            'arith_type' => 2,
3571 
            'bin_pt' => 0,
3572 
            'block_config' => 'sysgen_blockset:fromreg_config',
3573 
            'block_handle' => 2428.00048828125,
3574 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9',
3575 
            'block_type' => 'fromreg',
3576 
            'dbl_ovrd' => 0,
3577 
            'gui_display_data_type' => 1,
3578 
            'init' => 0,
3579 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
3580 
            'mdl_handle' => 2083.00048828125,
3581 
            'model_handle' => 2083.00048828125,
3582 
            'n_bits' => 32,
3583 
            'ownership' => 2,
3584 
            'period' => '5e-009',
3585 
            'preci_type' => 1,
3586 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3587 
            'shared_memory_name' => 'register04td',
3588 
          },
3589 
          'needs_vhdl_wrapper' => 0,
3590 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9',
3591 
        },
3592 
        'entityName' => 'x_x122',
3593 
        'ports' => {
3594 
          'data_out' => {
3595 
            'attributes' => {
3596 
              'bin_pt' => 0,
3597 
              'is_floating_block' => 1,
3598 
              'must_be_hdl_vector' => 1,
3599 
              'period' => 1,
3600 
              'port_id' => 0,
3601 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9/data_out',
3602 
              'type' => 'UFix_32_0',
3603 
            },
3604 
            'direction' => 'out',
3605 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3606 
            'width' => 32,
3607 
          },
3608 
        },
3609 
      },
3610 
      'entityName' => 'x_x122',
3611 
    },
3612 
    'rst_i' => {
3613 
      'connections' => { 'rst_i' => '.rst_i', },
3614 
      'entity' => {
3615 
        'attributes' => {
3616 
          'entityAlreadyNetlisted' => 1,
3617 
          'isGateway' => 1,
3618 
          'is_floating_block' => 1,
3619 
        },
3620 
        'entityName' => 'rst_i',
3621 
        'ports' => {
3622 
          'rst_i' => {
3623 
            'attributes' => {
3624 
              'bin_pt' => 0,
3625 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
3626 
              'is_floating_block' => 1,
3627 
              'is_gateway_port' => 1,
3628 
              'must_be_hdl_vector' => 1,
3629 
              'period' => 1,
3630 
              'port_id' => 0,
3631 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i/rst_i',
3632 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i',
3633 
              'timingConstraint' => 'none',
3634 
              'type' => 'Bool',
3635 
            },
3636 
            'direction' => 'out',
3637 
            'hdlType' => 'std_logic',
3638 
            'width' => 1,
3639 
          },
3640 
        },
3641 
      },
3642 
      'entityName' => 'rst_i',
3643 
    },
3644 
    'rst_o' => {
3645 
      'connections' => { 'rst_o' => 'sysgen_dut.rst_o', },
3646 
      'entity' => {
3647 
        'attributes' => {
3648 
          'entityAlreadyNetlisted' => 1,
3649 
          'isGateway' => 1,
3650 
          'is_floating_block' => 1,
3651 
        },
3652 
        'entityName' => 'rst_o',
3653 
        'ports' => {
3654 
          'rst_o' => {
3655 
            'attributes' => {
3656 
              'bin_pt' => 0,
3657 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
3658 
              'is_floating_block' => 1,
3659 
              'is_gateway_port' => 1,
3660 
              'must_be_hdl_vector' => 1,
3661 
              'period' => 1,
3662 
              'port_id' => 0,
3663 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o/rst_o',
3664 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o',
3665 
              'timingConstraint' => 'none',
3666 
              'type' => 'Bool',
3667 
            },
3668 
            'direction' => 'in',
3669 
            'hdlType' => 'std_logic',
3670 
            'width' => 1,
3671 
          },
3672 
        },
3673 
      },
3674 
      'entityName' => 'rst_o',
3675 
    },
3676 
    'sysgen_dut' => {
3677 
      'connections' => {
3678 
        'bram_rd_addr' => 'sysgen_dut.bram_rd_addr',
3679 
        'bram_rd_dout' => '.bram_rd_dout',
3680 
        'bram_wr_addr' => 'sysgen_dut.bram_wr_addr',
3681 
        'bram_wr_din' => 'sysgen_dut.bram_wr_din',
3682 
        'bram_wr_en' => 'sysgen_dut.bram_wr_en',
3683 
        'clk' => '.clk',
3684 
        'fifo_rd_count' => '.fifo_rd_count',
3685 
        'fifo_rd_dout' => '.fifo_rd_dout',
3686 
        'fifo_rd_empty' => '.fifo_rd_empty',
3687 
        'fifo_rd_en' => 'sysgen_dut.fifo_rd_en',
3688 
        'fifo_rd_pempty' => '.fifo_rd_pempty',
3689 
        'fifo_rd_valid' => '.fifo_rd_valid',
3690 
        'fifo_wr_count' => '.fifo_wr_count',
3691 
        'fifo_wr_din' => 'sysgen_dut.fifo_wr_din',
3692 
        'fifo_wr_en' => 'sysgen_dut.fifo_wr_en',
3693 
        'fifo_wr_full' => '.fifo_wr_full',
3694 
        'fifo_wr_pfull' => '.fifo_wr_pfull',
3695 
        'from_register10_data_out' => 'from_register10.data_out',
3696 
        'from_register11_data_out' => 'from_register11.data_out',
3697 
        'from_register12_data_out' => 'from_register12.data_out',
3698 
        'from_register13_data_out' => 'from_register13.data_out',
3699 
        'from_register14_data_out' => 'from_register14.data_out',
3700 
        'from_register15_data_out' => 'from_register15.data_out',
3701 
        'from_register16_data_out' => 'from_register16.data_out',
3702 
        'from_register17_data_out' => 'from_register17.data_out',
3703 
        'from_register18_data_out' => 'from_register18.data_out',
3704 
        'from_register19_data_out' => 'from_register19.data_out',
3705 
        'from_register1_data_out' => 'from_register1.data_out',
3706 
        'from_register20_data_out' => 'from_register20.data_out',
3707 
        'from_register21_data_out' => 'from_register21.data_out',
3708 
        'from_register22_data_out' => 'from_register22.data_out',
3709 
        'from_register23_data_out' => 'from_register23.data_out',
3710 
        'from_register24_data_out' => 'from_register24.data_out',
3711 
        'from_register25_data_out' => 'from_register25.data_out',
3712 
        'from_register26_data_out' => 'from_register26.data_out',
3713 
        'from_register27_data_out' => 'from_register27.data_out',
3714 
        'from_register28_data_out' => 'from_register28.data_out',
3715 
        'from_register29_data_out' => 'from_register29.data_out',
3716 
        'from_register2_data_out' => 'from_register2.data_out',
3717 
        'from_register30_data_out' => 'from_register30.data_out',
3718 
        'from_register31_data_out' => 'from_register31.data_out',
3719 
        'from_register32_data_out' => 'from_register32.data_out',
3720 
        'from_register33_data_out' => 'from_register33.data_out',
3721 
        'from_register3_data_out' => 'from_register3.data_out',
3722 
        'from_register4_data_out' => 'from_register4.data_out',
3723 
        'from_register5_data_out' => 'from_register5.data_out',
3724 
        'from_register6_data_out' => 'from_register6.data_out',
3725 
        'from_register7_data_out' => 'from_register7.data_out',
3726 
        'from_register8_data_out' => 'from_register8.data_out',
3727 
        'from_register9_data_out' => 'from_register9.data_out',
3728 
        'from_register_data_out' => 'from_register.data_out',
3729 
        'rst_i' => '.rst_i',
3730 
        'rst_o' => 'sysgen_dut.rst_o',
3731 
        'to_register10_ce' => 'sysgen_dut.to_register10_ce',
3732 
        'to_register10_clk' => 'sysgen_dut.to_register10_clk',
3733 
        'to_register10_clr' => 'sysgen_dut.to_register10_clr',
3734 
        'to_register10_data_in' => 'sysgen_dut.to_register10_data_in',
3735 
        'to_register10_dout' => 'to_register10.dout',
3736 
        'to_register10_en' => 'sysgen_dut.to_register10_en',
3737 
        'to_register11_ce' => 'sysgen_dut.to_register11_ce',
3738 
        'to_register11_clk' => 'sysgen_dut.to_register11_clk',
3739 
        'to_register11_clr' => 'sysgen_dut.to_register11_clr',
3740 
        'to_register11_data_in' => 'sysgen_dut.to_register11_data_in',
3741 
        'to_register11_dout' => 'to_register11.dout',
3742 
        'to_register11_en' => 'sysgen_dut.to_register11_en',
3743 
        'to_register12_ce' => 'sysgen_dut.to_register12_ce',
3744 
        'to_register12_clk' => 'sysgen_dut.to_register12_clk',
3745 
        'to_register12_clr' => 'sysgen_dut.to_register12_clr',
3746 
        'to_register12_data_in' => 'sysgen_dut.to_register12_data_in',
3747 
        'to_register12_dout' => 'to_register12.dout',
3748 
        'to_register12_en' => 'sysgen_dut.to_register12_en',
3749 
        'to_register13_ce' => 'sysgen_dut.to_register13_ce',
3750 
        'to_register13_clk' => 'sysgen_dut.to_register13_clk',
3751 
        'to_register13_clr' => 'sysgen_dut.to_register13_clr',
3752 
        'to_register13_data_in' => 'sysgen_dut.to_register13_data_in',
3753 
        'to_register13_dout' => 'to_register13.dout',
3754 
        'to_register13_en' => 'sysgen_dut.to_register13_en',
3755 
        'to_register14_ce' => 'sysgen_dut.to_register14_ce',
3756 
        'to_register14_clk' => 'sysgen_dut.to_register14_clk',
3757 
        'to_register14_clr' => 'sysgen_dut.to_register14_clr',
3758 
        'to_register14_data_in' => 'sysgen_dut.to_register14_data_in',
3759 
        'to_register14_dout' => 'to_register14.dout',
3760 
        'to_register14_en' => 'sysgen_dut.to_register14_en',
3761 
        'to_register15_ce' => 'sysgen_dut.to_register15_ce',
3762 
        'to_register15_clk' => 'sysgen_dut.to_register15_clk',
3763 
        'to_register15_clr' => 'sysgen_dut.to_register15_clr',
3764 
        'to_register15_data_in' => 'sysgen_dut.to_register15_data_in',
3765 
        'to_register15_dout' => 'to_register15.dout',
3766 
        'to_register15_en' => 'sysgen_dut.to_register15_en',
3767 
        'to_register16_ce' => 'sysgen_dut.to_register16_ce',
3768 
        'to_register16_clk' => 'sysgen_dut.to_register16_clk',
3769 
        'to_register16_clr' => 'sysgen_dut.to_register16_clr',
3770 
        'to_register16_data_in' => 'sysgen_dut.to_register16_data_in',
3771 
        'to_register16_dout' => 'to_register16.dout',
3772 
        'to_register16_en' => 'sysgen_dut.to_register16_en',
3773 
        'to_register17_ce' => 'sysgen_dut.to_register17_ce',
3774 
        'to_register17_clk' => 'sysgen_dut.to_register17_clk',
3775 
        'to_register17_clr' => 'sysgen_dut.to_register17_clr',
3776 
        'to_register17_data_in' => 'sysgen_dut.to_register17_data_in',
3777 
        'to_register17_dout' => 'to_register17.dout',
3778 
        'to_register17_en' => 'sysgen_dut.to_register17_en',
3779 
        'to_register18_ce' => 'sysgen_dut.to_register18_ce',
3780 
        'to_register18_clk' => 'sysgen_dut.to_register18_clk',
3781 
        'to_register18_clr' => 'sysgen_dut.to_register18_clr',
3782 
        'to_register18_data_in' => 'sysgen_dut.to_register18_data_in',
3783 
        'to_register18_dout' => 'to_register18.dout',
3784 
        'to_register18_en' => 'sysgen_dut.to_register18_en',
3785 
        'to_register19_ce' => 'sysgen_dut.to_register19_ce',
3786 
        'to_register19_clk' => 'sysgen_dut.to_register19_clk',
3787 
        'to_register19_clr' => 'sysgen_dut.to_register19_clr',
3788 
        'to_register19_data_in' => 'sysgen_dut.to_register19_data_in',
3789 
        'to_register19_dout' => 'to_register19.dout',
3790 
        'to_register19_en' => 'sysgen_dut.to_register19_en',
3791 
        'to_register1_ce' => 'sysgen_dut.to_register1_ce',
3792 
        'to_register1_clk' => 'sysgen_dut.to_register1_clk',
3793 
        'to_register1_clr' => 'sysgen_dut.to_register1_clr',
3794 
        'to_register1_data_in' => 'sysgen_dut.to_register1_data_in',
3795 
        'to_register1_dout' => 'to_register1.dout',
3796 
        'to_register1_en' => 'sysgen_dut.to_register1_en',
3797 
        'to_register20_ce' => 'sysgen_dut.to_register20_ce',
3798 
        'to_register20_clk' => 'sysgen_dut.to_register20_clk',
3799 
        'to_register20_clr' => 'sysgen_dut.to_register20_clr',
3800 
        'to_register20_data_in' => 'sysgen_dut.to_register20_data_in',
3801 
        'to_register20_dout' => 'to_register20.dout',
3802 
        'to_register20_en' => 'sysgen_dut.to_register20_en',
3803 
        'to_register21_ce' => 'sysgen_dut.to_register21_ce',
3804 
        'to_register21_clk' => 'sysgen_dut.to_register21_clk',
3805 
        'to_register21_clr' => 'sysgen_dut.to_register21_clr',
3806 
        'to_register21_data_in' => 'sysgen_dut.to_register21_data_in',
3807 
        'to_register21_dout' => 'to_register21.dout',
3808 
        'to_register21_en' => 'sysgen_dut.to_register21_en',
3809 
        'to_register22_ce' => 'sysgen_dut.to_register22_ce',
3810 
        'to_register22_clk' => 'sysgen_dut.to_register22_clk',
3811 
        'to_register22_clr' => 'sysgen_dut.to_register22_clr',
3812 
        'to_register22_data_in' => 'sysgen_dut.to_register22_data_in',
3813 
        'to_register22_dout' => 'to_register22.dout',
3814 
        'to_register22_en' => 'sysgen_dut.to_register22_en',
3815 
        'to_register23_ce' => 'sysgen_dut.to_register23_ce',
3816 
        'to_register23_clk' => 'sysgen_dut.to_register23_clk',
3817 
        'to_register23_clr' => 'sysgen_dut.to_register23_clr',
3818 
        'to_register23_data_in' => 'sysgen_dut.to_register23_data_in',
3819 
        'to_register23_dout' => 'to_register23.dout',
3820 
        'to_register23_en' => 'sysgen_dut.to_register23_en',
3821 
        'to_register24_ce' => 'sysgen_dut.to_register24_ce',
3822 
        'to_register24_clk' => 'sysgen_dut.to_register24_clk',
3823 
        'to_register24_clr' => 'sysgen_dut.to_register24_clr',
3824 
        'to_register24_data_in' => 'sysgen_dut.to_register24_data_in',
3825 
        'to_register24_dout' => 'to_register24.dout',
3826 
        'to_register24_en' => 'sysgen_dut.to_register24_en',
3827 
        'to_register25_ce' => 'sysgen_dut.to_register25_ce',
3828 
        'to_register25_clk' => 'sysgen_dut.to_register25_clk',
3829 
        'to_register25_clr' => 'sysgen_dut.to_register25_clr',
3830 
        'to_register25_data_in' => 'sysgen_dut.to_register25_data_in',
3831 
        'to_register25_dout' => 'to_register25.dout',
3832 
        'to_register25_en' => 'sysgen_dut.to_register25_en',
3833 
        'to_register26_ce' => 'sysgen_dut.to_register26_ce',
3834 
        'to_register26_clk' => 'sysgen_dut.to_register26_clk',
3835 
        'to_register26_clr' => 'sysgen_dut.to_register26_clr',
3836 
        'to_register26_data_in' => 'sysgen_dut.to_register26_data_in',
3837 
        'to_register26_dout' => 'to_register26.dout',
3838 
        'to_register26_en' => 'sysgen_dut.to_register26_en',
3839 
        'to_register27_ce' => 'sysgen_dut.to_register27_ce',
3840 
        'to_register27_clk' => 'sysgen_dut.to_register27_clk',
3841 
        'to_register27_clr' => 'sysgen_dut.to_register27_clr',
3842 
        'to_register27_data_in' => 'sysgen_dut.to_register27_data_in',
3843 
        'to_register27_dout' => 'to_register27.dout',
3844 
        'to_register27_en' => 'sysgen_dut.to_register27_en',
3845 
        'to_register2_ce' => 'sysgen_dut.to_register2_ce',
3846 
        'to_register2_clk' => 'sysgen_dut.to_register2_clk',
3847 
        'to_register2_clr' => 'sysgen_dut.to_register2_clr',
3848 
        'to_register2_data_in' => 'sysgen_dut.to_register2_data_in',
3849 
        'to_register2_dout' => 'to_register2.dout',
3850 
        'to_register2_en' => 'sysgen_dut.to_register2_en',
3851 
        'to_register3_ce' => 'sysgen_dut.to_register3_ce',
3852 
        'to_register3_clk' => 'sysgen_dut.to_register3_clk',
3853 
        'to_register3_clr' => 'sysgen_dut.to_register3_clr',
3854 
        'to_register3_data_in' => 'sysgen_dut.to_register3_data_in',
3855 
        'to_register3_dout' => 'to_register3.dout',
3856 
        'to_register3_en' => 'sysgen_dut.to_register3_en',
3857 
        'to_register4_ce' => 'sysgen_dut.to_register4_ce',
3858 
        'to_register4_clk' => 'sysgen_dut.to_register4_clk',
3859 
        'to_register4_clr' => 'sysgen_dut.to_register4_clr',
3860 
        'to_register4_data_in' => 'sysgen_dut.to_register4_data_in',
3861 
        'to_register4_dout' => 'to_register4.dout',
3862 
        'to_register4_en' => 'sysgen_dut.to_register4_en',
3863 
        'to_register5_ce' => 'sysgen_dut.to_register5_ce',
3864 
        'to_register5_clk' => 'sysgen_dut.to_register5_clk',
3865 
        'to_register5_clr' => 'sysgen_dut.to_register5_clr',
3866 
        'to_register5_data_in' => 'sysgen_dut.to_register5_data_in',
3867 
        'to_register5_dout' => 'to_register5.dout',
3868 
        'to_register5_en' => 'sysgen_dut.to_register5_en',
3869 
        'to_register6_ce' => 'sysgen_dut.to_register6_ce',
3870 
        'to_register6_clk' => 'sysgen_dut.to_register6_clk',
3871 
        'to_register6_clr' => 'sysgen_dut.to_register6_clr',
3872 
        'to_register6_data_in' => 'sysgen_dut.to_register6_data_in',
3873 
        'to_register6_dout' => 'to_register6.dout',
3874 
        'to_register6_en' => 'sysgen_dut.to_register6_en',
3875 
        'to_register7_ce' => 'sysgen_dut.to_register7_ce',
3876 
        'to_register7_clk' => 'sysgen_dut.to_register7_clk',
3877 
        'to_register7_clr' => 'sysgen_dut.to_register7_clr',
3878 
        'to_register7_data_in' => 'sysgen_dut.to_register7_data_in',
3879 
        'to_register7_dout' => 'to_register7.dout',
3880 
        'to_register7_en' => 'sysgen_dut.to_register7_en',
3881 
        'to_register8_ce' => 'sysgen_dut.to_register8_ce',
3882 
        'to_register8_clk' => 'sysgen_dut.to_register8_clk',
3883 
        'to_register8_clr' => 'sysgen_dut.to_register8_clr',
3884 
        'to_register8_data_in' => 'sysgen_dut.to_register8_data_in',
3885 
        'to_register8_dout' => 'to_register8.dout',
3886 
        'to_register8_en' => 'sysgen_dut.to_register8_en',
3887 
        'to_register9_ce' => 'sysgen_dut.to_register9_ce',
3888 
        'to_register9_clk' => 'sysgen_dut.to_register9_clk',
3889 
        'to_register9_clr' => 'sysgen_dut.to_register9_clr',
3890 
        'to_register9_data_in' => 'sysgen_dut.to_register9_data_in',
3891 
        'to_register9_dout' => 'to_register9.dout',
3892 
        'to_register9_en' => 'sysgen_dut.to_register9_en',
3893 
        'to_register_ce' => 'sysgen_dut.to_register_ce',
3894 
        'to_register_clk' => 'sysgen_dut.to_register_clk',
3895 
        'to_register_clr' => 'sysgen_dut.to_register_clr',
3896 
        'to_register_data_in' => 'sysgen_dut.to_register_data_in',
3897 
        'to_register_dout' => 'to_register.dout',
3898 
        'to_register_en' => 'sysgen_dut.to_register_en',
3899 
        'user_int_1o' => 'sysgen_dut.user_int_1o',
3900 
        'user_int_2o' => 'sysgen_dut.user_int_2o',
3901 
        'user_int_3o' => 'sysgen_dut.user_int_3o',
3902 
      },
3903 
      'entity' => {
3904 
        'attributes' => {
3905 
          'entityAlreadyNetlisted' => 1,
3906 
          'hdlArchAttributes' => [],
3907 
          'hdlEntityAttributes' => [],
3908 
          'isClkWrapper' => 1,
3909 
        },
3910 
        'connections' => {
3911 
          'bram_rd_addr' => 'bram_rd_addr_net',
3912 
          'bram_rd_dout' => 'bram_rd_dout_net',
3913 
          'bram_wr_addr' => 'bram_wr_addr_net',
3914 
          'bram_wr_din' => 'bram_wr_din_net',
3915 
          'bram_wr_en' => 'bram_wr_en_net',
3916 
          'clk' => 'clkNet',
3917 
          'fifo_rd_count' => 'fifo_rd_count_net',
3918 
          'fifo_rd_dout' => 'fifo_rd_dout_net',
3919 
          'fifo_rd_empty' => 'fifo_rd_empty_net',
3920 
          'fifo_rd_en' => 'fifo_rd_en_net',
3921 
          'fifo_rd_pempty' => 'fifo_rd_pempty_net',
3922 
          'fifo_rd_valid' => 'fifo_rd_valid_net',
3923 
          'fifo_wr_count' => 'fifo_wr_count_net',
3924 
          'fifo_wr_din' => 'fifo_wr_din_net',
3925 
          'fifo_wr_en' => 'fifo_wr_en_net',
3926 
          'fifo_wr_full' => 'fifo_wr_full_net',
3927 
          'fifo_wr_pfull' => 'fifo_wr_pfull_net',
3928 
          'from_register10_data_out' => 'data_out_x1_net',
3929 
          'from_register11_data_out' => 'data_out_x2_net',
3930 
          'from_register12_data_out' => 'data_out_x3_net',
3931 
          'from_register13_data_out' => 'data_out_x4_net',
3932 
          'from_register14_data_out' => 'data_out_x5_net',
3933 
          'from_register15_data_out' => 'from_register15_data_out_net',
3934 
          'from_register16_data_out' => 'from_register16_data_out_net',
3935 
          'from_register17_data_out' => 'data_out_x8_net',
3936 
          'from_register18_data_out' => 'data_out_x9_net',
3937 
          'from_register19_data_out' => 'from_register19_data_out_net',
3938 
          'from_register1_data_out' => 'from_register1_data_out_net',
3939 
          'from_register20_data_out' => 'data_out_x12_net',
3940 
          'from_register21_data_out' => 'data_out_x13_net',
3941 
          'from_register22_data_out' => 'data_out_x14_net',
3942 
          'from_register23_data_out' => 'data_out_x15_net',
3943 
          'from_register24_data_out' => 'data_out_x16_net',
3944 
          'from_register25_data_out' => 'data_out_x17_net',
3945 
          'from_register26_data_out' => 'data_out_x18_net',
3946 
          'from_register27_data_out' => 'data_out_x19_net',
3947 
          'from_register28_data_out' => 'data_out_x20_net',
3948 
          'from_register29_data_out' => 'data_out_x21_net',
3949 
          'from_register2_data_out' => 'from_register2_data_out_net',
3950 
          'from_register30_data_out' => 'data_out_x23_net',
3951 
          'from_register31_data_out' => 'data_out_x24_net',
3952 
          'from_register32_data_out' => 'data_out_x25_net',
3953 
          'from_register33_data_out' => 'data_out_x26_net',
3954 
          'from_register3_data_out' => 'data_out_x22_net',
3955 
          'from_register4_data_out' => 'data_out_x27_net',
3956 
          'from_register5_data_out' => 'data_out_x28_net',
3957 
          'from_register6_data_out' => 'data_out_x29_net',
3958 
          'from_register7_data_out' => 'data_out_x30_net',
3959 
          'from_register8_data_out' => 'data_out_x31_net',
3960 
          'from_register9_data_out' => 'data_out_x32_net',
3961 
          'from_register_data_out' => 'from_register_data_out_net',
3962 
          'rst_i' => 'rst_i_net',
3963 
          'rst_o' => 'rst_o_net',
3964 
          'to_register10_ce' => 'ce_1_sg_x0',
3965 
          'to_register10_clk' => 'clk_1_sg_x0',
3966 
          'to_register10_clr' => [
3967 
            'constant',
3968 
            '\'0\'',
3969 
          ],
3970 
          'to_register10_data_in' => 'data_in_x1_net',
3971 
          'to_register10_dout' => 'to_register10_dout_net',
3972 
          'to_register10_en' => 'constant6_op_net_x2',
3973 
          'to_register11_ce' => 'ce_1_sg_x0',
3974 
          'to_register11_clk' => 'clk_1_sg_x0',
3975 
          'to_register11_clr' => [
3976 
            'constant',
3977 
            '\'0\'',
3978 
          ],
3979 
          'to_register11_data_in' => 'data_in_x2_net',
3980 
          'to_register11_dout' => 'to_register11_dout_net',
3981 
          'to_register11_en' => 'constant6_op_net_x3',
3982 
          'to_register12_ce' => 'ce_1_sg_x0',
3983 
          'to_register12_clk' => 'clk_1_sg_x0',
3984 
          'to_register12_clr' => [
3985 
            'constant',
3986 
            '\'0\'',
3987 
          ],
3988 
          'to_register12_data_in' => 'data_in_x3_net',
3989 
          'to_register12_dout' => 'to_register12_dout_net',
3990 
          'to_register12_en' => 'constant6_op_net_x4',
3991 
          'to_register13_ce' => 'ce_1_sg_x0',
3992 
          'to_register13_clk' => 'clk_1_sg_x0',
3993 
          'to_register13_clr' => [
3994 
            'constant',
3995 
            '\'0\'',
3996 
          ],
3997 
          'to_register13_data_in' => 'data_in_x4_net',
3998 
          'to_register13_dout' => 'to_register13_dout_net',
3999 
          'to_register13_en' => 'constant6_op_net_x5',
4000 
          'to_register14_ce' => 'ce_1_sg_x0',
4001 
          'to_register14_clk' => 'clk_1_sg_x0',
4002 
          'to_register14_clr' => [
4003 
            'constant',
4004 
            '\'0\'',
4005 
          ],
4006 
          'to_register14_data_in' => 'data_in_x5_net',
4007 
          'to_register14_dout' => 'to_register14_dout_net',
4008 
          'to_register14_en' => 'constant6_op_net_x6',
4009 
          'to_register15_ce' => 'ce_1_sg_x0',
4010 
          'to_register15_clk' => 'clk_1_sg_x0',
4011 
          'to_register15_clr' => [
4012 
            'constant',
4013 
            '\'0\'',
4014 
          ],
4015 
          'to_register15_data_in' => 'data_in_x6_net',
4016 
          'to_register15_dout' => 'to_register15_dout_net',
4017 
          'to_register15_en' => 'constant6_op_net_x7',
4018 
          'to_register16_ce' => 'ce_1_sg_x0',
4019 
          'to_register16_clk' => 'clk_1_sg_x0',
4020 
          'to_register16_clr' => [
4021 
            'constant',
4022 
            '\'0\'',
4023 
          ],
4024 
          'to_register16_data_in' => 'data_in_x7_net',
4025 
          'to_register16_dout' => 'to_register16_dout_net',
4026 
          'to_register16_en' => 'constant6_op_net_x8',
4027 
          'to_register17_ce' => 'ce_1_sg_x0',
4028 
          'to_register17_clk' => 'clk_1_sg_x0',
4029 
          'to_register17_clr' => [
4030 
            'constant',
4031 
            '\'0\'',
4032 
          ],
4033 
          'to_register17_data_in' => 'data_in_x8_net',
4034 
          'to_register17_dout' => 'to_register17_dout_net',
4035 
          'to_register17_en' => 'constant6_op_net_x9',
4036 
          'to_register18_ce' => 'ce_1_sg_x0',
4037 
          'to_register18_clk' => 'clk_1_sg_x0',
4038 
          'to_register18_clr' => [
4039 
            'constant',
4040 
            '\'0\'',
4041 
          ],
4042 
          'to_register18_data_in' => 'data_in_x9_net',
4043 
          'to_register18_dout' => 'to_register18_dout_net',
4044 
          'to_register18_en' => 'constant6_op_net_x10',
4045 
          'to_register19_ce' => 'ce_1_sg_x0',
4046 
          'to_register19_clk' => 'clk_1_sg_x0',
4047 
          'to_register19_clr' => [
4048 
            'constant',
4049 
            '\'0\'',
4050 
          ],
4051 
          'to_register19_data_in' => 'data_in_x10_net',
4052 
          'to_register19_dout' => 'to_register19_dout_net',
4053 
          'to_register19_en' => 'constant6_op_net_x11',
4054 
          'to_register1_ce' => 'ce_1_sg_x0',
4055 
          'to_register1_clk' => 'clk_1_sg_x0',
4056 
          'to_register1_clr' => [
4057 
            'constant',
4058 
            '\'0\'',
4059 
          ],
4060 
          'to_register1_data_in' => 'data_in_x0_net',
4061 
          'to_register1_dout' => 'to_register1_dout_net',
4062 
          'to_register1_en' => 'constant6_op_net_x1',
4063 
          'to_register20_ce' => 'ce_1_sg_x0',
4064 
          'to_register20_clk' => 'clk_1_sg_x0',
4065 
          'to_register20_clr' => [
4066 
            'constant',
4067 
            '\'0\'',
4068 
          ],
4069 
          'to_register20_data_in' => 'data_in_x12_net',
4070 
          'to_register20_dout' => 'to_register20_dout_net',
4071 
          'to_register20_en' => 'constant6_op_net_x13',
4072 
          'to_register21_ce' => 'ce_1_sg_x0',
4073 
          'to_register21_clk' => 'clk_1_sg_x0',
4074 
          'to_register21_clr' => [
4075 
            'constant',
4076 
            '\'0\'',
4077 
          ],
4078 
          'to_register21_data_in' => 'data_in_x13_net',
4079 
          'to_register21_dout' => 'to_register21_dout_net',
4080 
          'to_register21_en' => 'constant6_op_net_x14',
4081 
          'to_register22_ce' => 'ce_1_sg_x0',
4082 
          'to_register22_clk' => 'clk_1_sg_x0',
4083 
          'to_register22_clr' => [
4084 
            'constant',
4085 
            '\'0\'',
4086 
          ],
4087 
          'to_register22_data_in' => 'data_in_x14_net',
4088 
          'to_register22_dout' => 'to_register22_dout_net',
4089 
          'to_register22_en' => 'constant6_op_net_x15',
4090 
          'to_register23_ce' => 'ce_1_sg_x0',
4091 
          'to_register23_clk' => 'clk_1_sg_x0',
4092 
          'to_register23_clr' => [
4093 
            'constant',
4094 
            '\'0\'',
4095 
          ],
4096 
          'to_register23_data_in' => 'data_in_x15_net',
4097 
          'to_register23_dout' => 'to_register23_dout_net',
4098 
          'to_register23_en' => 'constant6_op_net_x16',
4099 
          'to_register24_ce' => 'ce_1_sg_x0',
4100 
          'to_register24_clk' => 'clk_1_sg_x0',
4101 
          'to_register24_clr' => [
4102 
            'constant',
4103 
            '\'0\'',
4104 
          ],
4105 
          'to_register24_data_in' => 'data_in_x16_net',
4106 
          'to_register24_dout' => 'to_register24_dout_net',
4107 
          'to_register24_en' => 'constant6_op_net_x17',
4108 
          'to_register25_ce' => 'ce_1_sg_x0',
4109 
          'to_register25_clk' => 'clk_1_sg_x0',
4110 
          'to_register25_clr' => [
4111 
            'constant',
4112 
            '\'0\'',
4113 
          ],
4114 
          'to_register25_data_in' => 'data_in_x17_net',
4115 
          'to_register25_dout' => 'to_register25_dout_net',
4116 
          'to_register25_en' => 'constant6_op_net_x18',
4117 
          'to_register26_ce' => 'ce_1_sg_x0',
4118 
          'to_register26_clk' => 'clk_1_sg_x0',
4119 
          'to_register26_clr' => [
4120 
            'constant',
4121 
            '\'0\'',
4122 
          ],
4123 
          'to_register26_data_in' => 'data_in_x18_net',
4124 
          'to_register26_dout' => 'to_register26_dout_net',
4125 
          'to_register26_en' => 'constant6_op_net_x19',
4126 
          'to_register27_ce' => 'ce_1_sg_x0',
4127 
          'to_register27_clk' => 'clk_1_sg_x0',
4128 
          'to_register27_clr' => [
4129 
            'constant',
4130 
            '\'0\'',
4131 
          ],
4132 
          'to_register27_data_in' => 'data_in_x19_net',
4133 
          'to_register27_dout' => 'to_register27_dout_net',
4134 
          'to_register27_en' => 'constant6_op_net_x20',
4135 
          'to_register2_ce' => 'ce_1_sg_x0',
4136 
          'to_register2_clk' => 'clk_1_sg_x0',
4137 
          'to_register2_clr' => [
4138 
            'constant',
4139 
            '\'0\'',
4140 
          ],
4141 
          'to_register2_data_in' => 'data_in_x11_net',
4142 
          'to_register2_dout' => 'to_register2_dout_net',
4143 
          'to_register2_en' => 'constant6_op_net_x12',
4144 
          'to_register3_ce' => 'ce_1_sg_x0',
4145 
          'to_register3_clk' => 'clk_1_sg_x0',
4146 
          'to_register3_clr' => [
4147 
            'constant',
4148 
            '\'0\'',
4149 
          ],
4150 
          'to_register3_data_in' => 'data_in_x20_net',
4151 
          'to_register3_dout' => 'to_register3_dout_net',
4152 
          'to_register3_en' => 'constant6_op_net_x21',
4153 
          'to_register4_ce' => 'ce_1_sg_x0',
4154 
          'to_register4_clk' => 'clk_1_sg_x0',
4155 
          'to_register4_clr' => [
4156 
            'constant',
4157 
            '\'0\'',
4158 
          ],
4159 
          'to_register4_data_in' => 'data_in_x21_net',
4160 
          'to_register4_dout' => 'to_register4_dout_net',
4161 
          'to_register4_en' => 'constant6_op_net_x22',
4162 
          'to_register5_ce' => 'ce_1_sg_x0',
4163 
          'to_register5_clk' => 'clk_1_sg_x0',
4164 
          'to_register5_clr' => [
4165 
            'constant',
4166 
            '\'0\'',
4167 
          ],
4168 
          'to_register5_data_in' => 'data_in_x22_net',
4169 
          'to_register5_dout' => 'to_register5_dout_net',
4170 
          'to_register5_en' => 'constant6_op_net_x23',
4171 
          'to_register6_ce' => 'ce_1_sg_x0',
4172 
          'to_register6_clk' => 'clk_1_sg_x0',
4173 
          'to_register6_clr' => [
4174 
            'constant',
4175 
            '\'0\'',
4176 
          ],
4177 
          'to_register6_data_in' => 'data_in_x23_net',
4178 
          'to_register6_dout' => 'to_register6_dout_net',
4179 
          'to_register6_en' => 'constant6_op_net_x24',
4180 
          'to_register7_ce' => 'ce_1_sg_x0',
4181 
          'to_register7_clk' => 'clk_1_sg_x0',
4182 
          'to_register7_clr' => [
4183 
            'constant',
4184 
            '\'0\'',
4185 
          ],
4186 
          'to_register7_data_in' => 'data_in_x24_net',
4187 
          'to_register7_dout' => 'to_register7_dout_net',
4188 
          'to_register7_en' => 'constant6_op_net_x25',
4189 
          'to_register8_ce' => 'ce_1_sg_x0',
4190 
          'to_register8_clk' => 'clk_1_sg_x0',
4191 
          'to_register8_clr' => [
4192 
            'constant',
4193 
            '\'0\'',
4194 
          ],
4195 
          'to_register8_data_in' => 'data_in_x25_net',
4196 
          'to_register8_dout' => 'to_register8_dout_net',
4197 
          'to_register8_en' => 'constant6_op_net_x26',
4198 
          'to_register9_ce' => 'ce_1_sg_x0',
4199 
          'to_register9_clk' => 'clk_1_sg_x0',
4200 
          'to_register9_clr' => [
4201 
            'constant',
4202 
            '\'0\'',
4203 
          ],
4204 
          'to_register9_data_in' => 'data_in_x26_net',
4205 
          'to_register9_dout' => 'to_register9_dout_net',
4206 
          'to_register9_en' => 'constant6_op_net_x27',
4207 
          'to_register_ce' => 'ce_1_sg_x0',
4208 
          'to_register_clk' => 'clk_1_sg_x0',
4209 
          'to_register_clr' => [
4210 
            'constant',
4211 
            '\'0\'',
4212 
          ],
4213 
          'to_register_data_in' => 'data_in_net',
4214 
          'to_register_dout' => 'to_register_dout_net',
4215 
          'to_register_en' => 'constant6_op_net_x0',
4216 
          'user_int_1o' => 'user_int_1o_net',
4217 
          'user_int_2o' => 'user_int_2o_net',
4218 
          'user_int_3o' => 'user_int_3o_net',
4219 
        },
4220 
        'entityName' => 'user_logic_cw',
4221 
        'nets' => {
4222 
          'bram_rd_addr_net' => {
4223 
            'attributes' => {
4224 
              'hdlNetAttributes' => [],
4225 
            },
4226 
            'hdlType' => 'std_logic_vector(11 downto 0)',
4227 
            'width' => 12,
4228 
          },
4229 
          'bram_rd_dout_net' => {
4230 
            'attributes' => {
4231 
              'hdlNetAttributes' => [],
4232 
            },
4233 
            'hdlType' => 'std_logic_vector(63 downto 0)',
4234 
            'width' => 64,
4235 
          },
4236 
          'bram_wr_addr_net' => {
4237 
            'attributes' => {
4238 
              'hdlNetAttributes' => [],
4239 
            },
4240 
            'hdlType' => 'std_logic_vector(11 downto 0)',
4241 
            'width' => 12,
4242 
          },
4243 
          'bram_wr_din_net' => {
4244 
            'attributes' => {
4245 
              'hdlNetAttributes' => [],
4246 
            },
4247 
            'hdlType' => 'std_logic_vector(63 downto 0)',
4248 
            'width' => 64,
4249 
          },
4250 
          'bram_wr_en_net' => {
4251 
            'attributes' => {
4252 
              'hdlNetAttributes' => [],
4253 
            },
4254 
            'hdlType' => 'std_logic_vector(7 downto 0)',
4255 
            'width' => 8,
4256 
          },
4257 
          'ce_1_sg_x0' => {
4258 
            'attributes' => {
4259 
              'hdlNetAttributes' => [
4260 
                [
4261 
                  'MAX_FANOUT',
4262 
                  'string',
4263 
                  '"REDUCE"',
4264 
                ],
4265 
              ],
4266 
            },
4267 
            'hdlType' => 'std_logic',
4268 
            'width' => 1,
4269 
          },
4270 
          'clkNet' => {
4271 
            'attributes' => {
4272 
              'hdlNetAttributes' => [],
4273 
            },
4274 
            'hdlType' => 'std_logic',
4275 
            'width' => 1,
4276 
          },
4277 
          'clk_1_sg_x0' => {
4278 
            'attributes' => {
4279 
              'hdlNetAttributes' => [],
4280 
            },
4281 
            'hdlType' => 'std_logic',
4282 
            'width' => 1,
4283 
          },
4284 
          'constant6_op_net_x0' => {
4285 
            'attributes' => {
4286 
              'hdlNetAttributes' => [],
4287 
            },
4288 
            'hdlType' => 'std_logic',
4289 
            'width' => 1,
4290 
          },
4291 
          'constant6_op_net_x1' => {
4292 
            'attributes' => {
4293 
              'hdlNetAttributes' => [],
4294 
            },
4295 
            'hdlType' => 'std_logic',
4296 
            'width' => 1,
4297 
          },
4298 
          'constant6_op_net_x10' => {
4299 
            'attributes' => {
4300 
              'hdlNetAttributes' => [],
4301 
            },
4302 
            'hdlType' => 'std_logic',
4303 
            'width' => 1,
4304 
          },
4305 
          'constant6_op_net_x11' => {
4306 
            'attributes' => {
4307 
              'hdlNetAttributes' => [],
4308 
            },
4309 
            'hdlType' => 'std_logic',
4310 
            'width' => 1,
4311 
          },
4312 
          'constant6_op_net_x12' => {
4313 
            'attributes' => {
4314 
              'hdlNetAttributes' => [],
4315 
            },
4316 
            'hdlType' => 'std_logic',
4317 
            'width' => 1,
4318 
          },
4319 
          'constant6_op_net_x13' => {
4320 
            'attributes' => {
4321 
              'hdlNetAttributes' => [],
4322 
            },
4323 
            'hdlType' => 'std_logic',
4324 
            'width' => 1,
4325 
          },
4326 
          'constant6_op_net_x14' => {
4327 
            'attributes' => {
4328 
              'hdlNetAttributes' => [],
4329 
            },
4330 
            'hdlType' => 'std_logic',
4331 
            'width' => 1,
4332 
          },
4333 
          'constant6_op_net_x15' => {
4334 
            'attributes' => {
4335 
              'hdlNetAttributes' => [],
4336 
            },
4337 
            'hdlType' => 'std_logic',
4338 
            'width' => 1,
4339 
          },
4340 
          'constant6_op_net_x16' => {
4341 
            'attributes' => {
4342 
              'hdlNetAttributes' => [],
4343 
            },
4344 
            'hdlType' => 'std_logic',
4345 
            'width' => 1,
4346 
          },
4347 
          'constant6_op_net_x17' => {
4348 
            'attributes' => {
4349 
              'hdlNetAttributes' => [],
4350 
            },
4351 
            'hdlType' => 'std_logic',
4352 
            'width' => 1,
4353 
          },
4354 
          'constant6_op_net_x18' => {
4355 
            'attributes' => {
4356 
              'hdlNetAttributes' => [],
4357 
            },
4358 
            'hdlType' => 'std_logic',
4359 
            'width' => 1,
4360 
          },
4361 
          'constant6_op_net_x19' => {
4362 
            'attributes' => {
4363 
              'hdlNetAttributes' => [],
4364 
            },
4365 
            'hdlType' => 'std_logic',
4366 
            'width' => 1,
4367 
          },
4368 
          'constant6_op_net_x2' => {
4369 
            'attributes' => {
4370 
              'hdlNetAttributes' => [],
4371 
            },
4372 
            'hdlType' => 'std_logic',
4373 
            'width' => 1,
4374 
          },
4375 
          'constant6_op_net_x20' => {
4376 
            'attributes' => {
4377 
              'hdlNetAttributes' => [],
4378 
            },
4379 
            'hdlType' => 'std_logic',
4380 
            'width' => 1,
4381 
          },
4382 
          'constant6_op_net_x21' => {
4383 
            'attributes' => {
4384 
              'hdlNetAttributes' => [],
4385 
            },
4386 
            'hdlType' => 'std_logic',
4387 
            'width' => 1,
4388 
          },
4389 
          'constant6_op_net_x22' => {
4390 
            'attributes' => {
4391 
              'hdlNetAttributes' => [],
4392 
            },
4393 
            'hdlType' => 'std_logic',
4394 
            'width' => 1,
4395 
          },
4396 
          'constant6_op_net_x23' => {
4397 
            'attributes' => {
4398 
              'hdlNetAttributes' => [],
4399 
            },
4400 
            'hdlType' => 'std_logic',
4401 
            'width' => 1,
4402 
          },
4403 
          'constant6_op_net_x24' => {
4404 
            'attributes' => {
4405 
              'hdlNetAttributes' => [],
4406 
            },
4407 
            'hdlType' => 'std_logic',
4408 
            'width' => 1,
4409 
          },
4410 
          'constant6_op_net_x25' => {
4411 
            'attributes' => {
4412 
              'hdlNetAttributes' => [],
4413 
            },
4414 
            'hdlType' => 'std_logic',
4415 
            'width' => 1,
4416 
          },
4417 
          'constant6_op_net_x26' => {
4418 
            'attributes' => {
4419 
              'hdlNetAttributes' => [],
4420 
            },
4421 
            'hdlType' => 'std_logic',
4422 
            'width' => 1,
4423 
          },
4424 
          'constant6_op_net_x27' => {
4425 
            'attributes' => {
4426 
              'hdlNetAttributes' => [],
4427 
            },
4428 
            'hdlType' => 'std_logic',
4429 
            'width' => 1,
4430 
          },
4431 
          'constant6_op_net_x3' => {
4432 
            'attributes' => {
4433 
              'hdlNetAttributes' => [],
4434 
            },
4435 
            'hdlType' => 'std_logic',
4436 
            'width' => 1,
4437 
          },
4438 
          'constant6_op_net_x4' => {
4439 
            'attributes' => {
4440 
              'hdlNetAttributes' => [],
4441 
            },
4442 
            'hdlType' => 'std_logic',
4443 
            'width' => 1,
4444 
          },
4445 
          'constant6_op_net_x5' => {
4446 
            'attributes' => {
4447 
              'hdlNetAttributes' => [],
4448 
            },
4449 
            'hdlType' => 'std_logic',
4450 
            'width' => 1,
4451 
          },
4452 
          'constant6_op_net_x6' => {
4453 
            'attributes' => {
4454 
              'hdlNetAttributes' => [],
4455 
            },
4456 
            'hdlType' => 'std_logic',
4457 
            'width' => 1,
4458 
          },
4459 
          'constant6_op_net_x7' => {
4460 
            'attributes' => {
4461 
              'hdlNetAttributes' => [],
4462 
            },
4463 
            'hdlType' => 'std_logic',
4464 
            'width' => 1,
4465 
          },
4466 
          'constant6_op_net_x8' => {
4467 
            'attributes' => {
4468 
              'hdlNetAttributes' => [],
4469 
            },
4470 
            'hdlType' => 'std_logic',
4471 
            'width' => 1,
4472 
          },
4473 
          'constant6_op_net_x9' => {
4474 
            'attributes' => {
4475 
              'hdlNetAttributes' => [],
4476 
            },
4477 
            'hdlType' => 'std_logic',
4478 
            'width' => 1,
4479 
          },
4480 
          'data_in_net' => {
4481 
            'attributes' => {
4482 
              'hdlNetAttributes' => [],
4483 
            },
4484 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4485 
            'width' => 32,
4486 
          },
4487 
          'data_in_x0_net' => {
4488 
            'attributes' => {
4489 
              'hdlNetAttributes' => [],
4490 
            },
4491 
            'hdlType' => 'std_logic',
4492 
            'width' => 1,
4493 
          },
4494 
          'data_in_x10_net' => {
4495 
            'attributes' => {
4496 
              'hdlNetAttributes' => [],
4497 
            },
4498 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4499 
            'width' => 32,
4500 
          },
4501 
          'data_in_x11_net' => {
4502 
            'attributes' => {
4503 
              'hdlNetAttributes' => [],
4504 
            },
4505 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4506 
            'width' => 32,
4507 
          },
4508 
          'data_in_x12_net' => {
4509 
            'attributes' => {
4510 
              'hdlNetAttributes' => [],
4511 
            },
4512 
            'hdlType' => 'std_logic',
4513 
            'width' => 1,
4514 
          },
4515 
          'data_in_x13_net' => {
4516 
            'attributes' => {
4517 
              'hdlNetAttributes' => [],
4518 
            },
4519 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4520 
            'width' => 32,
4521 
          },
4522 
          'data_in_x14_net' => {
4523 
            'attributes' => {
4524 
              'hdlNetAttributes' => [],
4525 
            },
4526 
            'hdlType' => 'std_logic',
4527 
            'width' => 1,
4528 
          },
4529 
          'data_in_x15_net' => {
4530 
            'attributes' => {
4531 
              'hdlNetAttributes' => [],
4532 
            },
4533 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4534 
            'width' => 32,
4535 
          },
4536 
          'data_in_x16_net' => {
4537 
            'attributes' => {
4538 
              'hdlNetAttributes' => [],
4539 
            },
4540 
            'hdlType' => 'std_logic',
4541 
            'width' => 1,
4542 
          },
4543 
          'data_in_x17_net' => {
4544 
            'attributes' => {
4545 
              'hdlNetAttributes' => [],
4546 
            },
4547 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4548 
            'width' => 32,
4549 
          },
4550 
          'data_in_x18_net' => {
4551 
            'attributes' => {
4552 
              'hdlNetAttributes' => [],
4553 
            },
4554 
            'hdlType' => 'std_logic',
4555 
            'width' => 1,
4556 
          },
4557 
          'data_in_x19_net' => {
4558 
            'attributes' => {
4559 
              'hdlNetAttributes' => [],
4560 
            },
4561 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4562 
            'width' => 32,
4563 
          },
4564 
          'data_in_x1_net' => {
4565 
            'attributes' => {
4566 
              'hdlNetAttributes' => [],
4567 
            },
4568 
            'hdlType' => 'std_logic',
4569 
            'width' => 1,
4570 
          },
4571 
          'data_in_x20_net' => {
4572 
            'attributes' => {
4573 
              'hdlNetAttributes' => [],
4574 
            },
4575 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4576 
            'width' => 32,
4577 
          },
4578 
          'data_in_x21_net' => {
4579 
            'attributes' => {
4580 
              'hdlNetAttributes' => [],
4581 
            },
4582 
            'hdlType' => 'std_logic',
4583 
            'width' => 1,
4584 
          },
4585 
          'data_in_x22_net' => {
4586 
            'attributes' => {
4587 
              'hdlNetAttributes' => [],
4588 
            },
4589 
            'hdlType' => 'std_logic',
4590 
            'width' => 1,
4591 
          },
4592 
          'data_in_x23_net' => {
4593 
            'attributes' => {
4594 
              'hdlNetAttributes' => [],
4595 
            },
4596 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4597 
            'width' => 32,
4598 
          },
4599 
          'data_in_x24_net' => {
4600 
            'attributes' => {
4601 
              'hdlNetAttributes' => [],
4602 
            },
4603 
            'hdlType' => 'std_logic',
4604 
            'width' => 1,
4605 
          },
4606 
          'data_in_x25_net' => {
4607 
            'attributes' => {
4608 
              'hdlNetAttributes' => [],
4609 
            },
4610 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4611 
            'width' => 32,
4612 
          },
4613 
          'data_in_x26_net' => {
4614 
            'attributes' => {
4615 
              'hdlNetAttributes' => [],
4616 
            },
4617 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4618 
            'width' => 32,
4619 
          },
4620 
          'data_in_x2_net' => {
4621 
            'attributes' => {
4622 
              'hdlNetAttributes' => [],
4623 
            },
4624 
            'hdlType' => 'std_logic',
4625 
            'width' => 1,
4626 
          },
4627 
          'data_in_x3_net' => {
4628 
            'attributes' => {
4629 
              'hdlNetAttributes' => [],
4630 
            },
4631 
            'hdlType' => 'std_logic',
4632 
            'width' => 1,
4633 
          },
4634 
          'data_in_x4_net' => {
4635 
            'attributes' => {
4636 
              'hdlNetAttributes' => [],
4637 
            },
4638 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4639 
            'width' => 32,
4640 
          },
4641 
          'data_in_x5_net' => {
4642 
            'attributes' => {
4643 
              'hdlNetAttributes' => [],
4644 
            },
4645 
            'hdlType' => 'std_logic',
4646 
            'width' => 1,
4647 
          },
4648 
          'data_in_x6_net' => {
4649 
            'attributes' => {
4650 
              'hdlNetAttributes' => [],
4651 
            },
4652 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4653 
            'width' => 32,
4654 
          },
4655 
          'data_in_x7_net' => {
4656 
            'attributes' => {
4657 
              'hdlNetAttributes' => [],
4658 
            },
4659 
            'hdlType' => 'std_logic',
4660 
            'width' => 1,
4661 
          },
4662 
          'data_in_x8_net' => {
4663 
            'attributes' => {
4664 
              'hdlNetAttributes' => [],
4665 
            },
4666 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4667 
            'width' => 32,
4668 
          },
4669 
          'data_in_x9_net' => {
4670 
            'attributes' => {
4671 
              'hdlNetAttributes' => [],
4672 
            },
4673 
            'hdlType' => 'std_logic',
4674 
            'width' => 1,
4675 
          },
4676 
          'data_out_x12_net' => {
4677 
            'attributes' => {
4678 
              'hdlNetAttributes' => [],
4679 
            },
4680 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4681 
            'width' => 32,
4682 
          },
4683 
          'data_out_x13_net' => {
4684 
            'attributes' => {
4685 
              'hdlNetAttributes' => [],
4686 
            },
4687 
            'hdlType' => 'std_logic',
4688 
            'width' => 1,
4689 
          },
4690 
          'data_out_x14_net' => {
4691 
            'attributes' => {
4692 
              'hdlNetAttributes' => [],
4693 
            },
4694 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4695 
            'width' => 32,
4696 
          },
4697 
          'data_out_x15_net' => {
4698 
            'attributes' => {
4699 
              'hdlNetAttributes' => [],
4700 
            },
4701 
            'hdlType' => 'std_logic',
4702 
            'width' => 1,
4703 
          },
4704 
          'data_out_x16_net' => {
4705 
            'attributes' => {
4706 
              'hdlNetAttributes' => [],
4707 
            },
4708 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4709 
            'width' => 32,
4710 
          },
4711 
          'data_out_x17_net' => {
4712 
            'attributes' => {
4713 
              'hdlNetAttributes' => [],
4714 
            },
4715 
            'hdlType' => 'std_logic',
4716 
            'width' => 1,
4717 
          },
4718 
          'data_out_x18_net' => {
4719 
            'attributes' => {
4720 
              'hdlNetAttributes' => [],
4721 
            },
4722 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4723 
            'width' => 32,
4724 
          },
4725 
          'data_out_x19_net' => {
4726 
            'attributes' => {
4727 
              'hdlNetAttributes' => [],
4728 
            },
4729 
            'hdlType' => 'std_logic',
4730 
            'width' => 1,
4731 
          },
4732 
          'data_out_x1_net' => {
4733 
            'attributes' => {
4734 
              'hdlNetAttributes' => [],
4735 
            },
4736 
            'hdlType' => 'std_logic',
4737 
            'width' => 1,
4738 
          },
4739 
          'data_out_x20_net' => {
4740 
            'attributes' => {
4741 
              'hdlNetAttributes' => [],
4742 
            },
4743 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4744 
            'width' => 32,
4745 
          },
4746 
          'data_out_x21_net' => {
4747 
            'attributes' => {
4748 
              'hdlNetAttributes' => [],
4749 
            },
4750 
            'hdlType' => 'std_logic',
4751 
            'width' => 1,
4752 
          },
4753 
          'data_out_x22_net' => {
4754 
            'attributes' => {
4755 
              'hdlNetAttributes' => [],
4756 
            },
4757 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4758 
            'width' => 32,
4759 
          },
4760 
          'data_out_x23_net' => {
4761 
            'attributes' => {
4762 
              'hdlNetAttributes' => [],
4763 
            },
4764 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4765 
            'width' => 32,
4766 
          },
4767 
          'data_out_x24_net' => {
4768 
            'attributes' => {
4769 
              'hdlNetAttributes' => [],
4770 
            },
4771 
            'hdlType' => 'std_logic',
4772 
            'width' => 1,
4773 
          },
4774 
          'data_out_x25_net' => {
4775 
            'attributes' => {
4776 
              'hdlNetAttributes' => [],
4777 
            },
4778 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4779 
            'width' => 32,
4780 
          },
4781 
          'data_out_x26_net' => {
4782 
            'attributes' => {
4783 
              'hdlNetAttributes' => [],
4784 
            },
4785 
            'hdlType' => 'std_logic',
4786 
            'width' => 1,
4787 
          },
4788 
          'data_out_x27_net' => {
4789 
            'attributes' => {
4790 
              'hdlNetAttributes' => [],
4791 
            },
4792 
            'hdlType' => 'std_logic',
4793 
            'width' => 1,
4794 
          },
4795 
          'data_out_x28_net' => {
4796 
            'attributes' => {
4797 
              'hdlNetAttributes' => [],
4798 
            },
4799 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4800 
            'width' => 32,
4801 
          },
4802 
          'data_out_x29_net' => {
4803 
            'attributes' => {
4804 
              'hdlNetAttributes' => [],
4805 
            },
4806 
            'hdlType' => 'std_logic',
4807 
            'width' => 1,
4808 
          },
4809 
          'data_out_x2_net' => {
4810 
            'attributes' => {
4811 
              'hdlNetAttributes' => [],
4812 
            },
4813 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4814 
            'width' => 32,
4815 
          },
4816 
          'data_out_x30_net' => {
4817 
            'attributes' => {
4818 
              'hdlNetAttributes' => [],
4819 
            },
4820 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4821 
            'width' => 32,
4822 
          },
4823 
          'data_out_x31_net' => {
4824 
            'attributes' => {
4825 
              'hdlNetAttributes' => [],
4826 
            },
4827 
            'hdlType' => 'std_logic',
4828 
            'width' => 1,
4829 
          },
4830 
          'data_out_x32_net' => {
4831 
            'attributes' => {
4832 
              'hdlNetAttributes' => [],
4833 
            },
4834 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4835 
            'width' => 32,
4836 
          },
4837 
          'data_out_x3_net' => {
4838 
            'attributes' => {
4839 
              'hdlNetAttributes' => [],
4840 
            },
4841 
            'hdlType' => 'std_logic',
4842 
            'width' => 1,
4843 
          },
4844 
          'data_out_x4_net' => {
4845 
            'attributes' => {
4846 
              'hdlNetAttributes' => [],
4847 
            },
4848 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4849 
            'width' => 32,
4850 
          },
4851 
          'data_out_x5_net' => {
4852 
            'attributes' => {
4853 
              'hdlNetAttributes' => [],
4854 
            },
4855 
            'hdlType' => 'std_logic',
4856 
            'width' => 1,
4857 
          },
4858 
          'data_out_x8_net' => {
4859 
            'attributes' => {
4860 
              'hdlNetAttributes' => [],
4861 
            },
4862 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4863 
            'width' => 32,
4864 
          },
4865 
          'data_out_x9_net' => {
4866 
            'attributes' => {
4867 
              'hdlNetAttributes' => [],
4868 
            },
4869 
            'hdlType' => 'std_logic',
4870 
            'width' => 1,
4871 
          },
4872 
          'fifo_rd_count_net' => {
4873 
            'attributes' => {
4874 
              'hdlNetAttributes' => [],
4875 
            },
4876 
            'hdlType' => 'std_logic_vector(14 downto 0)',
4877 
            'width' => 15,
4878 
          },
4879 
          'fifo_rd_dout_net' => {
4880 
            'attributes' => {
4881 
              'hdlNetAttributes' => [],
4882 
            },
4883 
            'hdlType' => 'std_logic_vector(71 downto 0)',
4884 
            'width' => 72,
4885 
          },
4886 
          'fifo_rd_empty_net' => {
4887 
            'attributes' => {
4888 
              'hdlNetAttributes' => [],
4889 
            },
4890 
            'hdlType' => 'std_logic',
4891 
            'width' => 1,
4892 
          },
4893 
          'fifo_rd_en_net' => {
4894 
            'attributes' => {
4895 
              'hdlNetAttributes' => [],
4896 
            },
4897 
            'hdlType' => 'std_logic',
4898 
            'width' => 1,
4899 
          },
4900 
          'fifo_rd_pempty_net' => {
4901 
            'attributes' => {
4902 
              'hdlNetAttributes' => [],
4903 
            },
4904 
            'hdlType' => 'std_logic',
4905 
            'width' => 1,
4906 
          },
4907 
          'fifo_rd_valid_net' => {
4908 
            'attributes' => {
4909 
              'hdlNetAttributes' => [],
4910 
            },
4911 
            'hdlType' => 'std_logic',
4912 
            'width' => 1,
4913 
          },
4914 
          'fifo_wr_count_net' => {
4915 
            'attributes' => {
4916 
              'hdlNetAttributes' => [],
4917 
            },
4918 
            'hdlType' => 'std_logic_vector(14 downto 0)',
4919 
            'width' => 15,
4920 
          },
4921 
          'fifo_wr_din_net' => {
4922 
            'attributes' => {
4923 
              'hdlNetAttributes' => [],
4924 
            },
4925 
            'hdlType' => 'std_logic_vector(71 downto 0)',
4926 
            'width' => 72,
4927 
          },
4928 
          'fifo_wr_en_net' => {
4929 
            'attributes' => {
4930 
              'hdlNetAttributes' => [],
4931 
            },
4932 
            'hdlType' => 'std_logic',
4933 
            'width' => 1,
4934 
          },
4935 
          'fifo_wr_full_net' => {
4936 
            'attributes' => {
4937 
              'hdlNetAttributes' => [],
4938 
            },
4939 
            'hdlType' => 'std_logic',
4940 
            'width' => 1,
4941 
          },
4942 
          'fifo_wr_pfull_net' => {
4943 
            'attributes' => {
4944 
              'hdlNetAttributes' => [],
4945 
            },
4946 
            'hdlType' => 'std_logic',
4947 
            'width' => 1,
4948 
          },
4949 
          'from_register15_data_out_net' => {
4950 
            'attributes' => {
4951 
              'hdlNetAttributes' => [],
4952 
            },
4953 
            'hdlType' => 'std_logic',
4954 
            'width' => 1,
4955 
          },
4956 
          'from_register16_data_out_net' => {
4957 
            'attributes' => {
4958 
              'hdlNetAttributes' => [],
4959 
            },
4960 
            'hdlType' => 'std_logic',
4961 
            'width' => 1,
4962 
          },
4963 
          'from_register19_data_out_net' => {
4964 
            'attributes' => {
4965 
              'hdlNetAttributes' => [],
4966 
            },
4967 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4968 
            'width' => 32,
4969 
          },
4970 
          'from_register1_data_out_net' => {
4971 
            'attributes' => {
4972 
              'hdlNetAttributes' => [],
4973 
            },
4974 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4975 
            'width' => 32,
4976 
          },
4977 
          'from_register2_data_out_net' => {
4978 
            'attributes' => {
4979 
              'hdlNetAttributes' => [],
4980 
            },
4981 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4982 
            'width' => 32,
4983 
          },
4984 
          'from_register_data_out_net' => {
4985 
            'attributes' => {
4986 
              'hdlNetAttributes' => [],
4987 
            },
4988 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4989 
            'width' => 32,
4990 
          },
4991 
          'persistentdff_inst_q' => {
4992 
            'attributes' => {
4993 
              'hdlNetAttributes' => [
4994 
                [
4995 
                  'syn_keep',
4996 
                  'boolean',
4997 
                  'true',
4998 
                ],
4999 
                [
5000 
                  'keep',
5001 
                  'boolean',
5002 
                  'true',
5003 
                ],
5004 
                [
5005 
                  'preserve_signal',
5006 
                  'boolean',
5007 
                  'true',
5008 
                ],
5009 
              ],
5010 
            },
5011 
            'hdlType' => 'std_logic',
5012 
            'width' => 1,
5013 
          },
5014 
          'rst_i_net' => {
5015 
            'attributes' => {
5016 
              'hdlNetAttributes' => [],
5017 
            },
5018 
            'hdlType' => 'std_logic',
5019 
            'width' => 1,
5020 
          },
5021 
          'rst_o_net' => {
5022 
            'attributes' => {
5023 
              'hdlNetAttributes' => [],
5024 
            },
5025 
            'hdlType' => 'std_logic',
5026 
            'width' => 1,
5027 
          },
5028 
          'to_register10_dout_net' => {
5029 
            'attributes' => {
5030 
              'hdlNetAttributes' => [],
5031 
            },
5032 
            'hdlType' => 'std_logic',
5033 
            'width' => 1,
5034 
          },
5035 
          'to_register11_dout_net' => {
5036 
            'attributes' => {
5037 
              'hdlNetAttributes' => [],
5038 
            },
5039 
            'hdlType' => 'std_logic',
5040 
            'width' => 1,
5041 
          },
5042 
          'to_register12_dout_net' => {
5043 
            'attributes' => {
5044 
              'hdlNetAttributes' => [],
5045 
            },
5046 
            'hdlType' => 'std_logic',
5047 
            'width' => 1,
5048 
          },
5049 
          'to_register13_dout_net' => {
5050 
            'attributes' => {
5051 
              'hdlNetAttributes' => [],
5052 
            },
5053 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5054 
            'width' => 32,
5055 
          },
5056 
          'to_register14_dout_net' => {
5057 
            'attributes' => {
5058 
              'hdlNetAttributes' => [],
5059 
            },
5060 
            'hdlType' => 'std_logic',
5061 
            'width' => 1,
5062 
          },
5063 
          'to_register15_dout_net' => {
5064 
            'attributes' => {
5065 
              'hdlNetAttributes' => [],
5066 
            },
5067 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5068 
            'width' => 32,
5069 
          },
5070 
          'to_register16_dout_net' => {
5071 
            'attributes' => {
5072 
              'hdlNetAttributes' => [],
5073 
            },
5074 
            'hdlType' => 'std_logic',
5075 
            'width' => 1,
5076 
          },
5077 
          'to_register17_dout_net' => {
5078 
            'attributes' => {
5079 
              'hdlNetAttributes' => [],
5080 
            },
5081 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5082 
            'width' => 32,
5083 
          },
5084 
          'to_register18_dout_net' => {
5085 
            'attributes' => {
5086 
              'hdlNetAttributes' => [],
5087 
            },
5088 
            'hdlType' => 'std_logic',
5089 
            'width' => 1,
5090 
          },
5091 
          'to_register19_dout_net' => {
5092 
            'attributes' => {
5093 
              'hdlNetAttributes' => [],
5094 
            },
5095 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5096 
            'width' => 32,
5097 
          },
5098 
          'to_register1_dout_net' => {
5099 
            'attributes' => {
5100 
              'hdlNetAttributes' => [],
5101 
            },
5102 
            'hdlType' => 'std_logic',
5103 
            'width' => 1,
5104 
          },
5105 
          'to_register20_dout_net' => {
5106 
            'attributes' => {
5107 
              'hdlNetAttributes' => [],
5108 
            },
5109 
            'hdlType' => 'std_logic',
5110 
            'width' => 1,
5111 
          },
5112 
          'to_register21_dout_net' => {
5113 
            'attributes' => {
5114 
              'hdlNetAttributes' => [],
5115 
            },
5116 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5117 
            'width' => 32,
5118 
          },
5119 
          'to_register22_dout_net' => {
5120 
            'attributes' => {
5121 
              'hdlNetAttributes' => [],
5122 
            },
5123 
            'hdlType' => 'std_logic',
5124 
            'width' => 1,
5125 
          },
5126 
          'to_register23_dout_net' => {
5127 
            'attributes' => {
5128 
              'hdlNetAttributes' => [],
5129 
            },
5130 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5131 
            'width' => 32,
5132 
          },
5133 
          'to_register24_dout_net' => {
5134 
            'attributes' => {
5135 
              'hdlNetAttributes' => [],
5136 
            },
5137 
            'hdlType' => 'std_logic',
5138 
            'width' => 1,
5139 
          },
5140 
          'to_register25_dout_net' => {
5141 
            'attributes' => {
5142 
              'hdlNetAttributes' => [],
5143 
            },
5144 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5145 
            'width' => 32,
5146 
          },
5147 
          'to_register26_dout_net' => {
5148 
            'attributes' => {
5149 
              'hdlNetAttributes' => [],
5150 
            },
5151 
            'hdlType' => 'std_logic',
5152 
            'width' => 1,
5153 
          },
5154 
          'to_register27_dout_net' => {
5155 
            'attributes' => {
5156 
              'hdlNetAttributes' => [],
5157 
            },
5158 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5159 
            'width' => 32,
5160 
          },
5161 
          'to_register2_dout_net' => {
5162 
            'attributes' => {
5163 
              'hdlNetAttributes' => [],
5164 
            },
5165 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5166 
            'width' => 32,
5167 
          },
5168 
          'to_register3_dout_net' => {
5169 
            'attributes' => {
5170 
              'hdlNetAttributes' => [],
5171 
            },
5172 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5173 
            'width' => 32,
5174 
          },
5175 
          'to_register4_dout_net' => {
5176 
            'attributes' => {
5177 
              'hdlNetAttributes' => [],
5178 
            },
5179 
            'hdlType' => 'std_logic',
5180 
            'width' => 1,
5181 
          },
5182 
          'to_register5_dout_net' => {
5183 
            'attributes' => {
5184 
              'hdlNetAttributes' => [],
5185 
            },
5186 
            'hdlType' => 'std_logic',
5187 
            'width' => 1,
5188 
          },
5189 
          'to_register6_dout_net' => {
5190 
            'attributes' => {
5191 
              'hdlNetAttributes' => [],
5192 
            },
5193 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5194 
            'width' => 32,
5195 
          },
5196 
          'to_register7_dout_net' => {
5197 
            'attributes' => {
5198 
              'hdlNetAttributes' => [],
5199 
            },
5200 
            'hdlType' => 'std_logic',
5201 
            'width' => 1,
5202 
          },
5203 
          'to_register8_dout_net' => {
5204 
            'attributes' => {
5205 
              'hdlNetAttributes' => [],
5206 
            },
5207 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5208 
            'width' => 32,
5209 
          },
5210 
          'to_register9_dout_net' => {
5211 
            'attributes' => {
5212 
              'hdlNetAttributes' => [],
5213 
            },
5214 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5215 
            'width' => 32,
5216 
          },
5217 
          'to_register_dout_net' => {
5218 
            'attributes' => {
5219 
              'hdlNetAttributes' => [],
5220 
            },
5221 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5222 
            'width' => 32,
5223 
          },
5224 
          'user_int_1o_net' => {
5225 
            'attributes' => {
5226 
              'hdlNetAttributes' => [],
5227 
            },
5228 
            'hdlType' => 'std_logic',
5229 
            'width' => 1,
5230 
          },
5231 
          'user_int_2o_net' => {
5232 
            'attributes' => {
5233 
              'hdlNetAttributes' => [],
5234 
            },
5235 
            'hdlType' => 'std_logic',
5236 
            'width' => 1,
5237 
          },
5238 
          'user_int_3o_net' => {
5239 
            'attributes' => {
5240 
              'hdlNetAttributes' => [],
5241 
            },
5242 
            'hdlType' => 'std_logic',
5243 
            'width' => 1,
5244 
          },
5245 
        },
5246 
        'ports' => {
5247 
          'bram_rd_addr' => {
5248 
            'attributes' => {
5249 
              'bin_pt' => 0,
5250 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
5251 
              'is_floating_block' => 1,
5252 
              'is_gateway_port' => 1,
5253 
              'must_be_hdl_vector' => 1,
5254 
              'period' => 1,
5255 
              'port_id' => 0,
5256 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr/BRAM_rd_addr',
5257 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr',
5258 
              'timingConstraint' => 'none',
5259 
              'type' => 'UFix_12_0',
5260 
            },
5261 
            'direction' => 'out',
5262 
            'hdlType' => 'std_logic_vector(11 downto 0)',
5263 
            'width' => 12,
5264 
          },
5265 
          'bram_rd_dout' => {
5266 
            'attributes' => {
5267 
              'bin_pt' => 0,
5268 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
5269 
              'is_floating_block' => 1,
5270 
              'is_gateway_port' => 1,
5271 
              'must_be_hdl_vector' => 1,
5272 
              'period' => 1,
5273 
              'port_id' => 0,
5274 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout/BRAM_rd_dout',
5275 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout',
5276 
              'timingConstraint' => 'none',
5277 
              'type' => 'UFix_64_0',
5278 
            },
5279 
            'direction' => 'in',
5280 
            'hdlType' => 'std_logic_vector(63 downto 0)',
5281 
            'width' => 64,
5282 
          },
5283 
          'bram_wr_addr' => {
5284 
            'attributes' => {
5285 
              'bin_pt' => 0,
5286 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
5287 
              'is_floating_block' => 1,
5288 
              'is_gateway_port' => 1,
5289 
              'must_be_hdl_vector' => 1,
5290 
              'period' => 1,
5291 
              'port_id' => 0,
5292 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr/BRAM_wr_addr',
5293 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr',
5294 
              'timingConstraint' => 'none',
5295 
              'type' => 'UFix_12_0',
5296 
            },
5297 
            'direction' => 'out',
5298 
            'hdlType' => 'std_logic_vector(11 downto 0)',
5299 
            'width' => 12,
5300 
          },
5301 
          'bram_wr_din' => {
5302 
            'attributes' => {
5303 
              'bin_pt' => 0,
5304 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
5305 
              'is_floating_block' => 1,
5306 
              'is_gateway_port' => 1,
5307 
              'must_be_hdl_vector' => 1,
5308 
              'period' => 1,
5309 
              'port_id' => 0,
5310 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din/BRAM_wr_din',
5311 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din',
5312 
              'timingConstraint' => 'none',
5313 
              'type' => 'UFix_64_0',
5314 
            },
5315 
            'direction' => 'out',
5316 
            'hdlType' => 'std_logic_vector(63 downto 0)',
5317 
            'width' => 64,
5318 
          },
5319 
          'bram_wr_en' => {
5320 
            'attributes' => {
5321 
              'bin_pt' => 0,
5322 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
5323 
              'is_floating_block' => 1,
5324 
              'is_gateway_port' => 1,
5325 
              'must_be_hdl_vector' => 1,
5326 
              'period' => 1,
5327 
              'port_id' => 0,
5328 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en/BRAM_wr_en',
5329 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en',
5330 
              'timingConstraint' => 'none',
5331 
              'type' => 'UFix_8_0',
5332 
            },
5333 
            'direction' => 'out',
5334 
            'hdlType' => 'std_logic_vector(7 downto 0)',
5335 
            'width' => 8,
5336 
          },
5337 
          'ce' => {
5338 
            'attributes' => {
5339 
              'defaultHdlValue' => '\'1\'',
5340 
              'domain' => 'default',
5341 
              'group' => 6,
5342 
              'isCe' => 1,
5343 
              'period' => 1,
5344 
            },
5345 
            'direction' => 'in',
5346 
            'hdlType' => 'std_logic',
5347 
            'width' => 1,
5348 
          },
5349 
          'clk' => {
5350 
            'attributes' => {
5351 
              'domain' => 'default',
5352 
              'group' => 6,
5353 
              'isClk' => 1,
5354 
              'period' => 1,
5355 
              'type' => 'logic',
5356 
            },
5357 
            'direction' => 'in',
5358 
            'hdlType' => 'std_logic',
5359 
            'width' => 1,
5360 
          },
5361 
          'fifo_rd_count' => {
5362 
            'attributes' => {
5363 
              'bin_pt' => 0,
5364 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
5365 
              'is_floating_block' => 1,
5366 
              'is_gateway_port' => 1,
5367 
              'must_be_hdl_vector' => 1,
5368 
              'period' => 1,
5369 
              'port_id' => 0,
5370 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count/FIFO_rd_count',
5371 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_count',
5372 
              'timingConstraint' => 'none',
5373 
              'type' => 'UFix_15_0',
5374 
            },
5375 
            'direction' => 'in',
5376 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5377 
            'width' => 15,
5378 
          },
5379 
          'fifo_rd_dout' => {
5380 
            'attributes' => {
5381 
              'bin_pt' => 0,
5382 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
5383 
              'is_floating_block' => 1,
5384 
              'is_gateway_port' => 1,
5385 
              'must_be_hdl_vector' => 1,
5386 
              'period' => 1,
5387 
              'port_id' => 0,
5388 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout/FIFO_rd_dout',
5389 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout',
5390 
              'timingConstraint' => 'none',
5391 
              'type' => 'UFix_72_0',
5392 
            },
5393 
            'direction' => 'in',
5394 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5395 
            'width' => 72,
5396 
          },
5397 
          'fifo_rd_empty' => {
5398 
            'attributes' => {
5399 
              'bin_pt' => 0,
5400 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
5401 
              'is_floating_block' => 1,
5402 
              'is_gateway_port' => 1,
5403 
              'must_be_hdl_vector' => 1,
5404 
              'period' => 1,
5405 
              'port_id' => 0,
5406 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty/FIFO_rd_empty',
5407 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty',
5408 
              'timingConstraint' => 'none',
5409 
              'type' => 'Bool',
5410 
            },
5411 
            'direction' => 'in',
5412 
            'hdlType' => 'std_logic',
5413 
            'width' => 1,
5414 
          },
5415 
          'fifo_rd_en' => {
5416 
            'attributes' => {
5417 
              'bin_pt' => 0,
5418 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
5419 
              'is_floating_block' => 1,
5420 
              'is_gateway_port' => 1,
5421 
              'must_be_hdl_vector' => 1,
5422 
              'period' => 1,
5423 
              'port_id' => 0,
5424 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en/FIFO_rd_en',
5425 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en',
5426 
              'timingConstraint' => 'none',
5427 
              'type' => 'Bool',
5428 
            },
5429 
            'direction' => 'out',
5430 
            'hdlType' => 'std_logic',
5431 
            'width' => 1,
5432 
          },
5433 
          'fifo_rd_pempty' => {
5434 
            'attributes' => {
5435 
              'bin_pt' => 0,
5436 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
5437 
              'is_floating_block' => 1,
5438 
              'is_gateway_port' => 1,
5439 
              'must_be_hdl_vector' => 1,
5440 
              'period' => 1,
5441 
              'port_id' => 0,
5442 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty/FIFO_rd_pempty',
5443 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_pempty',
5444 
              'timingConstraint' => 'none',
5445 
              'type' => 'Bool',
5446 
            },
5447 
            'direction' => 'in',
5448 
            'hdlType' => 'std_logic',
5449 
            'width' => 1,
5450 
          },
5451 
          'fifo_rd_valid' => {
5452 
            'attributes' => {
5453 
              'bin_pt' => 0,
5454 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
5455 
              'is_floating_block' => 1,
5456 
              'is_gateway_port' => 1,
5457 
              'must_be_hdl_vector' => 1,
5458 
              'period' => 1,
5459 
              'port_id' => 0,
5460 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid/FIFO_rd_valid',
5461 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid',
5462 
              'timingConstraint' => 'none',
5463 
              'type' => 'Bool',
5464 
            },
5465 
            'direction' => 'in',
5466 
            'hdlType' => 'std_logic',
5467 
            'width' => 1,
5468 
          },
5469 
          'fifo_wr_count' => {
5470 
            'attributes' => {
5471 
              'bin_pt' => 0,
5472 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
5473 
              'is_floating_block' => 1,
5474 
              'is_gateway_port' => 1,
5475 
              'must_be_hdl_vector' => 1,
5476 
              'period' => 1,
5477 
              'port_id' => 0,
5478 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count/FIFO_wr_count',
5479 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_count',
5480 
              'timingConstraint' => 'none',
5481 
              'type' => 'UFix_15_0',
5482 
            },
5483 
            'direction' => 'in',
5484 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5485 
            'width' => 15,
5486 
          },
5487 
          'fifo_wr_din' => {
5488 
            'attributes' => {
5489 
              'bin_pt' => 0,
5490 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
5491 
              'is_floating_block' => 1,
5492 
              'is_gateway_port' => 1,
5493 
              'must_be_hdl_vector' => 1,
5494 
              'period' => 1,
5495 
              'port_id' => 0,
5496 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din/FIFO_wr_din',
5497 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din',
5498 
              'timingConstraint' => 'none',
5499 
              'type' => 'UFix_72_0',
5500 
            },
5501 
            'direction' => 'out',
5502 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5503 
            'width' => 72,
5504 
          },
5505 
          'fifo_wr_en' => {
5506 
            'attributes' => {
5507 
              'bin_pt' => 0,
5508 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
5509 
              'is_floating_block' => 1,
5510 
              'is_gateway_port' => 1,
5511 
              'must_be_hdl_vector' => 1,
5512 
              'period' => 1,
5513 
              'port_id' => 0,
5514 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en/FIFO_wr_en',
5515 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en',
5516 
              'timingConstraint' => 'none',
5517 
              'type' => 'Bool',
5518 
            },
5519 
            'direction' => 'out',
5520 
            'hdlType' => 'std_logic',
5521 
            'width' => 1,
5522 
          },
5523 
          'fifo_wr_full' => {
5524 
            'attributes' => {
5525 
              'bin_pt' => 0,
5526 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
5527 
              'is_floating_block' => 1,
5528 
              'is_gateway_port' => 1,
5529 
              'must_be_hdl_vector' => 1,
5530 
              'period' => 1,
5531 
              'port_id' => 0,
5532 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full/FIFO_wr_full',
5533 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_full',
5534 
              'timingConstraint' => 'none',
5535 
              'type' => 'Bool',
5536 
            },
5537 
            'direction' => 'in',
5538 
            'hdlType' => 'std_logic',
5539 
            'width' => 1,
5540 
          },
5541 
          'fifo_wr_pfull' => {
5542 
            'attributes' => {
5543 
              'bin_pt' => 0,
5544 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
5545 
              'is_floating_block' => 1,
5546 
              'is_gateway_port' => 1,
5547 
              'must_be_hdl_vector' => 1,
5548 
              'period' => 1,
5549 
              'port_id' => 0,
5550 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull/FIFO_wr_pfull',
5551 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_pfull',
5552 
              'timingConstraint' => 'none',
5553 
              'type' => 'Bool',
5554 
            },
5555 
            'direction' => 'in',
5556 
            'hdlType' => 'std_logic',
5557 
            'width' => 1,
5558 
          },
5559 
          'from_register10_data_out' => {
5560 
            'attributes' => {
5561 
              'bin_pt' => 0,
5562 
              'is_floating_block' => 1,
5563 
              'must_be_hdl_vector' => 1,
5564 
              'period' => 1,
5565 
              'port_id' => 0,
5566 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10/data_out',
5567 
              'type' => 'UFix_1_0',
5568 
            },
5569 
            'direction' => 'in',
5570 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5571 
            'width' => 1,
5572 
          },
5573 
          'from_register11_data_out' => {
5574 
            'attributes' => {
5575 
              'bin_pt' => 0,
5576 
              'is_floating_block' => 1,
5577 
              'must_be_hdl_vector' => 1,
5578 
              'period' => 1,
5579 
              'port_id' => 0,
5580 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11/data_out',
5581 
              'type' => 'UFix_32_0',
5582 
            },
5583 
            'direction' => 'in',
5584 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5585 
            'width' => 32,
5586 
          },
5587 
          'from_register12_data_out' => {
5588 
            'attributes' => {
5589 
              'bin_pt' => 0,
5590 
              'is_floating_block' => 1,
5591 
              'must_be_hdl_vector' => 1,
5592 
              'period' => 1,
5593 
              'port_id' => 0,
5594 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12/data_out',
5595 
              'type' => 'UFix_1_0',
5596 
            },
5597 
            'direction' => 'in',
5598 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5599 
            'width' => 1,
5600 
          },
5601 
          'from_register13_data_out' => {
5602 
            'attributes' => {
5603 
              'bin_pt' => 0,
5604 
              'is_floating_block' => 1,
5605 
              'must_be_hdl_vector' => 1,
5606 
              'period' => 1,
5607 
              'port_id' => 0,
5608 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13/data_out',
5609 
              'type' => 'UFix_32_0',
5610 
            },
5611 
            'direction' => 'in',
5612 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5613 
            'width' => 32,
5614 
          },
5615 
          'from_register14_data_out' => {
5616 
            'attributes' => {
5617 
              'bin_pt' => 0,
5618 
              'is_floating_block' => 1,
5619 
              'must_be_hdl_vector' => 1,
5620 
              'period' => 1,
5621 
              'port_id' => 0,
5622 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14/data_out',
5623 
              'type' => 'UFix_1_0',
5624 
            },
5625 
            'direction' => 'in',
5626 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5627 
            'width' => 1,
5628 
          },
5629 
          'from_register15_data_out' => {
5630 
            'attributes' => {
5631 
              'bin_pt' => 0,
5632 
              'is_floating_block' => 1,
5633 
              'must_be_hdl_vector' => 1,
5634 
              'period' => 1,
5635 
              'port_id' => 0,
5636 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15/data_out',
5637 
              'type' => 'UFix_1_0',
5638 
            },
5639 
            'direction' => 'in',
5640 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5641 
            'width' => 1,
5642 
          },
5643 
          'from_register16_data_out' => {
5644 
            'attributes' => {
5645 
              'bin_pt' => 0,
5646 
              'is_floating_block' => 1,
5647 
              'must_be_hdl_vector' => 1,
5648 
              'period' => 1,
5649 
              'port_id' => 0,
5650 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16/data_out',
5651 
              'type' => 'UFix_1_0',
5652 
            },
5653 
            'direction' => 'in',
5654 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5655 
            'width' => 1,
5656 
          },
5657 
          'from_register17_data_out' => {
5658 
            'attributes' => {
5659 
              'bin_pt' => 0,
5660 
              'is_floating_block' => 1,
5661 
              'must_be_hdl_vector' => 1,
5662 
              'period' => 1,
5663 
              'port_id' => 0,
5664 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17/data_out',
5665 
              'type' => 'UFix_32_0',
5666 
            },
5667 
            'direction' => 'in',
5668 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5669 
            'width' => 32,
5670 
          },
5671 
          'from_register18_data_out' => {
5672 
            'attributes' => {
5673 
              'bin_pt' => 0,
5674 
              'is_floating_block' => 1,
5675 
              'must_be_hdl_vector' => 1,
5676 
              'period' => 1,
5677 
              'port_id' => 0,
5678 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18/data_out',
5679 
              'type' => 'UFix_1_0',
5680 
            },
5681 
            'direction' => 'in',
5682 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5683 
            'width' => 1,
5684 
          },
5685 
          'from_register19_data_out' => {
5686 
            'attributes' => {
5687 
              'bin_pt' => 0,
5688 
              'is_floating_block' => 1,
5689 
              'must_be_hdl_vector' => 1,
5690 
              'period' => 1,
5691 
              'port_id' => 0,
5692 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19/data_out',
5693 
              'type' => 'UFix_32_0',
5694 
            },
5695 
            'direction' => 'in',
5696 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5697 
            'width' => 32,
5698 
          },
5699 
          'from_register1_data_out' => {
5700 
            'attributes' => {
5701 
              'bin_pt' => 0,
5702 
              'is_floating_block' => 1,
5703 
              'must_be_hdl_vector' => 1,
5704 
              'period' => 1,
5705 
              'port_id' => 0,
5706 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1/data_out',
5707 
              'type' => 'UFix_32_0',
5708 
            },
5709 
            'direction' => 'in',
5710 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5711 
            'width' => 32,
5712 
          },
5713 
          'from_register20_data_out' => {
5714 
            'attributes' => {
5715 
              'bin_pt' => 0,
5716 
              'is_floating_block' => 1,
5717 
              'must_be_hdl_vector' => 1,
5718 
              'period' => 1,
5719 
              'port_id' => 0,
5720 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20/data_out',
5721 
              'type' => 'UFix_32_0',
5722 
            },
5723 
            'direction' => 'in',
5724 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5725 
            'width' => 32,
5726 
          },
5727 
          'from_register21_data_out' => {
5728 
            'attributes' => {
5729 
              'bin_pt' => 0,
5730 
              'is_floating_block' => 1,
5731 
              'must_be_hdl_vector' => 1,
5732 
              'period' => 1,
5733 
              'port_id' => 0,
5734 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21/data_out',
5735 
              'type' => 'UFix_1_0',
5736 
            },
5737 
            'direction' => 'in',
5738 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5739 
            'width' => 1,
5740 
          },
5741 
          'from_register22_data_out' => {
5742 
            'attributes' => {
5743 
              'bin_pt' => 0,
5744 
              'is_floating_block' => 1,
5745 
              'must_be_hdl_vector' => 1,
5746 
              'period' => 1,
5747 
              'port_id' => 0,
5748 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22/data_out',
5749 
              'type' => 'UFix_32_0',
5750 
            },
5751 
            'direction' => 'in',
5752 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5753 
            'width' => 32,
5754 
          },
5755 
          'from_register23_data_out' => {
5756 
            'attributes' => {
5757 
              'bin_pt' => 0,
5758 
              'is_floating_block' => 1,
5759 
              'must_be_hdl_vector' => 1,
5760 
              'period' => 1,
5761 
              'port_id' => 0,
5762 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23/data_out',
5763 
              'type' => 'UFix_1_0',
5764 
            },
5765 
            'direction' => 'in',
5766 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5767 
            'width' => 1,
5768 
          },
5769 
          'from_register24_data_out' => {
5770 
            'attributes' => {
5771 
              'bin_pt' => 0,
5772 
              'is_floating_block' => 1,
5773 
              'must_be_hdl_vector' => 1,
5774 
              'period' => 1,
5775 
              'port_id' => 0,
5776 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24/data_out',
5777 
              'type' => 'UFix_32_0',
5778 
            },
5779 
            'direction' => 'in',
5780 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5781 
            'width' => 32,
5782 
          },
5783 
          'from_register25_data_out' => {
5784 
            'attributes' => {
5785 
              'bin_pt' => 0,
5786 
              'is_floating_block' => 1,
5787 
              'must_be_hdl_vector' => 1,
5788 
              'period' => 1,
5789 
              'port_id' => 0,
5790 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25/data_out',
5791 
              'type' => 'UFix_1_0',
5792 
            },
5793 
            'direction' => 'in',
5794 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5795 
            'width' => 1,
5796 
          },
5797 
          'from_register26_data_out' => {
5798 
            'attributes' => {
5799 
              'bin_pt' => 0,
5800 
              'is_floating_block' => 1,
5801 
              'must_be_hdl_vector' => 1,
5802 
              'period' => 1,
5803 
              'port_id' => 0,
5804 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26/data_out',
5805 
              'type' => 'UFix_32_0',
5806 
            },
5807 
            'direction' => 'in',
5808 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5809 
            'width' => 32,
5810 
          },
5811 
          'from_register27_data_out' => {
5812 
            'attributes' => {
5813 
              'bin_pt' => 0,
5814 
              'is_floating_block' => 1,
5815 
              'must_be_hdl_vector' => 1,
5816 
              'period' => 1,
5817 
              'port_id' => 0,
5818 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27/data_out',
5819 
              'type' => 'UFix_1_0',
5820 
            },
5821 
            'direction' => 'in',
5822 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5823 
            'width' => 1,
5824 
          },
5825 
          'from_register28_data_out' => {
5826 
            'attributes' => {
5827 
              'bin_pt' => 0,
5828 
              'is_floating_block' => 1,
5829 
              'must_be_hdl_vector' => 1,
5830 
              'period' => 1,
5831 
              'port_id' => 0,
5832 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28/data_out',
5833 
              'type' => 'UFix_32_0',
5834 
            },
5835 
            'direction' => 'in',
5836 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5837 
            'width' => 32,
5838 
          },
5839 
          'from_register29_data_out' => {
5840 
            'attributes' => {
5841 
              'bin_pt' => 0,
5842 
              'is_floating_block' => 1,
5843 
              'must_be_hdl_vector' => 1,
5844 
              'period' => 1,
5845 
              'port_id' => 0,
5846 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29/data_out',
5847 
              'type' => 'UFix_1_0',
5848 
            },
5849 
            'direction' => 'in',
5850 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5851 
            'width' => 1,
5852 
          },
5853 
          'from_register2_data_out' => {
5854 
            'attributes' => {
5855 
              'bin_pt' => 0,
5856 
              'is_floating_block' => 1,
5857 
              'must_be_hdl_vector' => 1,
5858 
              'period' => 1,
5859 
              'port_id' => 0,
5860 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2/data_out',
5861 
              'type' => 'UFix_32_0',
5862 
            },
5863 
            'direction' => 'in',
5864 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5865 
            'width' => 32,
5866 
          },
5867 
          'from_register30_data_out' => {
5868 
            'attributes' => {
5869 
              'bin_pt' => 0,
5870 
              'is_floating_block' => 1,
5871 
              'must_be_hdl_vector' => 1,
5872 
              'period' => 1,
5873 
              'port_id' => 0,
5874 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30/data_out',
5875 
              'type' => 'UFix_32_0',
5876 
            },
5877 
            'direction' => 'in',
5878 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5879 
            'width' => 32,
5880 
          },
5881 
          'from_register31_data_out' => {
5882 
            'attributes' => {
5883 
              'bin_pt' => 0,
5884 
              'is_floating_block' => 1,
5885 
              'must_be_hdl_vector' => 1,
5886 
              'period' => 1,
5887 
              'port_id' => 0,
5888 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31/data_out',
5889 
              'type' => 'UFix_1_0',
5890 
            },
5891 
            'direction' => 'in',
5892 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5893 
            'width' => 1,
5894 
          },
5895 
          'from_register32_data_out' => {
5896 
            'attributes' => {
5897 
              'bin_pt' => 0,
5898 
              'is_floating_block' => 1,
5899 
              'must_be_hdl_vector' => 1,
5900 
              'period' => 1,
5901 
              'port_id' => 0,
5902 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32/data_out',
5903 
              'type' => 'UFix_32_0',
5904 
            },
5905 
            'direction' => 'in',
5906 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5907 
            'width' => 32,
5908 
          },
5909 
          'from_register33_data_out' => {
5910 
            'attributes' => {
5911 
              'bin_pt' => 0,
5912 
              'is_floating_block' => 1,
5913 
              'must_be_hdl_vector' => 1,
5914 
              'period' => 1,
5915 
              'port_id' => 0,
5916 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33/data_out',
5917 
              'type' => 'UFix_1_0',
5918 
            },
5919 
            'direction' => 'in',
5920 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5921 
            'width' => 1,
5922 
          },
5923 
          'from_register3_data_out' => {
5924 
            'attributes' => {
5925 
              'bin_pt' => 0,
5926 
              'is_floating_block' => 1,
5927 
              'must_be_hdl_vector' => 1,
5928 
              'period' => 1,
5929 
              'port_id' => 0,
5930 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3/data_out',
5931 
              'type' => 'UFix_32_0',
5932 
            },
5933 
            'direction' => 'in',
5934 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5935 
            'width' => 32,
5936 
          },
5937 
          'from_register4_data_out' => {
5938 
            'attributes' => {
5939 
              'bin_pt' => 0,
5940 
              'is_floating_block' => 1,
5941 
              'must_be_hdl_vector' => 1,
5942 
              'period' => 1,
5943 
              'port_id' => 0,
5944 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4/data_out',
5945 
              'type' => 'UFix_1_0',
5946 
            },
5947 
            'direction' => 'in',
5948 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5949 
            'width' => 1,
5950 
          },
5951 
          'from_register5_data_out' => {
5952 
            'attributes' => {
5953 
              'bin_pt' => 0,
5954 
              'is_floating_block' => 1,
5955 
              'must_be_hdl_vector' => 1,
5956 
              'period' => 1,
5957 
              'port_id' => 0,
5958 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5/data_out',
5959 
              'type' => 'UFix_32_0',
5960 
            },
5961 
            'direction' => 'in',
5962 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5963 
            'width' => 32,
5964 
          },
5965 
          'from_register6_data_out' => {
5966 
            'attributes' => {
5967 
              'bin_pt' => 0,
5968 
              'is_floating_block' => 1,
5969 
              'must_be_hdl_vector' => 1,
5970 
              'period' => 1,
5971 
              'port_id' => 0,
5972 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6/data_out',
5973 
              'type' => 'UFix_1_0',
5974 
            },
5975 
            'direction' => 'in',
5976 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5977 
            'width' => 1,
5978 
          },
5979 
          'from_register7_data_out' => {
5980 
            'attributes' => {
5981 
              'bin_pt' => 0,
5982 
              'is_floating_block' => 1,
5983 
              'must_be_hdl_vector' => 1,
5984 
              'period' => 1,
5985 
              'port_id' => 0,
5986 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7/data_out',
5987 
              'type' => 'UFix_32_0',
5988 
            },
5989 
            'direction' => 'in',
5990 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5991 
            'width' => 32,
5992 
          },
5993 
          'from_register8_data_out' => {
5994 
            'attributes' => {
5995 
              'bin_pt' => 0,
5996 
              'is_floating_block' => 1,
5997 
              'must_be_hdl_vector' => 1,
5998 
              'period' => 1,
5999 
              'port_id' => 0,
6000 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8/data_out',
6001 
              'type' => 'UFix_1_0',
6002 
            },
6003 
            'direction' => 'in',
6004 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6005 
            'width' => 1,
6006 
          },
6007 
          'from_register9_data_out' => {
6008 
            'attributes' => {
6009 
              'bin_pt' => 0,
6010 
              'is_floating_block' => 1,
6011 
              'must_be_hdl_vector' => 1,
6012 
              'period' => 1,
6013 
              'port_id' => 0,
6014 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9/data_out',
6015 
              'type' => 'UFix_32_0',
6016 
            },
6017 
            'direction' => 'in',
6018 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6019 
            'width' => 32,
6020 
          },
6021 
          'from_register_data_out' => {
6022 
            'attributes' => {
6023 
              'bin_pt' => 0,
6024 
              'is_floating_block' => 1,
6025 
              'must_be_hdl_vector' => 1,
6026 
              'period' => 1,
6027 
              'port_id' => 0,
6028 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register/data_out',
6029 
              'type' => 'UFix_32_0',
6030 
            },
6031 
            'direction' => 'in',
6032 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6033 
            'width' => 32,
6034 
          },
6035 
          'rst_i' => {
6036 
            'attributes' => {
6037 
              'bin_pt' => 0,
6038 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
6039 
              'is_floating_block' => 1,
6040 
              'is_gateway_port' => 1,
6041 
              'must_be_hdl_vector' => 1,
6042 
              'period' => 1,
6043 
              'port_id' => 0,
6044 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i/rst_i',
6045 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i',
6046 
              'timingConstraint' => 'none',
6047 
              'type' => 'Bool',
6048 
            },
6049 
            'direction' => 'in',
6050 
            'hdlType' => 'std_logic',
6051 
            'width' => 1,
6052 
          },
6053 
          'rst_o' => {
6054 
            'attributes' => {
6055 
              'bin_pt' => 0,
6056 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
6057 
              'is_floating_block' => 1,
6058 
              'is_gateway_port' => 1,
6059 
              'must_be_hdl_vector' => 1,
6060 
              'period' => 1,
6061 
              'port_id' => 0,
6062 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o/rst_o',
6063 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o',
6064 
              'timingConstraint' => 'none',
6065 
              'type' => 'Bool',
6066 
            },
6067 
            'direction' => 'out',
6068 
            'hdlType' => 'std_logic',
6069 
            'width' => 1,
6070 
          },
6071 
          'to_register10_ce' => {
6072 
            'attributes' => {
6073 
              'domain' => '',
6074 
              'group' => 1,
6075 
              'isCe' => 1,
6076 
              'is_floating_block' => 1,
6077 
              'period' => 1,
6078 
              'type' => 'logic',
6079 
            },
6080 
            'direction' => 'out',
6081 
            'hdlType' => 'std_logic',
6082 
            'width' => 1,
6083 
          },
6084 
          'to_register10_clk' => {
6085 
            'attributes' => {
6086 
              'domain' => '',
6087 
              'group' => 1,
6088 
              'isClk' => 1,
6089 
              'is_floating_block' => 1,
6090 
              'period' => 1,
6091 
              'type' => 'logic',
6092 
            },
6093 
            'direction' => 'out',
6094 
            'hdlType' => 'std_logic',
6095 
            'width' => 1,
6096 
          },
6097 
          'to_register10_clr' => {
6098 
            'attributes' => {
6099 
              'domain' => '',
6100 
              'group' => 1,
6101 
              'isClr' => 1,
6102 
              'is_floating_block' => 1,
6103 
              'period' => 1,
6104 
              'type' => 'logic',
6105 
              'valid_bit_used' => 0,
6106 
            },
6107 
            'direction' => 'out',
6108 
            'hdlType' => 'std_logic',
6109 
            'width' => 1,
6110 
          },
6111 
          'to_register10_data_in' => {
6112 
            'attributes' => {
6113 
              'bin_pt' => 0,
6114 
              'is_floating_block' => 1,
6115 
              'must_be_hdl_vector' => 1,
6116 
              'period' => 1,
6117 
              'port_id' => 0,
6118 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/data_in',
6119 
              'type' => 'Bool',
6120 
            },
6121 
            'direction' => 'out',
6122 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6123 
            'width' => 1,
6124 
          },
6125 
          'to_register10_dout' => {
6126 
            'attributes' => {
6127 
              'bin_pt' => 0,
6128 
              'is_floating_block' => 1,
6129 
              'must_be_hdl_vector' => 1,
6130 
              'period' => 1,
6131 
              'port_id' => 0,
6132 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/dout',
6133 
              'type' => 'Bool',
6134 
            },
6135 
            'direction' => 'in',
6136 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6137 
            'width' => 1,
6138 
          },
6139 
          'to_register10_en' => {
6140 
            'attributes' => {
6141 
              'bin_pt' => 0,
6142 
              'is_floating_block' => 1,
6143 
              'must_be_hdl_vector' => 1,
6144 
              'period' => 1,
6145 
              'port_id' => 1,
6146 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/en',
6147 
              'type' => 'Bool',
6148 
            },
6149 
            'direction' => 'out',
6150 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6151 
            'width' => 1,
6152 
          },
6153 
          'to_register11_ce' => {
6154 
            'attributes' => {
6155 
              'domain' => '',
6156 
              'group' => 1,
6157 
              'isCe' => 1,
6158 
              'is_floating_block' => 1,
6159 
              'period' => 1,
6160 
              'type' => 'logic',
6161 
            },
6162 
            'direction' => 'out',
6163 
            'hdlType' => 'std_logic',
6164 
            'width' => 1,
6165 
          },
6166 
          'to_register11_clk' => {
6167 
            'attributes' => {
6168 
              'domain' => '',
6169 
              'group' => 1,
6170 
              'isClk' => 1,
6171 
              'is_floating_block' => 1,
6172 
              'period' => 1,
6173 
              'type' => 'logic',
6174 
            },
6175 
            'direction' => 'out',
6176 
            'hdlType' => 'std_logic',
6177 
            'width' => 1,
6178 
          },
6179 
          'to_register11_clr' => {
6180 
            'attributes' => {
6181 
              'domain' => '',
6182 
              'group' => 1,
6183 
              'isClr' => 1,
6184 
              'is_floating_block' => 1,
6185 
              'period' => 1,
6186 
              'type' => 'logic',
6187 
              'valid_bit_used' => 0,
6188 
            },
6189 
            'direction' => 'out',
6190 
            'hdlType' => 'std_logic',
6191 
            'width' => 1,
6192 
          },
6193 
          'to_register11_data_in' => {
6194 
            'attributes' => {
6195 
              'bin_pt' => 0,
6196 
              'is_floating_block' => 1,
6197 
              'must_be_hdl_vector' => 1,
6198 
              'period' => 1,
6199 
              'port_id' => 0,
6200 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/data_in',
6201 
              'type' => 'Bool',
6202 
            },
6203 
            'direction' => 'out',
6204 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6205 
            'width' => 1,
6206 
          },
6207 
          'to_register11_dout' => {
6208 
            'attributes' => {
6209 
              'bin_pt' => 0,
6210 
              'is_floating_block' => 1,
6211 
              'must_be_hdl_vector' => 1,
6212 
              'period' => 1,
6213 
              'port_id' => 0,
6214 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/dout',
6215 
              'type' => 'Bool',
6216 
            },
6217 
            'direction' => 'in',
6218 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6219 
            'width' => 1,
6220 
          },
6221 
          'to_register11_en' => {
6222 
            'attributes' => {
6223 
              'bin_pt' => 0,
6224 
              'is_floating_block' => 1,
6225 
              'must_be_hdl_vector' => 1,
6226 
              'period' => 1,
6227 
              'port_id' => 1,
6228 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/en',
6229 
              'type' => 'Bool',
6230 
            },
6231 
            'direction' => 'out',
6232 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6233 
            'width' => 1,
6234 
          },
6235 
          'to_register12_ce' => {
6236 
            'attributes' => {
6237 
              'domain' => '',
6238 
              'group' => 1,
6239 
              'isCe' => 1,
6240 
              'is_floating_block' => 1,
6241 
              'period' => 1,
6242 
              'type' => 'logic',
6243 
            },
6244 
            'direction' => 'out',
6245 
            'hdlType' => 'std_logic',
6246 
            'width' => 1,
6247 
          },
6248 
          'to_register12_clk' => {
6249 
            'attributes' => {
6250 
              'domain' => '',
6251 
              'group' => 1,
6252 
              'isClk' => 1,
6253 
              'is_floating_block' => 1,
6254 
              'period' => 1,
6255 
              'type' => 'logic',
6256 
            },
6257 
            'direction' => 'out',
6258 
            'hdlType' => 'std_logic',
6259 
            'width' => 1,
6260 
          },
6261 
          'to_register12_clr' => {
6262 
            'attributes' => {
6263 
              'domain' => '',
6264 
              'group' => 1,
6265 
              'isClr' => 1,
6266 
              'is_floating_block' => 1,
6267 
              'period' => 1,
6268 
              'type' => 'logic',
6269 
              'valid_bit_used' => 0,
6270 
            },
6271 
            'direction' => 'out',
6272 
            'hdlType' => 'std_logic',
6273 
            'width' => 1,
6274 
          },
6275 
          'to_register12_data_in' => {
6276 
            'attributes' => {
6277 
              'bin_pt' => 0,
6278 
              'is_floating_block' => 1,
6279 
              'must_be_hdl_vector' => 1,
6280 
              'period' => 1,
6281 
              'port_id' => 0,
6282 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/data_in',
6283 
              'type' => 'Bool',
6284 
            },
6285 
            'direction' => 'out',
6286 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6287 
            'width' => 1,
6288 
          },
6289 
          'to_register12_dout' => {
6290 
            'attributes' => {
6291 
              'bin_pt' => 0,
6292 
              'is_floating_block' => 1,
6293 
              'must_be_hdl_vector' => 1,
6294 
              'period' => 1,
6295 
              'port_id' => 0,
6296 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/dout',
6297 
              'type' => 'Bool',
6298 
            },
6299 
            'direction' => 'in',
6300 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6301 
            'width' => 1,
6302 
          },
6303 
          'to_register12_en' => {
6304 
            'attributes' => {
6305 
              'bin_pt' => 0,
6306 
              'is_floating_block' => 1,
6307 
              'must_be_hdl_vector' => 1,
6308 
              'period' => 1,
6309 
              'port_id' => 1,
6310 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/en',
6311 
              'type' => 'Bool',
6312 
            },
6313 
            'direction' => 'out',
6314 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6315 
            'width' => 1,
6316 
          },
6317 
          'to_register13_ce' => {
6318 
            'attributes' => {
6319 
              'domain' => '',
6320 
              'group' => 1,
6321 
              'isCe' => 1,
6322 
              'is_floating_block' => 1,
6323 
              'period' => 1,
6324 
              'type' => 'logic',
6325 
            },
6326 
            'direction' => 'out',
6327 
            'hdlType' => 'std_logic',
6328 
            'width' => 1,
6329 
          },
6330 
          'to_register13_clk' => {
6331 
            'attributes' => {
6332 
              'domain' => '',
6333 
              'group' => 1,
6334 
              'isClk' => 1,
6335 
              'is_floating_block' => 1,
6336 
              'period' => 1,
6337 
              'type' => 'logic',
6338 
            },
6339 
            'direction' => 'out',
6340 
            'hdlType' => 'std_logic',
6341 
            'width' => 1,
6342 
          },
6343 
          'to_register13_clr' => {
6344 
            'attributes' => {
6345 
              'domain' => '',
6346 
              'group' => 1,
6347 
              'isClr' => 1,
6348 
              'is_floating_block' => 1,
6349 
              'period' => 1,
6350 
              'type' => 'logic',
6351 
              'valid_bit_used' => 0,
6352 
            },
6353 
            'direction' => 'out',
6354 
            'hdlType' => 'std_logic',
6355 
            'width' => 1,
6356 
          },
6357 
          'to_register13_data_in' => {
6358 
            'attributes' => {
6359 
              'bin_pt' => 0,
6360 
              'is_floating_block' => 1,
6361 
              'must_be_hdl_vector' => 1,
6362 
              'period' => 1,
6363 
              'port_id' => 0,
6364 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/data_in',
6365 
              'type' => 'UFix_32_0',
6366 
            },
6367 
            'direction' => 'out',
6368 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6369 
            'width' => 32,
6370 
          },
6371 
          'to_register13_dout' => {
6372 
            'attributes' => {
6373 
              'bin_pt' => 0,
6374 
              'is_floating_block' => 1,
6375 
              'must_be_hdl_vector' => 1,
6376 
              'period' => 1,
6377 
              'port_id' => 0,
6378 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/dout',
6379 
              'type' => 'UFix_32_0',
6380 
            },
6381 
            'direction' => 'in',
6382 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6383 
            'width' => 32,
6384 
          },
6385 
          'to_register13_en' => {
6386 
            'attributes' => {
6387 
              'bin_pt' => 0,
6388 
              'is_floating_block' => 1,
6389 
              'must_be_hdl_vector' => 1,
6390 
              'period' => 1,
6391 
              'port_id' => 1,
6392 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/en',
6393 
              'type' => 'Bool',
6394 
            },
6395 
            'direction' => 'out',
6396 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6397 
            'width' => 1,
6398 
          },
6399 
          'to_register14_ce' => {
6400 
            'attributes' => {
6401 
              'domain' => '',
6402 
              'group' => 1,
6403 
              'isCe' => 1,
6404 
              'is_floating_block' => 1,
6405 
              'period' => 1,
6406 
              'type' => 'logic',
6407 
            },
6408 
            'direction' => 'out',
6409 
            'hdlType' => 'std_logic',
6410 
            'width' => 1,
6411 
          },
6412 
          'to_register14_clk' => {
6413 
            'attributes' => {
6414 
              'domain' => '',
6415 
              'group' => 1,
6416 
              'isClk' => 1,
6417 
              'is_floating_block' => 1,
6418 
              'period' => 1,
6419 
              'type' => 'logic',
6420 
            },
6421 
            'direction' => 'out',
6422 
            'hdlType' => 'std_logic',
6423 
            'width' => 1,
6424 
          },
6425 
          'to_register14_clr' => {
6426 
            'attributes' => {
6427 
              'domain' => '',
6428 
              'group' => 1,
6429 
              'isClr' => 1,
6430 
              'is_floating_block' => 1,
6431 
              'period' => 1,
6432 
              'type' => 'logic',
6433 
              'valid_bit_used' => 0,
6434 
            },
6435 
            'direction' => 'out',
6436 
            'hdlType' => 'std_logic',
6437 
            'width' => 1,
6438 
          },
6439 
          'to_register14_data_in' => {
6440 
            'attributes' => {
6441 
              'bin_pt' => 0,
6442 
              'is_floating_block' => 1,
6443 
              'must_be_hdl_vector' => 1,
6444 
              'period' => 1,
6445 
              'port_id' => 0,
6446 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/data_in',
6447 
              'type' => 'Bool',
6448 
            },
6449 
            'direction' => 'out',
6450 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6451 
            'width' => 1,
6452 
          },
6453 
          'to_register14_dout' => {
6454 
            'attributes' => {
6455 
              'bin_pt' => 0,
6456 
              'is_floating_block' => 1,
6457 
              'must_be_hdl_vector' => 1,
6458 
              'period' => 1,
6459 
              'port_id' => 0,
6460 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/dout',
6461 
              'type' => 'Bool',
6462 
            },
6463 
            'direction' => 'in',
6464 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6465 
            'width' => 1,
6466 
          },
6467 
          'to_register14_en' => {
6468 
            'attributes' => {
6469 
              'bin_pt' => 0,
6470 
              'is_floating_block' => 1,
6471 
              'must_be_hdl_vector' => 1,
6472 
              'period' => 1,
6473 
              'port_id' => 1,
6474 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/en',
6475 
              'type' => 'Bool',
6476 
            },
6477 
            'direction' => 'out',
6478 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6479 
            'width' => 1,
6480 
          },
6481 
          'to_register15_ce' => {
6482 
            'attributes' => {
6483 
              'domain' => '',
6484 
              'group' => 1,
6485 
              'isCe' => 1,
6486 
              'is_floating_block' => 1,
6487 
              'period' => 1,
6488 
              'type' => 'logic',
6489 
            },
6490 
            'direction' => 'out',
6491 
            'hdlType' => 'std_logic',
6492 
            'width' => 1,
6493 
          },
6494 
          'to_register15_clk' => {
6495 
            'attributes' => {
6496 
              'domain' => '',
6497 
              'group' => 1,
6498 
              'isClk' => 1,
6499 
              'is_floating_block' => 1,
6500 
              'period' => 1,
6501 
              'type' => 'logic',
6502 
            },
6503 
            'direction' => 'out',
6504 
            'hdlType' => 'std_logic',
6505 
            'width' => 1,
6506 
          },
6507 
          'to_register15_clr' => {
6508 
            'attributes' => {
6509 
              'domain' => '',
6510 
              'group' => 1,
6511 
              'isClr' => 1,
6512 
              'is_floating_block' => 1,
6513 
              'period' => 1,
6514 
              'type' => 'logic',
6515 
              'valid_bit_used' => 0,
6516 
            },
6517 
            'direction' => 'out',
6518 
            'hdlType' => 'std_logic',
6519 
            'width' => 1,
6520 
          },
6521 
          'to_register15_data_in' => {
6522 
            'attributes' => {
6523 
              'bin_pt' => 0,
6524 
              'is_floating_block' => 1,
6525 
              'must_be_hdl_vector' => 1,
6526 
              'period' => 1,
6527 
              'port_id' => 0,
6528 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/data_in',
6529 
              'type' => 'UFix_32_0',
6530 
            },
6531 
            'direction' => 'out',
6532 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6533 
            'width' => 32,
6534 
          },
6535 
          'to_register15_dout' => {
6536 
            'attributes' => {
6537 
              'bin_pt' => 0,
6538 
              'is_floating_block' => 1,
6539 
              'must_be_hdl_vector' => 1,
6540 
              'period' => 1,
6541 
              'port_id' => 0,
6542 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/dout',
6543 
              'type' => 'UFix_32_0',
6544 
            },
6545 
            'direction' => 'in',
6546 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6547 
            'width' => 32,
6548 
          },
6549 
          'to_register15_en' => {
6550 
            'attributes' => {
6551 
              'bin_pt' => 0,
6552 
              'is_floating_block' => 1,
6553 
              'must_be_hdl_vector' => 1,
6554 
              'period' => 1,
6555 
              'port_id' => 1,
6556 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/en',
6557 
              'type' => 'Bool',
6558 
            },
6559 
            'direction' => 'out',
6560 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6561 
            'width' => 1,
6562 
          },
6563 
          'to_register16_ce' => {
6564 
            'attributes' => {
6565 
              'domain' => '',
6566 
              'group' => 1,
6567 
              'isCe' => 1,
6568 
              'is_floating_block' => 1,
6569 
              'period' => 1,
6570 
              'type' => 'logic',
6571 
            },
6572 
            'direction' => 'out',
6573 
            'hdlType' => 'std_logic',
6574 
            'width' => 1,
6575 
          },
6576 
          'to_register16_clk' => {
6577 
            'attributes' => {
6578 
              'domain' => '',
6579 
              'group' => 1,
6580 
              'isClk' => 1,
6581 
              'is_floating_block' => 1,
6582 
              'period' => 1,
6583 
              'type' => 'logic',
6584 
            },
6585 
            'direction' => 'out',
6586 
            'hdlType' => 'std_logic',
6587 
            'width' => 1,
6588 
          },
6589 
          'to_register16_clr' => {
6590 
            'attributes' => {
6591 
              'domain' => '',
6592 
              'group' => 1,
6593 
              'isClr' => 1,
6594 
              'is_floating_block' => 1,
6595 
              'period' => 1,
6596 
              'type' => 'logic',
6597 
              'valid_bit_used' => 0,
6598 
            },
6599 
            'direction' => 'out',
6600 
            'hdlType' => 'std_logic',
6601 
            'width' => 1,
6602 
          },
6603 
          'to_register16_data_in' => {
6604 
            'attributes' => {
6605 
              'bin_pt' => 0,
6606 
              'is_floating_block' => 1,
6607 
              'must_be_hdl_vector' => 1,
6608 
              'period' => 1,
6609 
              'port_id' => 0,
6610 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/data_in',
6611 
              'type' => 'Bool',
6612 
            },
6613 
            'direction' => 'out',
6614 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6615 
            'width' => 1,
6616 
          },
6617 
          'to_register16_dout' => {
6618 
            'attributes' => {
6619 
              'bin_pt' => 0,
6620 
              'is_floating_block' => 1,
6621 
              'must_be_hdl_vector' => 1,
6622 
              'period' => 1,
6623 
              'port_id' => 0,
6624 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/dout',
6625 
              'type' => 'Bool',
6626 
            },
6627 
            'direction' => 'in',
6628 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6629 
            'width' => 1,
6630 
          },
6631 
          'to_register16_en' => {
6632 
            'attributes' => {
6633 
              'bin_pt' => 0,
6634 
              'is_floating_block' => 1,
6635 
              'must_be_hdl_vector' => 1,
6636 
              'period' => 1,
6637 
              'port_id' => 1,
6638 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/en',
6639 
              'type' => 'Bool',
6640 
            },
6641 
            'direction' => 'out',
6642 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6643 
            'width' => 1,
6644 
          },
6645 
          'to_register17_ce' => {
6646 
            'attributes' => {
6647 
              'domain' => '',
6648 
              'group' => 1,
6649 
              'isCe' => 1,
6650 
              'is_floating_block' => 1,
6651 
              'period' => 1,
6652 
              'type' => 'logic',
6653 
            },
6654 
            'direction' => 'out',
6655 
            'hdlType' => 'std_logic',
6656 
            'width' => 1,
6657 
          },
6658 
          'to_register17_clk' => {
6659 
            'attributes' => {
6660 
              'domain' => '',
6661 
              'group' => 1,
6662 
              'isClk' => 1,
6663 
              'is_floating_block' => 1,
6664 
              'period' => 1,
6665 
              'type' => 'logic',
6666 
            },
6667 
            'direction' => 'out',
6668 
            'hdlType' => 'std_logic',
6669 
            'width' => 1,
6670 
          },
6671 
          'to_register17_clr' => {
6672 
            'attributes' => {
6673 
              'domain' => '',
6674 
              'group' => 1,
6675 
              'isClr' => 1,
6676 
              'is_floating_block' => 1,
6677 
              'period' => 1,
6678 
              'type' => 'logic',
6679 
              'valid_bit_used' => 0,
6680 
            },
6681 
            'direction' => 'out',
6682 
            'hdlType' => 'std_logic',
6683 
            'width' => 1,
6684 
          },
6685 
          'to_register17_data_in' => {
6686 
            'attributes' => {
6687 
              'bin_pt' => 0,
6688 
              'is_floating_block' => 1,
6689 
              'must_be_hdl_vector' => 1,
6690 
              'period' => 1,
6691 
              'port_id' => 0,
6692 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/data_in',
6693 
              'type' => 'UFix_32_0',
6694 
            },
6695 
            'direction' => 'out',
6696 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6697 
            'width' => 32,
6698 
          },
6699 
          'to_register17_dout' => {
6700 
            'attributes' => {
6701 
              'bin_pt' => 0,
6702 
              'is_floating_block' => 1,
6703 
              'must_be_hdl_vector' => 1,
6704 
              'period' => 1,
6705 
              'port_id' => 0,
6706 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/dout',
6707 
              'type' => 'UFix_32_0',
6708 
            },
6709 
            'direction' => 'in',
6710 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6711 
            'width' => 32,
6712 
          },
6713 
          'to_register17_en' => {
6714 
            'attributes' => {
6715 
              'bin_pt' => 0,
6716 
              'is_floating_block' => 1,
6717 
              'must_be_hdl_vector' => 1,
6718 
              'period' => 1,
6719 
              'port_id' => 1,
6720 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/en',
6721 
              'type' => 'Bool',
6722 
            },
6723 
            'direction' => 'out',
6724 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6725 
            'width' => 1,
6726 
          },
6727 
          'to_register18_ce' => {
6728 
            'attributes' => {
6729 
              'domain' => '',
6730 
              'group' => 1,
6731 
              'isCe' => 1,
6732 
              'is_floating_block' => 1,
6733 
              'period' => 1,
6734 
              'type' => 'logic',
6735 
            },
6736 
            'direction' => 'out',
6737 
            'hdlType' => 'std_logic',
6738 
            'width' => 1,
6739 
          },
6740 
          'to_register18_clk' => {
6741 
            'attributes' => {
6742 
              'domain' => '',
6743 
              'group' => 1,
6744 
              'isClk' => 1,
6745 
              'is_floating_block' => 1,
6746 
              'period' => 1,
6747 
              'type' => 'logic',
6748 
            },
6749 
            'direction' => 'out',
6750 
            'hdlType' => 'std_logic',
6751 
            'width' => 1,
6752 
          },
6753 
          'to_register18_clr' => {
6754 
            'attributes' => {
6755 
              'domain' => '',
6756 
              'group' => 1,
6757 
              'isClr' => 1,
6758 
              'is_floating_block' => 1,
6759 
              'period' => 1,
6760 
              'type' => 'logic',
6761 
              'valid_bit_used' => 0,
6762 
            },
6763 
            'direction' => 'out',
6764 
            'hdlType' => 'std_logic',
6765 
            'width' => 1,
6766 
          },
6767 
          'to_register18_data_in' => {
6768 
            'attributes' => {
6769 
              'bin_pt' => 0,
6770 
              'is_floating_block' => 1,
6771 
              'must_be_hdl_vector' => 1,
6772 
              'period' => 1,
6773 
              'port_id' => 0,
6774 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/data_in',
6775 
              'type' => 'Bool',
6776 
            },
6777 
            'direction' => 'out',
6778 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6779 
            'width' => 1,
6780 
          },
6781 
          'to_register18_dout' => {
6782 
            'attributes' => {
6783 
              'bin_pt' => 0,
6784 
              'is_floating_block' => 1,
6785 
              'must_be_hdl_vector' => 1,
6786 
              'period' => 1,
6787 
              'port_id' => 0,
6788 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/dout',
6789 
              'type' => 'Bool',
6790 
            },
6791 
            'direction' => 'in',
6792 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6793 
            'width' => 1,
6794 
          },
6795 
          'to_register18_en' => {
6796 
            'attributes' => {
6797 
              'bin_pt' => 0,
6798 
              'is_floating_block' => 1,
6799 
              'must_be_hdl_vector' => 1,
6800 
              'period' => 1,
6801 
              'port_id' => 1,
6802 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/en',
6803 
              'type' => 'Bool',
6804 
            },
6805 
            'direction' => 'out',
6806 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6807 
            'width' => 1,
6808 
          },
6809 
          'to_register19_ce' => {
6810 
            'attributes' => {
6811 
              'domain' => '',
6812 
              'group' => 1,
6813 
              'isCe' => 1,
6814 
              'is_floating_block' => 1,
6815 
              'period' => 1,
6816 
              'type' => 'logic',
6817 
            },
6818 
            'direction' => 'out',
6819 
            'hdlType' => 'std_logic',
6820 
            'width' => 1,
6821 
          },
6822 
          'to_register19_clk' => {
6823 
            'attributes' => {
6824 
              'domain' => '',
6825 
              'group' => 1,
6826 
              'isClk' => 1,
6827 
              'is_floating_block' => 1,
6828 
              'period' => 1,
6829 
              'type' => 'logic',
6830 
            },
6831 
            'direction' => 'out',
6832 
            'hdlType' => 'std_logic',
6833 
            'width' => 1,
6834 
          },
6835 
          'to_register19_clr' => {
6836 
            'attributes' => {
6837 
              'domain' => '',
6838 
              'group' => 1,
6839 
              'isClr' => 1,
6840 
              'is_floating_block' => 1,
6841 
              'period' => 1,
6842 
              'type' => 'logic',
6843 
              'valid_bit_used' => 0,
6844 
            },
6845 
            'direction' => 'out',
6846 
            'hdlType' => 'std_logic',
6847 
            'width' => 1,
6848 
          },
6849 
          'to_register19_data_in' => {
6850 
            'attributes' => {
6851 
              'bin_pt' => 0,
6852 
              'is_floating_block' => 1,
6853 
              'must_be_hdl_vector' => 1,
6854 
              'period' => 1,
6855 
              'port_id' => 0,
6856 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/data_in',
6857 
              'type' => 'UFix_32_0',
6858 
            },
6859 
            'direction' => 'out',
6860 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6861 
            'width' => 32,
6862 
          },
6863 
          'to_register19_dout' => {
6864 
            'attributes' => {
6865 
              'bin_pt' => 0,
6866 
              'is_floating_block' => 1,
6867 
              'must_be_hdl_vector' => 1,
6868 
              'period' => 1,
6869 
              'port_id' => 0,
6870 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/dout',
6871 
              'type' => 'UFix_32_0',
6872 
            },
6873 
            'direction' => 'in',
6874 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6875 
            'width' => 32,
6876 
          },
6877 
          'to_register19_en' => {
6878 
            'attributes' => {
6879 
              'bin_pt' => 0,
6880 
              'is_floating_block' => 1,
6881 
              'must_be_hdl_vector' => 1,
6882 
              'period' => 1,
6883 
              'port_id' => 1,
6884 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/en',
6885 
              'type' => 'Bool',
6886 
            },
6887 
            'direction' => 'out',
6888 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6889 
            'width' => 1,
6890 
          },
6891 
          'to_register1_ce' => {
6892 
            'attributes' => {
6893 
              'domain' => '',
6894 
              'group' => 1,
6895 
              'isCe' => 1,
6896 
              'is_floating_block' => 1,
6897 
              'period' => 1,
6898 
              'type' => 'logic',
6899 
            },
6900 
            'direction' => 'out',
6901 
            'hdlType' => 'std_logic',
6902 
            'width' => 1,
6903 
          },
6904 
          'to_register1_clk' => {
6905 
            'attributes' => {
6906 
              'domain' => '',
6907 
              'group' => 1,
6908 
              'isClk' => 1,
6909 
              'is_floating_block' => 1,
6910 
              'period' => 1,
6911 
              'type' => 'logic',
6912 
            },
6913 
            'direction' => 'out',
6914 
            'hdlType' => 'std_logic',
6915 
            'width' => 1,
6916 
          },
6917 
          'to_register1_clr' => {
6918 
            'attributes' => {
6919 
              'domain' => '',
6920 
              'group' => 1,
6921 
              'isClr' => 1,
6922 
              'is_floating_block' => 1,
6923 
              'period' => 1,
6924 
              'type' => 'logic',
6925 
              'valid_bit_used' => 0,
6926 
            },
6927 
            'direction' => 'out',
6928 
            'hdlType' => 'std_logic',
6929 
            'width' => 1,
6930 
          },
6931 
          'to_register1_data_in' => {
6932 
            'attributes' => {
6933 
              'bin_pt' => 0,
6934 
              'is_floating_block' => 1,
6935 
              'must_be_hdl_vector' => 1,
6936 
              'period' => 1,
6937 
              'port_id' => 0,
6938 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/data_in',
6939 
              'type' => 'Bool',
6940 
            },
6941 
            'direction' => 'out',
6942 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6943 
            'width' => 1,
6944 
          },
6945 
          'to_register1_dout' => {
6946 
            'attributes' => {
6947 
              'bin_pt' => 0,
6948 
              'is_floating_block' => 1,
6949 
              'must_be_hdl_vector' => 1,
6950 
              'period' => 1,
6951 
              'port_id' => 0,
6952 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/dout',
6953 
              'type' => 'Bool',
6954 
            },
6955 
            'direction' => 'in',
6956 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6957 
            'width' => 1,
6958 
          },
6959 
          'to_register1_en' => {
6960 
            'attributes' => {
6961 
              'bin_pt' => 0,
6962 
              'is_floating_block' => 1,
6963 
              'must_be_hdl_vector' => 1,
6964 
              'period' => 1,
6965 
              'port_id' => 1,
6966 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/en',
6967 
              'type' => 'Bool',
6968 
            },
6969 
            'direction' => 'out',
6970 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6971 
            'width' => 1,
6972 
          },
6973 
          'to_register20_ce' => {
6974 
            'attributes' => {
6975 
              'domain' => '',
6976 
              'group' => 1,
6977 
              'isCe' => 1,
6978 
              'is_floating_block' => 1,
6979 
              'period' => 1,
6980 
              'type' => 'logic',
6981 
            },
6982 
            'direction' => 'out',
6983 
            'hdlType' => 'std_logic',
6984 
            'width' => 1,
6985 
          },
6986 
          'to_register20_clk' => {
6987 
            'attributes' => {
6988 
              'domain' => '',
6989 
              'group' => 1,
6990 
              'isClk' => 1,
6991 
              'is_floating_block' => 1,
6992 
              'period' => 1,
6993 
              'type' => 'logic',
6994 
            },
6995 
            'direction' => 'out',
6996 
            'hdlType' => 'std_logic',
6997 
            'width' => 1,
6998 
          },
6999 
          'to_register20_clr' => {
7000 
            'attributes' => {
7001 
              'domain' => '',
7002 
              'group' => 1,
7003 
              'isClr' => 1,
7004 
              'is_floating_block' => 1,
7005 
              'period' => 1,
7006 
              'type' => 'logic',
7007 
              'valid_bit_used' => 0,
7008 
            },
7009 
            'direction' => 'out',
7010 
            'hdlType' => 'std_logic',
7011 
            'width' => 1,
7012 
          },
7013 
          'to_register20_data_in' => {
7014 
            'attributes' => {
7015 
              'bin_pt' => 0,
7016 
              'is_floating_block' => 1,
7017 
              'must_be_hdl_vector' => 1,
7018 
              'period' => 1,
7019 
              'port_id' => 0,
7020 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/data_in',
7021 
              'type' => 'Bool',
7022 
            },
7023 
            'direction' => 'out',
7024 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7025 
            'width' => 1,
7026 
          },
7027 
          'to_register20_dout' => {
7028 
            'attributes' => {
7029 
              'bin_pt' => 0,
7030 
              'is_floating_block' => 1,
7031 
              'must_be_hdl_vector' => 1,
7032 
              'period' => 1,
7033 
              'port_id' => 0,
7034 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/dout',
7035 
              'type' => 'Bool',
7036 
            },
7037 
            'direction' => 'in',
7038 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7039 
            'width' => 1,
7040 
          },
7041 
          'to_register20_en' => {
7042 
            'attributes' => {
7043 
              'bin_pt' => 0,
7044 
              'is_floating_block' => 1,
7045 
              'must_be_hdl_vector' => 1,
7046 
              'period' => 1,
7047 
              'port_id' => 1,
7048 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/en',
7049 
              'type' => 'Bool',
7050 
            },
7051 
            'direction' => 'out',
7052 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7053 
            'width' => 1,
7054 
          },
7055 
          'to_register21_ce' => {
7056 
            'attributes' => {
7057 
              'domain' => '',
7058 
              'group' => 1,
7059 
              'isCe' => 1,
7060 
              'is_floating_block' => 1,
7061 
              'period' => 1,
7062 
              'type' => 'logic',
7063 
            },
7064 
            'direction' => 'out',
7065 
            'hdlType' => 'std_logic',
7066 
            'width' => 1,
7067 
          },
7068 
          'to_register21_clk' => {
7069 
            'attributes' => {
7070 
              'domain' => '',
7071 
              'group' => 1,
7072 
              'isClk' => 1,
7073 
              'is_floating_block' => 1,
7074 
              'period' => 1,
7075 
              'type' => 'logic',
7076 
            },
7077 
            'direction' => 'out',
7078 
            'hdlType' => 'std_logic',
7079 
            'width' => 1,
7080 
          },
7081 
          'to_register21_clr' => {
7082 
            'attributes' => {
7083 
              'domain' => '',
7084 
              'group' => 1,
7085 
              'isClr' => 1,
7086 
              'is_floating_block' => 1,
7087 
              'period' => 1,
7088 
              'type' => 'logic',
7089 
              'valid_bit_used' => 0,
7090 
            },
7091 
            'direction' => 'out',
7092 
            'hdlType' => 'std_logic',
7093 
            'width' => 1,
7094 
          },
7095 
          'to_register21_data_in' => {
7096 
            'attributes' => {
7097 
              'bin_pt' => 0,
7098 
              'is_floating_block' => 1,
7099 
              'must_be_hdl_vector' => 1,
7100 
              'period' => 1,
7101 
              'port_id' => 0,
7102 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/data_in',
7103 
              'type' => 'UFix_32_0',
7104 
            },
7105 
            'direction' => 'out',
7106 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7107 
            'width' => 32,
7108 
          },
7109 
          'to_register21_dout' => {
7110 
            'attributes' => {
7111 
              'bin_pt' => 0,
7112 
              'is_floating_block' => 1,
7113 
              'must_be_hdl_vector' => 1,
7114 
              'period' => 1,
7115 
              'port_id' => 0,
7116 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/dout',
7117 
              'type' => 'UFix_32_0',
7118 
            },
7119 
            'direction' => 'in',
7120 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7121 
            'width' => 32,
7122 
          },
7123 
          'to_register21_en' => {
7124 
            'attributes' => {
7125 
              'bin_pt' => 0,
7126 
              'is_floating_block' => 1,
7127 
              'must_be_hdl_vector' => 1,
7128 
              'period' => 1,
7129 
              'port_id' => 1,
7130 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/en',
7131 
              'type' => 'Bool',
7132 
            },
7133 
            'direction' => 'out',
7134 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7135 
            'width' => 1,
7136 
          },
7137 
          'to_register22_ce' => {
7138 
            'attributes' => {
7139 
              'domain' => '',
7140 
              'group' => 1,
7141 
              'isCe' => 1,
7142 
              'is_floating_block' => 1,
7143 
              'period' => 1,
7144 
              'type' => 'logic',
7145 
            },
7146 
            'direction' => 'out',
7147 
            'hdlType' => 'std_logic',
7148 
            'width' => 1,
7149 
          },
7150 
          'to_register22_clk' => {
7151 
            'attributes' => {
7152 
              'domain' => '',
7153 
              'group' => 1,
7154 
              'isClk' => 1,
7155 
              'is_floating_block' => 1,
7156 
              'period' => 1,
7157 
              'type' => 'logic',
7158 
            },
7159 
            'direction' => 'out',
7160 
            'hdlType' => 'std_logic',
7161 
            'width' => 1,
7162 
          },
7163 
          'to_register22_clr' => {
7164 
            'attributes' => {
7165 
              'domain' => '',
7166 
              'group' => 1,
7167 
              'isClr' => 1,
7168 
              'is_floating_block' => 1,
7169 
              'period' => 1,
7170 
              'type' => 'logic',
7171 
              'valid_bit_used' => 0,
7172 
            },
7173 
            'direction' => 'out',
7174 
            'hdlType' => 'std_logic',
7175 
            'width' => 1,
7176 
          },
7177 
          'to_register22_data_in' => {
7178 
            'attributes' => {
7179 
              'bin_pt' => 0,
7180 
              'is_floating_block' => 1,
7181 
              'must_be_hdl_vector' => 1,
7182 
              'period' => 1,
7183 
              'port_id' => 0,
7184 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/data_in',
7185 
              'type' => 'Bool',
7186 
            },
7187 
            'direction' => 'out',
7188 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7189 
            'width' => 1,
7190 
          },
7191 
          'to_register22_dout' => {
7192 
            'attributes' => {
7193 
              'bin_pt' => 0,
7194 
              'is_floating_block' => 1,
7195 
              'must_be_hdl_vector' => 1,
7196 
              'period' => 1,
7197 
              'port_id' => 0,
7198 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/dout',
7199 
              'type' => 'Bool',
7200 
            },
7201 
            'direction' => 'in',
7202 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7203 
            'width' => 1,
7204 
          },
7205 
          'to_register22_en' => {
7206 
            'attributes' => {
7207 
              'bin_pt' => 0,
7208 
              'is_floating_block' => 1,
7209 
              'must_be_hdl_vector' => 1,
7210 
              'period' => 1,
7211 
              'port_id' => 1,
7212 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/en',
7213 
              'type' => 'Bool',
7214 
            },
7215 
            'direction' => 'out',
7216 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7217 
            'width' => 1,
7218 
          },
7219 
          'to_register23_ce' => {
7220 
            'attributes' => {
7221 
              'domain' => '',
7222 
              'group' => 1,
7223 
              'isCe' => 1,
7224 
              'is_floating_block' => 1,
7225 
              'period' => 1,
7226 
              'type' => 'logic',
7227 
            },
7228 
            'direction' => 'out',
7229 
            'hdlType' => 'std_logic',
7230 
            'width' => 1,
7231 
          },
7232 
          'to_register23_clk' => {
7233 
            'attributes' => {
7234 
              'domain' => '',
7235 
              'group' => 1,
7236 
              'isClk' => 1,
7237 
              'is_floating_block' => 1,
7238 
              'period' => 1,
7239 
              'type' => 'logic',
7240 
            },
7241 
            'direction' => 'out',
7242 
            'hdlType' => 'std_logic',
7243 
            'width' => 1,
7244 
          },
7245 
          'to_register23_clr' => {
7246 
            'attributes' => {
7247 
              'domain' => '',
7248 
              'group' => 1,
7249 
              'isClr' => 1,
7250 
              'is_floating_block' => 1,
7251 
              'period' => 1,
7252 
              'type' => 'logic',
7253 
              'valid_bit_used' => 0,
7254 
            },
7255 
            'direction' => 'out',
7256 
            'hdlType' => 'std_logic',
7257 
            'width' => 1,
7258 
          },
7259 
          'to_register23_data_in' => {
7260 
            'attributes' => {
7261 
              'bin_pt' => 0,
7262 
              'is_floating_block' => 1,
7263 
              'must_be_hdl_vector' => 1,
7264 
              'period' => 1,
7265 
              'port_id' => 0,
7266 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/data_in',
7267 
              'type' => 'UFix_32_0',
7268 
            },
7269 
            'direction' => 'out',
7270 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7271 
            'width' => 32,
7272 
          },
7273 
          'to_register23_dout' => {
7274 
            'attributes' => {
7275 
              'bin_pt' => 0,
7276 
              'is_floating_block' => 1,
7277 
              'must_be_hdl_vector' => 1,
7278 
              'period' => 1,
7279 
              'port_id' => 0,
7280 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/dout',
7281 
              'type' => 'UFix_32_0',
7282 
            },
7283 
            'direction' => 'in',
7284 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7285 
            'width' => 32,
7286 
          },
7287 
          'to_register23_en' => {
7288 
            'attributes' => {
7289 
              'bin_pt' => 0,
7290 
              'is_floating_block' => 1,
7291 
              'must_be_hdl_vector' => 1,
7292 
              'period' => 1,
7293 
              'port_id' => 1,
7294 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/en',
7295 
              'type' => 'Bool',
7296 
            },
7297 
            'direction' => 'out',
7298 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7299 
            'width' => 1,
7300 
          },
7301 
          'to_register24_ce' => {
7302 
            'attributes' => {
7303 
              'domain' => '',
7304 
              'group' => 1,
7305 
              'isCe' => 1,
7306 
              'is_floating_block' => 1,
7307 
              'period' => 1,
7308 
              'type' => 'logic',
7309 
            },
7310 
            'direction' => 'out',
7311 
            'hdlType' => 'std_logic',
7312 
            'width' => 1,
7313 
          },
7314 
          'to_register24_clk' => {
7315 
            'attributes' => {
7316 
              'domain' => '',
7317 
              'group' => 1,
7318 
              'isClk' => 1,
7319 
              'is_floating_block' => 1,
7320 
              'period' => 1,
7321 
              'type' => 'logic',
7322 
            },
7323 
            'direction' => 'out',
7324 
            'hdlType' => 'std_logic',
7325 
            'width' => 1,
7326 
          },
7327 
          'to_register24_clr' => {
7328 
            'attributes' => {
7329 
              'domain' => '',
7330 
              'group' => 1,
7331 
              'isClr' => 1,
7332 
              'is_floating_block' => 1,
7333 
              'period' => 1,
7334 
              'type' => 'logic',
7335 
              'valid_bit_used' => 0,
7336 
            },
7337 
            'direction' => 'out',
7338 
            'hdlType' => 'std_logic',
7339 
            'width' => 1,
7340 
          },
7341 
          'to_register24_data_in' => {
7342 
            'attributes' => {
7343 
              'bin_pt' => 0,
7344 
              'is_floating_block' => 1,
7345 
              'must_be_hdl_vector' => 1,
7346 
              'period' => 1,
7347 
              'port_id' => 0,
7348 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/data_in',
7349 
              'type' => 'Bool',
7350 
            },
7351 
            'direction' => 'out',
7352 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7353 
            'width' => 1,
7354 
          },
7355 
          'to_register24_dout' => {
7356 
            'attributes' => {
7357 
              'bin_pt' => 0,
7358 
              'is_floating_block' => 1,
7359 
              'must_be_hdl_vector' => 1,
7360 
              'period' => 1,
7361 
              'port_id' => 0,
7362 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/dout',
7363 
              'type' => 'Bool',
7364 
            },
7365 
            'direction' => 'in',
7366 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7367 
            'width' => 1,
7368 
          },
7369 
          'to_register24_en' => {
7370 
            'attributes' => {
7371 
              'bin_pt' => 0,
7372 
              'is_floating_block' => 1,
7373 
              'must_be_hdl_vector' => 1,
7374 
              'period' => 1,
7375 
              'port_id' => 1,
7376 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/en',
7377 
              'type' => 'Bool',
7378 
            },
7379 
            'direction' => 'out',
7380 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7381 
            'width' => 1,
7382 
          },
7383 
          'to_register25_ce' => {
7384 
            'attributes' => {
7385 
              'domain' => '',
7386 
              'group' => 1,
7387 
              'isCe' => 1,
7388 
              'is_floating_block' => 1,
7389 
              'period' => 1,
7390 
              'type' => 'logic',
7391 
            },
7392 
            'direction' => 'out',
7393 
            'hdlType' => 'std_logic',
7394 
            'width' => 1,
7395 
          },
7396 
          'to_register25_clk' => {
7397 
            'attributes' => {
7398 
              'domain' => '',
7399 
              'group' => 1,
7400 
              'isClk' => 1,
7401 
              'is_floating_block' => 1,
7402 
              'period' => 1,
7403 
              'type' => 'logic',
7404 
            },
7405 
            'direction' => 'out',
7406 
            'hdlType' => 'std_logic',
7407 
            'width' => 1,
7408 
          },
7409 
          'to_register25_clr' => {
7410 
            'attributes' => {
7411 
              'domain' => '',
7412 
              'group' => 1,
7413 
              'isClr' => 1,
7414 
              'is_floating_block' => 1,
7415 
              'period' => 1,
7416 
              'type' => 'logic',
7417 
              'valid_bit_used' => 0,
7418 
            },
7419 
            'direction' => 'out',
7420 
            'hdlType' => 'std_logic',
7421 
            'width' => 1,
7422 
          },
7423 
          'to_register25_data_in' => {
7424 
            'attributes' => {
7425 
              'bin_pt' => 0,
7426 
              'is_floating_block' => 1,
7427 
              'must_be_hdl_vector' => 1,
7428 
              'period' => 1,
7429 
              'port_id' => 0,
7430 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/data_in',
7431 
              'type' => 'UFix_32_0',
7432 
            },
7433 
            'direction' => 'out',
7434 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7435 
            'width' => 32,
7436 
          },
7437 
          'to_register25_dout' => {
7438 
            'attributes' => {
7439 
              'bin_pt' => 0,
7440 
              'is_floating_block' => 1,
7441 
              'must_be_hdl_vector' => 1,
7442 
              'period' => 1,
7443 
              'port_id' => 0,
7444 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/dout',
7445 
              'type' => 'UFix_32_0',
7446 
            },
7447 
            'direction' => 'in',
7448 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7449 
            'width' => 32,
7450 
          },
7451 
          'to_register25_en' => {
7452 
            'attributes' => {
7453 
              'bin_pt' => 0,
7454 
              'is_floating_block' => 1,
7455 
              'must_be_hdl_vector' => 1,
7456 
              'period' => 1,
7457 
              'port_id' => 1,
7458 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/en',
7459 
              'type' => 'Bool',
7460 
            },
7461 
            'direction' => 'out',
7462 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7463 
            'width' => 1,
7464 
          },
7465 
          'to_register26_ce' => {
7466 
            'attributes' => {
7467 
              'domain' => '',
7468 
              'group' => 1,
7469 
              'isCe' => 1,
7470 
              'is_floating_block' => 1,
7471 
              'period' => 1,
7472 
              'type' => 'logic',
7473 
            },
7474 
            'direction' => 'out',
7475 
            'hdlType' => 'std_logic',
7476 
            'width' => 1,
7477 
          },
7478 
          'to_register26_clk' => {
7479 
            'attributes' => {
7480 
              'domain' => '',
7481 
              'group' => 1,
7482 
              'isClk' => 1,
7483 
              'is_floating_block' => 1,
7484 
              'period' => 1,
7485 
              'type' => 'logic',
7486 
            },
7487 
            'direction' => 'out',
7488 
            'hdlType' => 'std_logic',
7489 
            'width' => 1,
7490 
          },
7491 
          'to_register26_clr' => {
7492 
            'attributes' => {
7493 
              'domain' => '',
7494 
              'group' => 1,
7495 
              'isClr' => 1,
7496 
              'is_floating_block' => 1,
7497 
              'period' => 1,
7498 
              'type' => 'logic',
7499 
              'valid_bit_used' => 0,
7500 
            },
7501 
            'direction' => 'out',
7502 
            'hdlType' => 'std_logic',
7503 
            'width' => 1,
7504 
          },
7505 
          'to_register26_data_in' => {
7506 
            'attributes' => {
7507 
              'bin_pt' => 0,
7508 
              'is_floating_block' => 1,
7509 
              'must_be_hdl_vector' => 1,
7510 
              'period' => 1,
7511 
              'port_id' => 0,
7512 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/data_in',
7513 
              'type' => 'Bool',
7514 
            },
7515 
            'direction' => 'out',
7516 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7517 
            'width' => 1,
7518 
          },
7519 
          'to_register26_dout' => {
7520 
            'attributes' => {
7521 
              'bin_pt' => 0,
7522 
              'is_floating_block' => 1,
7523 
              'must_be_hdl_vector' => 1,
7524 
              'period' => 1,
7525 
              'port_id' => 0,
7526 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/dout',
7527 
              'type' => 'Bool',
7528 
            },
7529 
            'direction' => 'in',
7530 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7531 
            'width' => 1,
7532 
          },
7533 
          'to_register26_en' => {
7534 
            'attributes' => {
7535 
              'bin_pt' => 0,
7536 
              'is_floating_block' => 1,
7537 
              'must_be_hdl_vector' => 1,
7538 
              'period' => 1,
7539 
              'port_id' => 1,
7540 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/en',
7541 
              'type' => 'Bool',
7542 
            },
7543 
            'direction' => 'out',
7544 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7545 
            'width' => 1,
7546 
          },
7547 
          'to_register27_ce' => {
7548 
            'attributes' => {
7549 
              'domain' => '',
7550 
              'group' => 1,
7551 
              'isCe' => 1,
7552 
              'is_floating_block' => 1,
7553 
              'period' => 1,
7554 
              'type' => 'logic',
7555 
            },
7556 
            'direction' => 'out',
7557 
            'hdlType' => 'std_logic',
7558 
            'width' => 1,
7559 
          },
7560 
          'to_register27_clk' => {
7561 
            'attributes' => {
7562 
              'domain' => '',
7563 
              'group' => 1,
7564 
              'isClk' => 1,
7565 
              'is_floating_block' => 1,
7566 
              'period' => 1,
7567 
              'type' => 'logic',
7568 
            },
7569 
            'direction' => 'out',
7570 
            'hdlType' => 'std_logic',
7571 
            'width' => 1,
7572 
          },
7573 
          'to_register27_clr' => {
7574 
            'attributes' => {
7575 
              'domain' => '',
7576 
              'group' => 1,
7577 
              'isClr' => 1,
7578 
              'is_floating_block' => 1,
7579 
              'period' => 1,
7580 
              'type' => 'logic',
7581 
              'valid_bit_used' => 0,
7582 
            },
7583 
            'direction' => 'out',
7584 
            'hdlType' => 'std_logic',
7585 
            'width' => 1,
7586 
          },
7587 
          'to_register27_data_in' => {
7588 
            'attributes' => {
7589 
              'bin_pt' => 0,
7590 
              'is_floating_block' => 1,
7591 
              'must_be_hdl_vector' => 1,
7592 
              'period' => 1,
7593 
              'port_id' => 0,
7594 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/data_in',
7595 
              'type' => 'UFix_32_0',
7596 
            },
7597 
            'direction' => 'out',
7598 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7599 
            'width' => 32,
7600 
          },
7601 
          'to_register27_dout' => {
7602 
            'attributes' => {
7603 
              'bin_pt' => 0,
7604 
              'is_floating_block' => 1,
7605 
              'must_be_hdl_vector' => 1,
7606 
              'period' => 1,
7607 
              'port_id' => 0,
7608 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/dout',
7609 
              'type' => 'UFix_32_0',
7610 
            },
7611 
            'direction' => 'in',
7612 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7613 
            'width' => 32,
7614 
          },
7615 
          'to_register27_en' => {
7616 
            'attributes' => {
7617 
              'bin_pt' => 0,
7618 
              'is_floating_block' => 1,
7619 
              'must_be_hdl_vector' => 1,
7620 
              'period' => 1,
7621 
              'port_id' => 1,
7622 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/en',
7623 
              'type' => 'Bool',
7624 
            },
7625 
            'direction' => 'out',
7626 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7627 
            'width' => 1,
7628 
          },
7629 
          'to_register2_ce' => {
7630 
            'attributes' => {
7631 
              'domain' => '',
7632 
              'group' => 1,
7633 
              'isCe' => 1,
7634 
              'is_floating_block' => 1,
7635 
              'period' => 1,
7636 
              'type' => 'logic',
7637 
            },
7638 
            'direction' => 'out',
7639 
            'hdlType' => 'std_logic',
7640 
            'width' => 1,
7641 
          },
7642 
          'to_register2_clk' => {
7643 
            'attributes' => {
7644 
              'domain' => '',
7645 
              'group' => 1,
7646 
              'isClk' => 1,
7647 
              'is_floating_block' => 1,
7648 
              'period' => 1,
7649 
              'type' => 'logic',
7650 
            },
7651 
            'direction' => 'out',
7652 
            'hdlType' => 'std_logic',
7653 
            'width' => 1,
7654 
          },
7655 
          'to_register2_clr' => {
7656 
            'attributes' => {
7657 
              'domain' => '',
7658 
              'group' => 1,
7659 
              'isClr' => 1,
7660 
              'is_floating_block' => 1,
7661 
              'period' => 1,
7662 
              'type' => 'logic',
7663 
              'valid_bit_used' => 0,
7664 
            },
7665 
            'direction' => 'out',
7666 
            'hdlType' => 'std_logic',
7667 
            'width' => 1,
7668 
          },
7669 
          'to_register2_data_in' => {
7670 
            'attributes' => {
7671 
              'bin_pt' => 0,
7672 
              'is_floating_block' => 1,
7673 
              'must_be_hdl_vector' => 1,
7674 
              'period' => 1,
7675 
              'port_id' => 0,
7676 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/data_in',
7677 
              'type' => 'UFix_32_0',
7678 
            },
7679 
            'direction' => 'out',
7680 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7681 
            'width' => 32,
7682 
          },
7683 
          'to_register2_dout' => {
7684 
            'attributes' => {
7685 
              'bin_pt' => 0,
7686 
              'is_floating_block' => 1,
7687 
              'must_be_hdl_vector' => 1,
7688 
              'period' => 1,
7689 
              'port_id' => 0,
7690 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/dout',
7691 
              'type' => 'UFix_32_0',
7692 
            },
7693 
            'direction' => 'in',
7694 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7695 
            'width' => 32,
7696 
          },
7697 
          'to_register2_en' => {
7698 
            'attributes' => {
7699 
              'bin_pt' => 0,
7700 
              'is_floating_block' => 1,
7701 
              'must_be_hdl_vector' => 1,
7702 
              'period' => 1,
7703 
              'port_id' => 1,
7704 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/en',
7705 
              'type' => 'Bool',
7706 
            },
7707 
            'direction' => 'out',
7708 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7709 
            'width' => 1,
7710 
          },
7711 
          'to_register3_ce' => {
7712 
            'attributes' => {
7713 
              'domain' => '',
7714 
              'group' => 1,
7715 
              'isCe' => 1,
7716 
              'is_floating_block' => 1,
7717 
              'period' => 1,
7718 
              'type' => 'logic',
7719 
            },
7720 
            'direction' => 'out',
7721 
            'hdlType' => 'std_logic',
7722 
            'width' => 1,
7723 
          },
7724 
          'to_register3_clk' => {
7725 
            'attributes' => {
7726 
              'domain' => '',
7727 
              'group' => 1,
7728 
              'isClk' => 1,
7729 
              'is_floating_block' => 1,
7730 
              'period' => 1,
7731 
              'type' => 'logic',
7732 
            },
7733 
            'direction' => 'out',
7734 
            'hdlType' => 'std_logic',
7735 
            'width' => 1,
7736 
          },
7737 
          'to_register3_clr' => {
7738 
            'attributes' => {
7739 
              'domain' => '',
7740 
              'group' => 1,
7741 
              'isClr' => 1,
7742 
              'is_floating_block' => 1,
7743 
              'period' => 1,
7744 
              'type' => 'logic',
7745 
              'valid_bit_used' => 0,
7746 
            },
7747 
            'direction' => 'out',
7748 
            'hdlType' => 'std_logic',
7749 
            'width' => 1,
7750 
          },
7751 
          'to_register3_data_in' => {
7752 
            'attributes' => {
7753 
              'bin_pt' => 0,
7754 
              'is_floating_block' => 1,
7755 
              'must_be_hdl_vector' => 1,
7756 
              'period' => 1,
7757 
              'port_id' => 0,
7758 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/data_in',
7759 
              'type' => 'UFix_32_0',
7760 
            },
7761 
            'direction' => 'out',
7762 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7763 
            'width' => 32,
7764 
          },
7765 
          'to_register3_dout' => {
7766 
            'attributes' => {
7767 
              'bin_pt' => 0,
7768 
              'is_floating_block' => 1,
7769 
              'must_be_hdl_vector' => 1,
7770 
              'period' => 1,
7771 
              'port_id' => 0,
7772 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/dout',
7773 
              'type' => 'UFix_32_0',
7774 
            },
7775 
            'direction' => 'in',
7776 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7777 
            'width' => 32,
7778 
          },
7779 
          'to_register3_en' => {
7780 
            'attributes' => {
7781 
              'bin_pt' => 0,
7782 
              'is_floating_block' => 1,
7783 
              'must_be_hdl_vector' => 1,
7784 
              'period' => 1,
7785 
              'port_id' => 1,
7786 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/en',
7787 
              'type' => 'Bool',
7788 
            },
7789 
            'direction' => 'out',
7790 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7791 
            'width' => 1,
7792 
          },
7793 
          'to_register4_ce' => {
7794 
            'attributes' => {
7795 
              'domain' => '',
7796 
              'group' => 1,
7797 
              'isCe' => 1,
7798 
              'is_floating_block' => 1,
7799 
              'period' => 1,
7800 
              'type' => 'logic',
7801 
            },
7802 
            'direction' => 'out',
7803 
            'hdlType' => 'std_logic',
7804 
            'width' => 1,
7805 
          },
7806 
          'to_register4_clk' => {
7807 
            'attributes' => {
7808 
              'domain' => '',
7809 
              'group' => 1,
7810 
              'isClk' => 1,
7811 
              'is_floating_block' => 1,
7812 
              'period' => 1,
7813 
              'type' => 'logic',
7814 
            },
7815 
            'direction' => 'out',
7816 
            'hdlType' => 'std_logic',
7817 
            'width' => 1,
7818 
          },
7819 
          'to_register4_clr' => {
7820 
            'attributes' => {
7821 
              'domain' => '',
7822 
              'group' => 1,
7823 
              'isClr' => 1,
7824 
              'is_floating_block' => 1,
7825 
              'period' => 1,
7826 
              'type' => 'logic',
7827 
              'valid_bit_used' => 0,
7828 
            },
7829 
            'direction' => 'out',
7830 
            'hdlType' => 'std_logic',
7831 
            'width' => 1,
7832 
          },
7833 
          'to_register4_data_in' => {
7834 
            'attributes' => {
7835 
              'bin_pt' => 0,
7836 
              'is_floating_block' => 1,
7837 
              'must_be_hdl_vector' => 1,
7838 
              'period' => 1,
7839 
              'port_id' => 0,
7840 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/data_in',
7841 
              'type' => 'Bool',
7842 
            },
7843 
            'direction' => 'out',
7844 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7845 
            'width' => 1,
7846 
          },
7847 
          'to_register4_dout' => {
7848 
            'attributes' => {
7849 
              'bin_pt' => 0,
7850 
              'is_floating_block' => 1,
7851 
              'must_be_hdl_vector' => 1,
7852 
              'period' => 1,
7853 
              'port_id' => 0,
7854 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/dout',
7855 
              'type' => 'Bool',
7856 
            },
7857 
            'direction' => 'in',
7858 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7859 
            'width' => 1,
7860 
          },
7861 
          'to_register4_en' => {
7862 
            'attributes' => {
7863 
              'bin_pt' => 0,
7864 
              'is_floating_block' => 1,
7865 
              'must_be_hdl_vector' => 1,
7866 
              'period' => 1,
7867 
              'port_id' => 1,
7868 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/en',
7869 
              'type' => 'Bool',
7870 
            },
7871 
            'direction' => 'out',
7872 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7873 
            'width' => 1,
7874 
          },
7875 
          'to_register5_ce' => {
7876 
            'attributes' => {
7877 
              'domain' => '',
7878 
              'group' => 1,
7879 
              'isCe' => 1,
7880 
              'is_floating_block' => 1,
7881 
              'period' => 1,
7882 
              'type' => 'logic',
7883 
            },
7884 
            'direction' => 'out',
7885 
            'hdlType' => 'std_logic',
7886 
            'width' => 1,
7887 
          },
7888 
          'to_register5_clk' => {
7889 
            'attributes' => {
7890 
              'domain' => '',
7891 
              'group' => 1,
7892 
              'isClk' => 1,
7893 
              'is_floating_block' => 1,
7894 
              'period' => 1,
7895 
              'type' => 'logic',
7896 
            },
7897 
            'direction' => 'out',
7898 
            'hdlType' => 'std_logic',
7899 
            'width' => 1,
7900 
          },
7901 
          'to_register5_clr' => {
7902 
            'attributes' => {
7903 
              'domain' => '',
7904 
              'group' => 1,
7905 
              'isClr' => 1,
7906 
              'is_floating_block' => 1,
7907 
              'period' => 1,
7908 
              'type' => 'logic',
7909 
              'valid_bit_used' => 0,
7910 
            },
7911 
            'direction' => 'out',
7912 
            'hdlType' => 'std_logic',
7913 
            'width' => 1,
7914 
          },
7915 
          'to_register5_data_in' => {
7916 
            'attributes' => {
7917 
              'bin_pt' => 0,
7918 
              'is_floating_block' => 1,
7919 
              'must_be_hdl_vector' => 1,
7920 
              'period' => 1,
7921 
              'port_id' => 0,
7922 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/data_in',
7923 
              'type' => 'Bool',
7924 
            },
7925 
            'direction' => 'out',
7926 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7927 
            'width' => 1,
7928 
          },
7929 
          'to_register5_dout' => {
7930 
            'attributes' => {
7931 
              'bin_pt' => 0,
7932 
              'is_floating_block' => 1,
7933 
              'must_be_hdl_vector' => 1,
7934 
              'period' => 1,
7935 
              'port_id' => 0,
7936 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/dout',
7937 
              'type' => 'Bool',
7938 
            },
7939 
            'direction' => 'in',
7940 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7941 
            'width' => 1,
7942 
          },
7943 
          'to_register5_en' => {
7944 
            'attributes' => {
7945 
              'bin_pt' => 0,
7946 
              'is_floating_block' => 1,
7947 
              'must_be_hdl_vector' => 1,
7948 
              'period' => 1,
7949 
              'port_id' => 1,
7950 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/en',
7951 
              'type' => 'Bool',
7952 
            },
7953 
            'direction' => 'out',
7954 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7955 
            'width' => 1,
7956 
          },
7957 
          'to_register6_ce' => {
7958 
            'attributes' => {
7959 
              'domain' => '',
7960 
              'group' => 1,
7961 
              'isCe' => 1,
7962 
              'is_floating_block' => 1,
7963 
              'period' => 1,
7964 
              'type' => 'logic',
7965 
            },
7966 
            'direction' => 'out',
7967 
            'hdlType' => 'std_logic',
7968 
            'width' => 1,
7969 
          },
7970 
          'to_register6_clk' => {
7971 
            'attributes' => {
7972 
              'domain' => '',
7973 
              'group' => 1,
7974 
              'isClk' => 1,
7975 
              'is_floating_block' => 1,
7976 
              'period' => 1,
7977 
              'type' => 'logic',
7978 
            },
7979 
            'direction' => 'out',
7980 
            'hdlType' => 'std_logic',
7981 
            'width' => 1,
7982 
          },
7983 
          'to_register6_clr' => {
7984 
            'attributes' => {
7985 
              'domain' => '',
7986 
              'group' => 1,
7987 
              'isClr' => 1,
7988 
              'is_floating_block' => 1,
7989 
              'period' => 1,
7990 
              'type' => 'logic',
7991 
              'valid_bit_used' => 0,
7992 
            },
7993 
            'direction' => 'out',
7994 
            'hdlType' => 'std_logic',
7995 
            'width' => 1,
7996 
          },
7997 
          'to_register6_data_in' => {
7998 
            'attributes' => {
7999 
              'bin_pt' => 0,
8000 
              'is_floating_block' => 1,
8001 
              'must_be_hdl_vector' => 1,
8002 
              'period' => 1,
8003 
              'port_id' => 0,
8004 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/data_in',
8005 
              'type' => 'UFix_32_0',
8006 
            },
8007 
            'direction' => 'out',
8008 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8009 
            'width' => 32,
8010 
          },
8011 
          'to_register6_dout' => {
8012 
            'attributes' => {
8013 
              'bin_pt' => 0,
8014 
              'is_floating_block' => 1,
8015 
              'must_be_hdl_vector' => 1,
8016 
              'period' => 1,
8017 
              'port_id' => 0,
8018 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/dout',
8019 
              'type' => 'UFix_32_0',
8020 
            },
8021 
            'direction' => 'in',
8022 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8023 
            'width' => 32,
8024 
          },
8025 
          'to_register6_en' => {
8026 
            'attributes' => {
8027 
              'bin_pt' => 0,
8028 
              'is_floating_block' => 1,
8029 
              'must_be_hdl_vector' => 1,
8030 
              'period' => 1,
8031 
              'port_id' => 1,
8032 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/en',
8033 
              'type' => 'Bool',
8034 
            },
8035 
            'direction' => 'out',
8036 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8037 
            'width' => 1,
8038 
          },
8039 
          'to_register7_ce' => {
8040 
            'attributes' => {
8041 
              'domain' => '',
8042 
              'group' => 1,
8043 
              'isCe' => 1,
8044 
              'is_floating_block' => 1,
8045 
              'period' => 1,
8046 
              'type' => 'logic',
8047 
            },
8048 
            'direction' => 'out',
8049 
            'hdlType' => 'std_logic',
8050 
            'width' => 1,
8051 
          },
8052 
          'to_register7_clk' => {
8053 
            'attributes' => {
8054 
              'domain' => '',
8055 
              'group' => 1,
8056 
              'isClk' => 1,
8057 
              'is_floating_block' => 1,
8058 
              'period' => 1,
8059 
              'type' => 'logic',
8060 
            },
8061 
            'direction' => 'out',
8062 
            'hdlType' => 'std_logic',
8063 
            'width' => 1,
8064 
          },
8065 
          'to_register7_clr' => {
8066 
            'attributes' => {
8067 
              'domain' => '',
8068 
              'group' => 1,
8069 
              'isClr' => 1,
8070 
              'is_floating_block' => 1,
8071 
              'period' => 1,
8072 
              'type' => 'logic',
8073 
              'valid_bit_used' => 0,
8074 
            },
8075 
            'direction' => 'out',
8076 
            'hdlType' => 'std_logic',
8077 
            'width' => 1,
8078 
          },
8079 
          'to_register7_data_in' => {
8080 
            'attributes' => {
8081 
              'bin_pt' => 0,
8082 
              'is_floating_block' => 1,
8083 
              'must_be_hdl_vector' => 1,
8084 
              'period' => 1,
8085 
              'port_id' => 0,
8086 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/data_in',
8087 
              'type' => 'Bool',
8088 
            },
8089 
            'direction' => 'out',
8090 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8091 
            'width' => 1,
8092 
          },
8093 
          'to_register7_dout' => {
8094 
            'attributes' => {
8095 
              'bin_pt' => 0,
8096 
              'is_floating_block' => 1,
8097 
              'must_be_hdl_vector' => 1,
8098 
              'period' => 1,
8099 
              'port_id' => 0,
8100 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/dout',
8101 
              'type' => 'Bool',
8102 
            },
8103 
            'direction' => 'in',
8104 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8105 
            'width' => 1,
8106 
          },
8107 
          'to_register7_en' => {
8108 
            'attributes' => {
8109 
              'bin_pt' => 0,
8110 
              'is_floating_block' => 1,
8111 
              'must_be_hdl_vector' => 1,
8112 
              'period' => 1,
8113 
              'port_id' => 1,
8114 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/en',
8115 
              'type' => 'Bool',
8116 
            },
8117 
            'direction' => 'out',
8118 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8119 
            'width' => 1,
8120 
          },
8121 
          'to_register8_ce' => {
8122 
            'attributes' => {
8123 
              'domain' => '',
8124 
              'group' => 1,
8125 
              'isCe' => 1,
8126 
              'is_floating_block' => 1,
8127 
              'period' => 1,
8128 
              'type' => 'logic',
8129 
            },
8130 
            'direction' => 'out',
8131 
            'hdlType' => 'std_logic',
8132 
            'width' => 1,
8133 
          },
8134 
          'to_register8_clk' => {
8135 
            'attributes' => {
8136 
              'domain' => '',
8137 
              'group' => 1,
8138 
              'isClk' => 1,
8139 
              'is_floating_block' => 1,
8140 
              'period' => 1,
8141 
              'type' => 'logic',
8142 
            },
8143 
            'direction' => 'out',
8144 
            'hdlType' => 'std_logic',
8145 
            'width' => 1,
8146 
          },
8147 
          'to_register8_clr' => {
8148 
            'attributes' => {
8149 
              'domain' => '',
8150 
              'group' => 1,
8151 
              'isClr' => 1,
8152 
              'is_floating_block' => 1,
8153 
              'period' => 1,
8154 
              'type' => 'logic',
8155 
              'valid_bit_used' => 0,
8156 
            },
8157 
            'direction' => 'out',
8158 
            'hdlType' => 'std_logic',
8159 
            'width' => 1,
8160 
          },
8161 
          'to_register8_data_in' => {
8162 
            'attributes' => {
8163 
              'bin_pt' => 0,
8164 
              'is_floating_block' => 1,
8165 
              'must_be_hdl_vector' => 1,
8166 
              'period' => 1,
8167 
              'port_id' => 0,
8168 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/data_in',
8169 
              'type' => 'UFix_32_0',
8170 
            },
8171 
            'direction' => 'out',
8172 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8173 
            'width' => 32,
8174 
          },
8175 
          'to_register8_dout' => {
8176 
            'attributes' => {
8177 
              'bin_pt' => 0,
8178 
              'is_floating_block' => 1,
8179 
              'must_be_hdl_vector' => 1,
8180 
              'period' => 1,
8181 
              'port_id' => 0,
8182 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/dout',
8183 
              'type' => 'UFix_32_0',
8184 
            },
8185 
            'direction' => 'in',
8186 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8187 
            'width' => 32,
8188 
          },
8189 
          'to_register8_en' => {
8190 
            'attributes' => {
8191 
              'bin_pt' => 0,
8192 
              'is_floating_block' => 1,
8193 
              'must_be_hdl_vector' => 1,
8194 
              'period' => 1,
8195 
              'port_id' => 1,
8196 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/en',
8197 
              'type' => 'Bool',
8198 
            },
8199 
            'direction' => 'out',
8200 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8201 
            'width' => 1,
8202 
          },
8203 
          'to_register9_ce' => {
8204 
            'attributes' => {
8205 
              'domain' => '',
8206 
              'group' => 1,
8207 
              'isCe' => 1,
8208 
              'is_floating_block' => 1,
8209 
              'period' => 1,
8210 
              'type' => 'logic',
8211 
            },
8212 
            'direction' => 'out',
8213 
            'hdlType' => 'std_logic',
8214 
            'width' => 1,
8215 
          },
8216 
          'to_register9_clk' => {
8217 
            'attributes' => {
8218 
              'domain' => '',
8219 
              'group' => 1,
8220 
              'isClk' => 1,
8221 
              'is_floating_block' => 1,
8222 
              'period' => 1,
8223 
              'type' => 'logic',
8224 
            },
8225 
            'direction' => 'out',
8226 
            'hdlType' => 'std_logic',
8227 
            'width' => 1,
8228 
          },
8229 
          'to_register9_clr' => {
8230 
            'attributes' => {
8231 
              'domain' => '',
8232 
              'group' => 1,
8233 
              'isClr' => 1,
8234 
              'is_floating_block' => 1,
8235 
              'period' => 1,
8236 
              'type' => 'logic',
8237 
              'valid_bit_used' => 0,
8238 
            },
8239 
            'direction' => 'out',
8240 
            'hdlType' => 'std_logic',
8241 
            'width' => 1,
8242 
          },
8243 
          'to_register9_data_in' => {
8244 
            'attributes' => {
8245 
              'bin_pt' => 0,
8246 
              'is_floating_block' => 1,
8247 
              'must_be_hdl_vector' => 1,
8248 
              'period' => 1,
8249 
              'port_id' => 0,
8250 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/data_in',
8251 
              'type' => 'UFix_32_0',
8252 
            },
8253 
            'direction' => 'out',
8254 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8255 
            'width' => 32,
8256 
          },
8257 
          'to_register9_dout' => {
8258 
            'attributes' => {
8259 
              'bin_pt' => 0,
8260 
              'is_floating_block' => 1,
8261 
              'must_be_hdl_vector' => 1,
8262 
              'period' => 1,
8263 
              'port_id' => 0,
8264 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/dout',
8265 
              'type' => 'UFix_32_0',
8266 
            },
8267 
            'direction' => 'in',
8268 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8269 
            'width' => 32,
8270 
          },
8271 
          'to_register9_en' => {
8272 
            'attributes' => {
8273 
              'bin_pt' => 0,
8274 
              'is_floating_block' => 1,
8275 
              'must_be_hdl_vector' => 1,
8276 
              'period' => 1,
8277 
              'port_id' => 1,
8278 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/en',
8279 
              'type' => 'Bool',
8280 
            },
8281 
            'direction' => 'out',
8282 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8283 
            'width' => 1,
8284 
          },
8285 
          'to_register_ce' => {
8286 
            'attributes' => {
8287 
              'domain' => '',
8288 
              'group' => 1,
8289 
              'isCe' => 1,
8290 
              'is_floating_block' => 1,
8291 
              'period' => 1,
8292 
              'type' => 'logic',
8293 
            },
8294 
            'direction' => 'out',
8295 
            'hdlType' => 'std_logic',
8296 
            'width' => 1,
8297 
          },
8298 
          'to_register_clk' => {
8299 
            'attributes' => {
8300 
              'domain' => '',
8301 
              'group' => 1,
8302 
              'isClk' => 1,
8303 
              'is_floating_block' => 1,
8304 
              'period' => 1,
8305 
              'type' => 'logic',
8306 
            },
8307 
            'direction' => 'out',
8308 
            'hdlType' => 'std_logic',
8309 
            'width' => 1,
8310 
          },
8311 
          'to_register_clr' => {
8312 
            'attributes' => {
8313 
              'domain' => '',
8314 
              'group' => 1,
8315 
              'isClr' => 1,
8316 
              'is_floating_block' => 1,
8317 
              'period' => 1,
8318 
              'type' => 'logic',
8319 
              'valid_bit_used' => 0,
8320 
            },
8321 
            'direction' => 'out',
8322 
            'hdlType' => 'std_logic',
8323 
            'width' => 1,
8324 
          },
8325 
          'to_register_data_in' => {
8326 
            'attributes' => {
8327 
              'bin_pt' => 0,
8328 
              'is_floating_block' => 1,
8329 
              'must_be_hdl_vector' => 1,
8330 
              'period' => 1,
8331 
              'port_id' => 0,
8332 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/data_in',
8333 
              'type' => 'UFix_32_0',
8334 
            },
8335 
            'direction' => 'out',
8336 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8337 
            'width' => 32,
8338 
          },
8339 
          'to_register_dout' => {
8340 
            'attributes' => {
8341 
              'bin_pt' => 0,
8342 
              'is_floating_block' => 1,
8343 
              'must_be_hdl_vector' => 1,
8344 
              'period' => 1,
8345 
              'port_id' => 0,
8346 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/dout',
8347 
              'type' => 'UFix_32_0',
8348 
            },
8349 
            'direction' => 'in',
8350 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8351 
            'width' => 32,
8352 
          },
8353 
          'to_register_en' => {
8354 
            'attributes' => {
8355 
              'bin_pt' => 0,
8356 
              'is_floating_block' => 1,
8357 
              'must_be_hdl_vector' => 1,
8358 
              'period' => 1,
8359 
              'port_id' => 1,
8360 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/en',
8361 
              'type' => 'Bool',
8362 
            },
8363 
            'direction' => 'out',
8364 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8365 
            'width' => 1,
8366 
          },
8367 
          'user_int_1o' => {
8368 
            'attributes' => {
8369 
              'bin_pt' => 0,
8370 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
8371 
              'is_floating_block' => 1,
8372 
              'is_gateway_port' => 1,
8373 
              'must_be_hdl_vector' => 1,
8374 
              'period' => 1,
8375 
              'port_id' => 0,
8376 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o/user_int_1o',
8377 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o',
8378 
              'timingConstraint' => 'none',
8379 
              'type' => 'Bool',
8380 
            },
8381 
            'direction' => 'out',
8382 
            'hdlType' => 'std_logic',
8383 
            'width' => 1,
8384 
          },
8385 
          'user_int_2o' => {
8386 
            'attributes' => {
8387 
              'bin_pt' => 0,
8388 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
8389 
              'is_floating_block' => 1,
8390 
              'is_gateway_port' => 1,
8391 
              'must_be_hdl_vector' => 1,
8392 
              'period' => 1,
8393 
              'port_id' => 0,
8394 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o/user_int_2o',
8395 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o',
8396 
              'timingConstraint' => 'none',
8397 
              'type' => 'Bool',
8398 
            },
8399 
            'direction' => 'out',
8400 
            'hdlType' => 'std_logic',
8401 
            'width' => 1,
8402 
          },
8403 
          'user_int_3o' => {
8404 
            'attributes' => {
8405 
              'bin_pt' => 0,
8406 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
8407 
              'is_floating_block' => 1,
8408 
              'is_gateway_port' => 1,
8409 
              'must_be_hdl_vector' => 1,
8410 
              'period' => 1,
8411 
              'port_id' => 0,
8412 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o/user_int_3o',
8413 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o',
8414 
              'timingConstraint' => 'none',
8415 
              'type' => 'Bool',
8416 
            },
8417 
            'direction' => 'out',
8418 
            'hdlType' => 'std_logic',
8419 
            'width' => 1,
8420 
          },
8421 
        },
8422 
        'subblocks' => {
8423 
          'default_clock_driver_x0' => {
8424 
            'connections' => {
8425 
              'ce_1' => 'ce_1_sg_x0',
8426 
              'clk_1' => 'clk_1_sg_x0',
8427 
              'sysce' => [
8428 
                'constant',
8429 
                '\'1\'',
8430 
              ],
8431 
              'sysce_clr' => [
8432 
                'constant',
8433 
                '\'0\'',
8434 
              ],
8435 
              'sysclk' => 'clkNet',
8436 
            },
8437 
            'entity' => {
8438 
              'attributes' => {
8439 
                'domain' => 'default',
8440 
                'hdlArchAttributes' => [
8441 
                  [
8442 
                    'syn_noprune',
8443 
                    'boolean',
8444 
                    'true',
8445 
                  ],
8446 
                  [
8447 
                    'optimize_primitives',
8448 
                    'boolean',
8449 
                    'false',
8450 
                  ],
8451 
                  [
8452 
                    'dont_touch',
8453 
                    'boolean',
8454 
                    'true',
8455 
                  ],
8456 
                ],
8457 
                'hdlEntityAttributes' => [],
8458 
                'isClkDriver' => 1,
8459 
              },
8460 
              'entityName' => 'default_clock_driver',
8461 
              'ports' => {
8462 
                'ce_1' => {
8463 
                  'attributes' => {
8464 
                    'domain' => 'default',
8465 
                    'group' => 1,
8466 
                    'isCe' => 1,
8467 
                    'period' => 1,
8468 
                    'type' => 'logic',
8469 
                  },
8470 
                  'direction' => 'out',
8471 
                  'hdlType' => 'std_logic',
8472 
                  'width' => 1,
8473 
                },
8474 
                'clk_1' => {
8475 
                  'attributes' => {
8476 
                    'domain' => 'default',
8477 
                    'group' => 1,
8478 
                    'isClk' => 1,
8479 
                    'period' => 1,
8480 
                    'type' => 'logic',
8481 
                  },
8482 
                  'direction' => 'out',
8483 
                  'hdlType' => 'std_logic',
8484 
                  'width' => 1,
8485 
                },
8486 
                'sysce' => {
8487 
                  'attributes' => {
8488 
                    'group' => 6,
8489 
                    'isCe' => 1,
8490 
                    'period' => 1,
8491 
                  },
8492 
                  'direction' => 'in',
8493 
                  'hdlType' => 'std_logic',
8494 
                  'width' => 1,
8495 
                },
8496 
                'sysce_clr' => {
8497 
                  'attributes' => {
8498 
                    'group' => 6,
8499 
                    'isClr' => 1,
8500 
                    'period' => 1,
8501 
                  },
8502 
                  'direction' => 'in',
8503 
                  'hdlType' => 'std_logic',
8504 
                  'width' => 1,
8505 
                },
8506 
                'sysclk' => {
8507 
                  'attributes' => {
8508 
                    'group' => 6,
8509 
                    'isClk' => 1,
8510 
                    'period' => 1,
8511 
                  },
8512 
                  'direction' => 'in',
8513 
                  'hdlType' => 'std_logic',
8514 
                  'width' => 1,
8515 
                },
8516 
              },
8517 
            },
8518 
            'entityName' => 'default_clock_driver',
8519 
          },
8520 
          'persistentdff_inst' => {
8521 
            'connections' => {
8522 
              'clk' => 'clkNet',
8523 
              'd' => 'persistentdff_inst_q',
8524 
              'q' => 'persistentdff_inst_q',
8525 
            },
8526 
            'entity' => {
8527 
              'attributes' => {
8528 
                'entityAlreadyNetlisted' => 1,
8529 
                'hdlCompAttributes' => [
8530 
                  [
8531 
                    'syn_black_box',
8532 
                    'boolean',
8533 
                    'true',
8534 
                  ],
8535 
                  [
8536 
                    'box_type',
8537 
                    'string',
8538 
                    '"black_box"',
8539 
                  ],
8540 
                ],
8541 
                'is_persistent_dff' => 1,
8542 
                'needsComponentDeclaration' => 1,
8543 
              },
8544 
              'entityName' => 'xlpersistentdff',
8545 
              'ports' => {
8546 
                'clk' => {
8547 
                  'direction' => 'in',
8548 
                  'hdlType' => 'std_logic',
8549 
                  'width' => 1,
8550 
                },
8551 
                'd' => {
8552 
                  'direction' => 'in',
8553 
                  'hdlType' => 'std_logic',
8554 
                  'width' => 1,
8555 
                },
8556 
                'q' => {
8557 
                  'direction' => 'out',
8558 
                  'hdlType' => 'std_logic',
8559 
                  'width' => 1,
8560 
                },
8561 
              },
8562 
            },
8563 
            'entityName' => 'xlpersistentdff',
8564 
          },
8565 
          'user_logic_x0' => {
8566 
            'connections' => {
8567 
              'bram_rd_addr' => 'bram_rd_addr_net',
8568 
              'bram_rd_dout' => 'bram_rd_dout_net',
8569 
              'bram_wr_addr' => 'bram_wr_addr_net',
8570 
              'bram_wr_din' => 'bram_wr_din_net',
8571 
              'bram_wr_en' => 'bram_wr_en_net',
8572 
              'ce_1' => 'ce_1_sg_x0',
8573 
              'clk_1' => 'clk_1_sg_x0',
8574 
              'data_in' => 'data_in_net',
8575 
              'data_in_x0' => 'data_in_x0_net',
8576 
              'data_in_x1' => 'data_in_x1_net',
8577 
              'data_in_x10' => 'data_in_x10_net',
8578 
              'data_in_x11' => 'data_in_x11_net',
8579 
              'data_in_x12' => 'data_in_x12_net',
8580 
              'data_in_x13' => 'data_in_x13_net',
8581 
              'data_in_x14' => 'data_in_x14_net',
8582 
              'data_in_x15' => 'data_in_x15_net',
8583 
              'data_in_x16' => 'data_in_x16_net',
8584 
              'data_in_x17' => 'data_in_x17_net',
8585 
              'data_in_x18' => 'data_in_x18_net',
8586 
              'data_in_x19' => 'data_in_x19_net',
8587 
              'data_in_x2' => 'data_in_x2_net',
8588 
              'data_in_x20' => 'data_in_x20_net',
8589 
              'data_in_x21' => 'data_in_x21_net',
8590 
              'data_in_x22' => 'data_in_x22_net',
8591 
              'data_in_x23' => 'data_in_x23_net',
8592 
              'data_in_x24' => 'data_in_x24_net',
8593 
              'data_in_x25' => 'data_in_x25_net',
8594 
              'data_in_x26' => 'data_in_x26_net',
8595 
              'data_in_x3' => 'data_in_x3_net',
8596 
              'data_in_x4' => 'data_in_x4_net',
8597 
              'data_in_x5' => 'data_in_x5_net',
8598 
              'data_in_x6' => 'data_in_x6_net',
8599 
              'data_in_x7' => 'data_in_x7_net',
8600 
              'data_in_x8' => 'data_in_x8_net',
8601 
              'data_in_x9' => 'data_in_x9_net',
8602 
              'data_out_x1' => 'data_out_x1_net',
8603 
              'data_out_x12' => 'data_out_x12_net',
8604 
              'data_out_x13' => 'data_out_x13_net',
8605 
              'data_out_x14' => 'data_out_x14_net',
8606 
              'data_out_x15' => 'data_out_x15_net',
8607 
              'data_out_x16' => 'data_out_x16_net',
8608 
              'data_out_x17' => 'data_out_x17_net',
8609 
              'data_out_x18' => 'data_out_x18_net',
8610 
              'data_out_x19' => 'data_out_x19_net',
8611 
              'data_out_x2' => 'data_out_x2_net',
8612 
              'data_out_x20' => 'data_out_x20_net',
8613 
              'data_out_x21' => 'data_out_x21_net',
8614 
              'data_out_x22' => 'data_out_x22_net',
8615 
              'data_out_x23' => 'data_out_x23_net',
8616 
              'data_out_x24' => 'data_out_x24_net',
8617 
              'data_out_x25' => 'data_out_x25_net',
8618 
              'data_out_x26' => 'data_out_x26_net',
8619 
              'data_out_x27' => 'data_out_x27_net',
8620 
              'data_out_x28' => 'data_out_x28_net',
8621 
              'data_out_x29' => 'data_out_x29_net',
8622 
              'data_out_x3' => 'data_out_x3_net',
8623 
              'data_out_x30' => 'data_out_x30_net',
8624 
              'data_out_x31' => 'data_out_x31_net',
8625 
              'data_out_x32' => 'data_out_x32_net',
8626 
              'data_out_x4' => 'data_out_x4_net',
8627 
              'data_out_x5' => 'data_out_x5_net',
8628 
              'data_out_x8' => 'data_out_x8_net',
8629 
              'data_out_x9' => 'data_out_x9_net',
8630 
              'en' => 'constant6_op_net_x0',
8631 
              'en_x0' => 'constant6_op_net_x1',
8632 
              'en_x1' => 'constant6_op_net_x2',
8633 
              'en_x10' => 'constant6_op_net_x11',
8634 
              'en_x11' => 'constant6_op_net_x12',
8635 
              'en_x12' => 'constant6_op_net_x13',
8636 
              'en_x13' => 'constant6_op_net_x14',
8637 
              'en_x14' => 'constant6_op_net_x15',
8638 
              'en_x15' => 'constant6_op_net_x16',
8639 
              'en_x16' => 'constant6_op_net_x17',
8640 
              'en_x17' => 'constant6_op_net_x18',
8641 
              'en_x18' => 'constant6_op_net_x19',
8642 
              'en_x19' => 'constant6_op_net_x20',
8643 
              'en_x2' => 'constant6_op_net_x3',
8644 
              'en_x20' => 'constant6_op_net_x21',
8645 
              'en_x21' => 'constant6_op_net_x22',
8646 
              'en_x22' => 'constant6_op_net_x23',
8647 
              'en_x23' => 'constant6_op_net_x24',
8648 
              'en_x24' => 'constant6_op_net_x25',
8649 
              'en_x25' => 'constant6_op_net_x26',
8650 
              'en_x26' => 'constant6_op_net_x27',
8651 
              'en_x3' => 'constant6_op_net_x4',
8652 
              'en_x4' => 'constant6_op_net_x5',
8653 
              'en_x5' => 'constant6_op_net_x6',
8654 
              'en_x6' => 'constant6_op_net_x7',
8655 
              'en_x7' => 'constant6_op_net_x8',
8656 
              'en_x8' => 'constant6_op_net_x9',
8657 
              'en_x9' => 'constant6_op_net_x10',
8658 
              'fifo_rd_count_x0' => 'fifo_rd_count_net',
8659 
              'fifo_rd_dout' => 'fifo_rd_dout_net',
8660 
              'fifo_rd_empty' => 'fifo_rd_empty_net',
8661 
              'fifo_rd_en_x1' => 'fifo_rd_en_net',
8662 
              'fifo_rd_pempty_x0' => 'fifo_rd_pempty_net',
8663 
              'fifo_rd_valid' => 'fifo_rd_valid_net',
8664 
              'fifo_wr_count_x0' => 'fifo_wr_count_net',
8665 
              'fifo_wr_din' => 'fifo_wr_din_net',
8666 
              'fifo_wr_en_x0' => 'fifo_wr_en_net',
8667 
              'fifo_wr_full_x0' => 'fifo_wr_full_net',
8668 
              'fifo_wr_pfull_x0' => 'fifo_wr_pfull_net',
8669 
              'rst_i' => 'rst_i_net',
8670 
              'rst_o' => 'rst_o_net',
8671 
              'user_int_1o' => 'user_int_1o_net',
8672 
              'user_int_2o' => 'user_int_2o_net',
8673 
              'user_int_3o' => 'user_int_3o_net',
8674 
            },
8675 
            'entity' => {
8676 
              'attributes' => {
8677 
                'entityAlreadyNetlisted' => 1,
8678 
                'hdlKind' => 'vhdl',
8679 
                'isDesign' => 1,
8680 
                'simulinkName' => 'USER_LOGIC',
8681 
              },
8682 
              'entityName' => 'user_logic',
8683 
              'ports' => {
8684 
                'bram_rd_addr' => {
8685 
                  'attributes' => {
8686 
                    'bin_pt' => 0,
8687 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
8688 
                    'is_floating_block' => 1,
8689 
                    'is_gateway_port' => 1,
8690 
                    'must_be_hdl_vector' => 1,
8691 
                    'period' => 1,
8692 
                    'port_id' => 15,
8693 
                    'simulinkName' => 'USER_LOGIC/BRAM_rd_addr',
8694 
                    'source_block' => 'USER_LOGIC',
8695 
                    'timingConstraint' => 'none',
8696 
                    'type' => 'UFix_12_0',
8697 
                  },
8698 
                  'direction' => 'out',
8699 
                  'hdlType' => 'std_logic_vector(11 downto 0)',
8700 
                  'width' => 12,
8701 
                },
8702 
                'bram_rd_dout' => {
8703 
                  'attributes' => {
8704 
                    'bin_pt' => 0,
8705 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
8706 
                    'is_floating_block' => 1,
8707 
                    'is_gateway_port' => 1,
8708 
                    'must_be_hdl_vector' => 1,
8709 
                    'period' => 1,
8710 
                    'port_id' => 0,
8711 
                    'simulinkName' => 'USER_LOGIC/BRAM_rd_dout',
8712 
                    'source_block' => 'USER_LOGIC',
8713 
                    'timingConstraint' => 'none',
8714 
                    'type' => 'UFix_64_0',
8715 
                  },
8716 
                  'direction' => 'in',
8717 
                  'hdlType' => 'std_logic_vector(63 downto 0)',
8718 
                  'width' => 64,
8719 
                },
8720 
                'bram_wr_addr' => {
8721 
                  'attributes' => {
8722 
                    'bin_pt' => 0,
8723 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
8724 
                    'is_floating_block' => 1,
8725 
                    'is_gateway_port' => 1,
8726 
                    'must_be_hdl_vector' => 1,
8727 
                    'period' => 1,
8728 
                    'port_id' => 16,
8729 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_addr',
8730 
                    'source_block' => 'USER_LOGIC',
8731 
                    'timingConstraint' => 'none',
8732 
                    'type' => 'UFix_12_0',
8733 
                  },
8734 
                  'direction' => 'out',
8735 
                  'hdlType' => 'std_logic_vector(11 downto 0)',
8736 
                  'width' => 12,
8737 
                },
8738 
                'bram_wr_din' => {
8739 
                  'attributes' => {
8740 
                    'bin_pt' => 0,
8741 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
8742 
                    'is_floating_block' => 1,
8743 
                    'is_gateway_port' => 1,
8744 
                    'must_be_hdl_vector' => 1,
8745 
                    'period' => 1,
8746 
                    'port_id' => 18,
8747 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_din',
8748 
                    'source_block' => 'USER_LOGIC',
8749 
                    'timingConstraint' => 'none',
8750 
                    'type' => 'UFix_64_0',
8751 
                  },
8752 
                  'direction' => 'out',
8753 
                  'hdlType' => 'std_logic_vector(63 downto 0)',
8754 
                  'width' => 64,
8755 
                },
8756 
                'bram_wr_en' => {
8757 
                  'attributes' => {
8758 
                    'bin_pt' => 0,
8759 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
8760 
                    'is_floating_block' => 1,
8761 
                    'is_gateway_port' => 1,
8762 
                    'must_be_hdl_vector' => 1,
8763 
                    'period' => 1,
8764 
                    'port_id' => 23,
8765 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_en',
8766 
                    'source_block' => 'USER_LOGIC',
8767 
                    'timingConstraint' => 'none',
8768 
                    'type' => 'UFix_8_0',
8769 
                  },
8770 
                  'direction' => 'out',
8771 
                  'hdlType' => 'std_logic_vector(7 downto 0)',
8772 
                  'width' => 8,
8773 
                },
8774 
                'ce_1' => {
8775 
                  'attributes' => {
8776 
                    'domain' => '',
8777 
                    'group' => 1,
8778 
                    'isCe' => 1,
8779 
                    'is_subsys_port' => 1,
8780 
                    'period' => 1,
8781 
                    'subsys_port_index' => 0,
8782 
                    'type' => 'logic',
8783 
                  },
8784 
                  'direction' => 'in',
8785 
                  'hdlType' => 'std_logic',
8786 
                  'width' => 1,
8787 
                },
8788 
                'clk_1' => {
8789 
                  'attributes' => {
8790 
                    'domain' => '',
8791 
                    'group' => 1,
8792 
                    'isClk' => 1,
8793 
                    'is_subsys_port' => 1,
8794 
                    'period' => 1,
8795 
                    'subsys_port_index' => 0,
8796 
                    'type' => 'logic',
8797 
                  },
8798 
                  'direction' => 'in',
8799 
                  'hdlType' => 'std_logic',
8800 
                  'width' => 1,
8801 
                },
8802 
                'data_in' => {
8803 
                  'attributes' => {
8804 
                    'bin_pt' => 0,
8805 
                    'is_floating_block' => 1,
8806 
                    'must_be_hdl_vector' => 1,
8807 
                    'period' => 1,
8808 
                    'port_id' => 17,
8809 
                    'simulinkName' => 'USER_LOGIC/tx_en_in2',
8810 
                    'type' => 'UFix_32_0',
8811 
                  },
8812 
                  'direction' => 'out',
8813 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8814 
                  'width' => 32,
8815 
                },
8816 
                'data_in_x0' => {
8817 
                  'attributes' => {
8818 
                    'bin_pt' => 0,
8819 
                    'is_floating_block' => 1,
8820 
                    'must_be_hdl_vector' => 1,
8821 
                    'period' => 1,
8822 
                    'port_id' => 1,
8823 
                    'simulinkName' => 'USER_LOGIC/tx_en_in1',
8824 
                    'type' => 'Bool',
8825 
                  },
8826 
                  'direction' => 'out',
8827 
                  'hdlType' => 'std_logic',
8828 
                  'width' => 1,
8829 
                },
8830 
                'data_in_x1' => {
8831 
                  'attributes' => {
8832 
                    'bin_pt' => 0,
8833 
                    'is_floating_block' => 1,
8834 
                    'must_be_hdl_vector' => 1,
8835 
                    'period' => 1,
8836 
                    'port_id' => 36,
8837 
                    'simulinkName' => 'USER_LOGIC/tx_en_in96',
8838 
                    'type' => 'Bool',
8839 
                  },
8840 
                  'direction' => 'out',
8841 
                  'hdlType' => 'std_logic',
8842 
                  'width' => 1,
8843 
                },
8844 
                'data_in_x10' => {
8845 
                  'attributes' => {
8846 
                    'bin_pt' => 0,
8847 
                    'is_floating_block' => 1,
8848 
                    'must_be_hdl_vector' => 1,
8849 
                    'period' => 1,
8850 
                    'port_id' => 33,
8851 
                    'simulinkName' => 'USER_LOGIC/tx_en_in91',
8852 
                    'type' => 'UFix_32_0',
8853 
                  },
8854 
                  'direction' => 'out',
8855 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8856 
                  'width' => 32,
8857 
                },
8858 
                'data_in_x11' => {
8859 
                  'attributes' => {
8860 
                    'bin_pt' => 0,
8861 
                    'is_floating_block' => 1,
8862 
                    'must_be_hdl_vector' => 1,
8863 
                    'period' => 1,
8864 
                    'port_id' => 21,
8865 
                    'simulinkName' => 'USER_LOGIC/tx_en_in33',
8866 
                    'type' => 'UFix_32_0',
8867 
                  },
8868 
                  'direction' => 'out',
8869 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8870 
                  'width' => 32,
8871 
                },
8872 
                'data_in_x12' => {
8873 
                  'attributes' => {
8874 
                    'bin_pt' => 0,
8875 
                    'is_floating_block' => 1,
8876 
                    'must_be_hdl_vector' => 1,
8877 
                    'period' => 1,
8878 
                    'port_id' => 6,
8879 
                    'simulinkName' => 'USER_LOGIC/tx_en_in113',
8880 
                    'type' => 'Bool',
8881 
                  },
8882 
                  'direction' => 'out',
8883 
                  'hdlType' => 'std_logic',
8884 
                  'width' => 1,
8885 
                },
8886 
                'data_in_x13' => {
8887 
                  'attributes' => {
8888 
                    'bin_pt' => 0,
8889 
                    'is_floating_block' => 1,
8890 
                    'must_be_hdl_vector' => 1,
8891 
                    'period' => 1,
8892 
                    'port_id' => 8,
8893 
                    'simulinkName' => 'USER_LOGIC/tx_en_in115',
8894 
                    'type' => 'UFix_32_0',
8895 
                  },
8896 
                  'direction' => 'out',
8897 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8898 
                  'width' => 32,
8899 
                },
8900 
                'data_in_x14' => {
8901 
                  'attributes' => {
8902 
                    'bin_pt' => 0,
8903 
                    'is_floating_block' => 1,
8904 
                    'must_be_hdl_vector' => 1,
8905 
                    'period' => 1,
8906 
                    'port_id' => 7,
8907 
                    'simulinkName' => 'USER_LOGIC/tx_en_in114',
8908 
                    'type' => 'Bool',
8909 
                  },
8910 
                  'direction' => 'out',
8911 
                  'hdlType' => 'std_logic',
8912 
                  'width' => 1,
8913 
                },
8914 
                'data_in_x15' => {
8915 
                  'attributes' => {
8916 
                    'bin_pt' => 0,
8917 
                    'is_floating_block' => 1,
8918 
                    'must_be_hdl_vector' => 1,
8919 
                    'period' => 1,
8920 
                    'port_id' => 9,
8921 
                    'simulinkName' => 'USER_LOGIC/tx_en_in118',
8922 
                    'type' => 'UFix_32_0',
8923 
                  },
8924 
                  'direction' => 'out',
8925 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8926 
                  'width' => 32,
8927 
                },
8928 
                'data_in_x16' => {
8929 
                  'attributes' => {
8930 
                    'bin_pt' => 0,
8931 
                    'is_floating_block' => 1,
8932 
                    'must_be_hdl_vector' => 1,
8933 
                    'period' => 1,
8934 
                    'port_id' => 10,
8935 
                    'simulinkName' => 'USER_LOGIC/tx_en_in121',
8936 
                    'type' => 'Bool',
8937 
                  },
8938 
                  'direction' => 'out',
8939 
                  'hdlType' => 'std_logic',
8940 
                  'width' => 1,
8941 
                },
8942 
                'data_in_x17' => {
8943 
                  'attributes' => {
8944 
                    'bin_pt' => 0,
8945 
                    'is_floating_block' => 1,
8946 
                    'must_be_hdl_vector' => 1,
8947 
                    'period' => 1,
8948 
                    'port_id' => 11,
8949 
                    'simulinkName' => 'USER_LOGIC/tx_en_in122',
8950 
                    'type' => 'UFix_32_0',
8951 
                  },
8952 
                  'direction' => 'out',
8953 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8954 
                  'width' => 32,
8955 
                },
8956 
                'data_in_x18' => {
8957 
                  'attributes' => {
8958 
                    'bin_pt' => 0,
8959 
                    'is_floating_block' => 1,
8960 
                    'must_be_hdl_vector' => 1,
8961 
                    'period' => 1,
8962 
                    'port_id' => 12,
8963 
                    'simulinkName' => 'USER_LOGIC/tx_en_in125',
8964 
                    'type' => 'Bool',
8965 
                  },
8966 
                  'direction' => 'out',
8967 
                  'hdlType' => 'std_logic',
8968 
                  'width' => 1,
8969 
                },
8970 
                'data_in_x19' => {
8971 
                  'attributes' => {
8972 
                    'bin_pt' => 0,
8973 
                    'is_floating_block' => 1,
8974 
                    'must_be_hdl_vector' => 1,
8975 
                    'period' => 1,
8976 
                    'port_id' => 13,
8977 
                    'simulinkName' => 'USER_LOGIC/tx_en_in126',
8978 
                    'type' => 'UFix_32_0',
8979 
                  },
8980 
                  'direction' => 'out',
8981 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
8982 
                  'width' => 32,
8983 
                },
8984 
                'data_in_x2' => {
8985 
                  'attributes' => {
8986 
                    'bin_pt' => 0,
8987 
                    'is_floating_block' => 1,
8988 
                    'must_be_hdl_vector' => 1,
8989 
                    'period' => 1,
8990 
                    'port_id' => 37,
8991 
                    'simulinkName' => 'USER_LOGIC/tx_en_in97',
8992 
                    'type' => 'Bool',
8993 
                  },
8994 
                  'direction' => 'out',
8995 
                  'hdlType' => 'std_logic',
8996 
                  'width' => 1,
8997 
                },
8998 
                'data_in_x20' => {
8999 
                  'attributes' => {
9000 
                    'bin_pt' => 0,
9001 
                    'is_floating_block' => 1,
9002 
                    'must_be_hdl_vector' => 1,
9003 
                    'period' => 1,
9004 
                    'port_id' => 2,
9005 
                    'simulinkName' => 'USER_LOGIC/tx_en_in10',
9006 
                    'type' => 'UFix_32_0',
9007 
                  },
9008 
                  'direction' => 'out',
9009 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9010 
                  'width' => 32,
9011 
                },
9012 
                'data_in_x21' => {
9013 
                  'attributes' => {
9014 
                    'bin_pt' => 0,
9015 
                    'is_floating_block' => 1,
9016 
                    'must_be_hdl_vector' => 1,
9017 
                    'period' => 1,
9018 
                    'port_id' => 34,
9019 
                    'simulinkName' => 'USER_LOGIC/tx_en_in94',
9020 
                    'type' => 'Bool',
9021 
                  },
9022 
                  'direction' => 'out',
9023 
                  'hdlType' => 'std_logic',
9024 
                  'width' => 1,
9025 
                },
9026 
                'data_in_x22' => {
9027 
                  'attributes' => {
9028 
                    'bin_pt' => 0,
9029 
                    'is_floating_block' => 1,
9030 
                    'must_be_hdl_vector' => 1,
9031 
                    'period' => 1,
9032 
                    'port_id' => 29,
9033 
                    'simulinkName' => 'USER_LOGIC/tx_en_in7',
9034 
                    'type' => 'Bool',
9035 
                  },
9036 
                  'direction' => 'out',
9037 
                  'hdlType' => 'std_logic',
9038 
                  'width' => 1,
9039 
                },
9040 
                'data_in_x23' => {
9041 
                  'attributes' => {
9042 
                    'bin_pt' => 0,
9043 
                    'is_floating_block' => 1,
9044 
                    'must_be_hdl_vector' => 1,
9045 
                    'period' => 1,
9046 
                    'port_id' => 24,
9047 
                    'simulinkName' => 'USER_LOGIC/tx_en_in50',
9048 
                    'type' => 'UFix_32_0',
9049 
                  },
9050 
                  'direction' => 'out',
9051 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9052 
                  'width' => 32,
9053 
                },
9054 
                'data_in_x24' => {
9055 
                  'attributes' => {
9056 
                    'bin_pt' => 0,
9057 
                    'is_floating_block' => 1,
9058 
                    'must_be_hdl_vector' => 1,
9059 
                    'period' => 1,
9060 
                    'port_id' => 35,
9061 
                    'simulinkName' => 'USER_LOGIC/tx_en_in95',
9062 
                    'type' => 'Bool',
9063 
                  },
9064 
                  'direction' => 'out',
9065 
                  'hdlType' => 'std_logic',
9066 
                  'width' => 1,
9067 
                },
9068 
                'data_in_x25' => {
9069 
                  'attributes' => {
9070 
                    'bin_pt' => 0,
9071 
                    'is_floating_block' => 1,
9072 
                    'must_be_hdl_vector' => 1,
9073 
                    'period' => 1,
9074 
                    'port_id' => 26,
9075 
                    'simulinkName' => 'USER_LOGIC/tx_en_in53',
9076 
                    'type' => 'UFix_32_0',
9077 
                  },
9078 
                  'direction' => 'out',
9079 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9080 
                  'width' => 32,
9081 
                },
9082 
                'data_in_x26' => {
9083 
                  'attributes' => {
9084 
                    'bin_pt' => 0,
9085 
                    'is_floating_block' => 1,
9086 
                    'must_be_hdl_vector' => 1,
9087 
                    'period' => 1,
9088 
                    'port_id' => 27,
9089 
                    'simulinkName' => 'USER_LOGIC/tx_en_in54',
9090 
                    'type' => 'UFix_32_0',
9091 
                  },
9092 
                  'direction' => 'out',
9093 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9094 
                  'width' => 32,
9095 
                },
9096 
                'data_in_x3' => {
9097 
                  'attributes' => {
9098 
                    'bin_pt' => 0,
9099 
                    'is_floating_block' => 1,
9100 
                    'must_be_hdl_vector' => 1,
9101 
                    'period' => 1,
9102 
                    'port_id' => 14,
9103 
                    'simulinkName' => 'USER_LOGIC/tx_en_in13',
9104 
                    'type' => 'Bool',
9105 
                  },
9106 
                  'direction' => 'out',
9107 
                  'hdlType' => 'std_logic',
9108 
                  'width' => 1,
9109 
                },
9110 
                'data_in_x4' => {
9111 
                  'attributes' => {
9112 
                    'bin_pt' => 0,
9113 
                    'is_floating_block' => 1,
9114 
                    'must_be_hdl_vector' => 1,
9115 
                    'period' => 1,
9116 
                    'port_id' => 28,
9117 
                    'simulinkName' => 'USER_LOGIC/tx_en_in66',
9118 
                    'type' => 'UFix_32_0',
9119 
                  },
9120 
                  'direction' => 'out',
9121 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9122 
                  'width' => 32,
9123 
                },
9124 
                'data_in_x5' => {
9125 
                  'attributes' => {
9126 
                    'bin_pt' => 0,
9127 
                    'is_floating_block' => 1,
9128 
                    'must_be_hdl_vector' => 1,
9129 
                    'period' => 1,
9130 
                    'port_id' => 38,
9131 
                    'simulinkName' => 'USER_LOGIC/tx_en_in98',
9132 
                    'type' => 'Bool',
9133 
                  },
9134 
                  'direction' => 'out',
9135 
                  'hdlType' => 'std_logic',
9136 
                  'width' => 1,
9137 
                },
9138 
                'data_in_x6' => {
9139 
                  'attributes' => {
9140 
                    'bin_pt' => 0,
9141 
                    'is_floating_block' => 1,
9142 
                    'must_be_hdl_vector' => 1,
9143 
                    'period' => 1,
9144 
                    'port_id' => 31,
9145 
                    'simulinkName' => 'USER_LOGIC/tx_en_in85',
9146 
                    'type' => 'UFix_32_0',
9147 
                  },
9148 
                  'direction' => 'out',
9149 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9150 
                  'width' => 32,
9151 
                },
9152 
                'data_in_x7' => {
9153 
                  'attributes' => {
9154 
                    'bin_pt' => 0,
9155 
                    'is_floating_block' => 1,
9156 
                    'must_be_hdl_vector' => 1,
9157 
                    'period' => 1,
9158 
                    'port_id' => 39,
9159 
                    'simulinkName' => 'USER_LOGIC/tx_en_in99',
9160 
                    'type' => 'Bool',
9161 
                  },
9162 
                  'direction' => 'out',
9163 
                  'hdlType' => 'std_logic',
9164 
                  'width' => 1,
9165 
                },
9166 
                'data_in_x8' => {
9167 
                  'attributes' => {
9168 
                    'bin_pt' => 0,
9169 
                    'is_floating_block' => 1,
9170 
                    'must_be_hdl_vector' => 1,
9171 
                    'period' => 1,
9172 
                    'port_id' => 32,
9173 
                    'simulinkName' => 'USER_LOGIC/tx_en_in88',
9174 
                    'type' => 'UFix_32_0',
9175 
                  },
9176 
                  'direction' => 'out',
9177 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9178 
                  'width' => 32,
9179 
                },
9180 
                'data_in_x9' => {
9181 
                  'attributes' => {
9182 
                    'bin_pt' => 0,
9183 
                    'is_floating_block' => 1,
9184 
                    'must_be_hdl_vector' => 1,
9185 
                    'period' => 1,
9186 
                    'port_id' => 3,
9187 
                    'simulinkName' => 'USER_LOGIC/tx_en_in100',
9188 
                    'type' => 'Bool',
9189 
                  },
9190 
                  'direction' => 'out',
9191 
                  'hdlType' => 'std_logic',
9192 
                  'width' => 1,
9193 
                },
9194 
                'data_out_x1' => {
9195 
                  'attributes' => {
9196 
                    'bin_pt' => 0,
9197 
                    'is_floating_block' => 1,
9198 
                    'must_be_hdl_vector' => 1,
9199 
                    'period' => 1,
9200 
                    'port_id' => 9,
9201 
                    'simulinkName' => 'USER_LOGIC/From Register10',
9202 
                    'type' => 'UFix_1_0',
9203 
                  },
9204 
                  'direction' => 'in',
9205 
                  'hdlType' => 'std_logic',
9206 
                  'width' => 1,
9207 
                },
9208 
                'data_out_x12' => {
9209 
                  'attributes' => {
9210 
                    'bin_pt' => 0,
9211 
                    'is_floating_block' => 1,
9212 
                    'must_be_hdl_vector' => 1,
9213 
                    'period' => 1,
9214 
                    'port_id' => 16,
9215 
                    'simulinkName' => 'USER_LOGIC/From Register20',
9216 
                    'type' => 'UFix_32_0',
9217 
                  },
9218 
                  'direction' => 'in',
9219 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9220 
                  'width' => 32,
9221 
                },
9222 
                'data_out_x13' => {
9223 
                  'attributes' => {
9224 
                    'bin_pt' => 0,
9225 
                    'is_floating_block' => 1,
9226 
                    'must_be_hdl_vector' => 1,
9227 
                    'period' => 1,
9228 
                    'port_id' => 17,
9229 
                    'simulinkName' => 'USER_LOGIC/From Register21',
9230 
                    'type' => 'UFix_1_0',
9231 
                  },
9232 
                  'direction' => 'in',
9233 
                  'hdlType' => 'std_logic',
9234 
                  'width' => 1,
9235 
                },
9236 
                'data_out_x14' => {
9237 
                  'attributes' => {
9238 
                    'bin_pt' => 0,
9239 
                    'is_floating_block' => 1,
9240 
                    'must_be_hdl_vector' => 1,
9241 
                    'period' => 1,
9242 
                    'port_id' => 18,
9243 
                    'simulinkName' => 'USER_LOGIC/From Register22',
9244 
                    'type' => 'UFix_32_0',
9245 
                  },
9246 
                  'direction' => 'in',
9247 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9248 
                  'width' => 32,
9249 
                },
9250 
                'data_out_x15' => {
9251 
                  'attributes' => {
9252 
                    'bin_pt' => 0,
9253 
                    'is_floating_block' => 1,
9254 
                    'must_be_hdl_vector' => 1,
9255 
                    'period' => 1,
9256 
                    'port_id' => 19,
9257 
                    'simulinkName' => 'USER_LOGIC/From Register23',
9258 
                    'type' => 'UFix_1_0',
9259 
                  },
9260 
                  'direction' => 'in',
9261 
                  'hdlType' => 'std_logic',
9262 
                  'width' => 1,
9263 
                },
9264 
                'data_out_x16' => {
9265 
                  'attributes' => {
9266 
                    'bin_pt' => 0,
9267 
                    'is_floating_block' => 1,
9268 
                    'must_be_hdl_vector' => 1,
9269 
                    'period' => 1,
9270 
                    'port_id' => 20,
9271 
                    'simulinkName' => 'USER_LOGIC/From Register24',
9272 
                    'type' => 'UFix_32_0',
9273 
                  },
9274 
                  'direction' => 'in',
9275 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9276 
                  'width' => 32,
9277 
                },
9278 
                'data_out_x17' => {
9279 
                  'attributes' => {
9280 
                    'bin_pt' => 0,
9281 
                    'is_floating_block' => 1,
9282 
                    'must_be_hdl_vector' => 1,
9283 
                    'period' => 1,
9284 
                    'port_id' => 21,
9285 
                    'simulinkName' => 'USER_LOGIC/From Register25',
9286 
                    'type' => 'UFix_1_0',
9287 
                  },
9288 
                  'direction' => 'in',
9289 
                  'hdlType' => 'std_logic',
9290 
                  'width' => 1,
9291 
                },
9292 
                'data_out_x18' => {
9293 
                  'attributes' => {
9294 
                    'bin_pt' => 0,
9295 
                    'is_floating_block' => 1,
9296 
                    'must_be_hdl_vector' => 1,
9297 
                    'period' => 1,
9298 
                    'port_id' => 22,
9299 
                    'simulinkName' => 'USER_LOGIC/From Register26',
9300 
                    'type' => 'UFix_32_0',
9301 
                  },
9302 
                  'direction' => 'in',
9303 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9304 
                  'width' => 32,
9305 
                },
9306 
                'data_out_x19' => {
9307 
                  'attributes' => {
9308 
                    'bin_pt' => 0,
9309 
                    'is_floating_block' => 1,
9310 
                    'must_be_hdl_vector' => 1,
9311 
                    'period' => 1,
9312 
                    'port_id' => 23,
9313 
                    'simulinkName' => 'USER_LOGIC/From Register27',
9314 
                    'type' => 'UFix_1_0',
9315 
                  },
9316 
                  'direction' => 'in',
9317 
                  'hdlType' => 'std_logic',
9318 
                  'width' => 1,
9319 
                },
9320 
                'data_out_x2' => {
9321 
                  'attributes' => {
9322 
                    'bin_pt' => 0,
9323 
                    'is_floating_block' => 1,
9324 
                    'must_be_hdl_vector' => 1,
9325 
                    'period' => 1,
9326 
                    'port_id' => 10,
9327 
                    'simulinkName' => 'USER_LOGIC/From Register11',
9328 
                    'type' => 'UFix_32_0',
9329 
                  },
9330 
                  'direction' => 'in',
9331 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9332 
                  'width' => 32,
9333 
                },
9334 
                'data_out_x20' => {
9335 
                  'attributes' => {
9336 
                    'bin_pt' => 0,
9337 
                    'is_floating_block' => 1,
9338 
                    'must_be_hdl_vector' => 1,
9339 
                    'period' => 1,
9340 
                    'port_id' => 24,
9341 
                    'simulinkName' => 'USER_LOGIC/From Register28',
9342 
                    'type' => 'UFix_32_0',
9343 
                  },
9344 
                  'direction' => 'in',
9345 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9346 
                  'width' => 32,
9347 
                },
9348 
                'data_out_x21' => {
9349 
                  'attributes' => {
9350 
                    'bin_pt' => 0,
9351 
                    'is_floating_block' => 1,
9352 
                    'must_be_hdl_vector' => 1,
9353 
                    'period' => 1,
9354 
                    'port_id' => 25,
9355 
                    'simulinkName' => 'USER_LOGIC/From Register29',
9356 
                    'type' => 'UFix_1_0',
9357 
                  },
9358 
                  'direction' => 'in',
9359 
                  'hdlType' => 'std_logic',
9360 
                  'width' => 1,
9361 
                },
9362 
                'data_out_x22' => {
9363 
                  'attributes' => {
9364 
                    'bin_pt' => 0,
9365 
                    'is_floating_block' => 1,
9366 
                    'must_be_hdl_vector' => 1,
9367 
                    'period' => 1,
9368 
                    'port_id' => 26,
9369 
                    'simulinkName' => 'USER_LOGIC/From Register3',
9370 
                    'type' => 'UFix_32_0',
9371 
                  },
9372 
                  'direction' => 'in',
9373 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9374 
                  'width' => 32,
9375 
                },
9376 
                'data_out_x23' => {
9377 
                  'attributes' => {
9378 
                    'bin_pt' => 0,
9379 
                    'is_floating_block' => 1,
9380 
                    'must_be_hdl_vector' => 1,
9381 
                    'period' => 1,
9382 
                    'port_id' => 27,
9383 
                    'simulinkName' => 'USER_LOGIC/From Register30',
9384 
                    'type' => 'UFix_32_0',
9385 
                  },
9386 
                  'direction' => 'in',
9387 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9388 
                  'width' => 32,
9389 
                },
9390 
                'data_out_x24' => {
9391 
                  'attributes' => {
9392 
                    'bin_pt' => 0,
9393 
                    'is_floating_block' => 1,
9394 
                    'must_be_hdl_vector' => 1,
9395 
                    'period' => 1,
9396 
                    'port_id' => 28,
9397 
                    'simulinkName' => 'USER_LOGIC/From Register31',
9398 
                    'type' => 'UFix_1_0',
9399 
                  },
9400 
                  'direction' => 'in',
9401 
                  'hdlType' => 'std_logic',
9402 
                  'width' => 1,
9403 
                },
9404 
                'data_out_x25' => {
9405 
                  'attributes' => {
9406 
                    'bin_pt' => 0,
9407 
                    'is_floating_block' => 1,
9408 
                    'must_be_hdl_vector' => 1,
9409 
                    'period' => 1,
9410 
                    'port_id' => 29,
9411 
                    'simulinkName' => 'USER_LOGIC/From Register32',
9412 
                    'type' => 'UFix_32_0',
9413 
                  },
9414 
                  'direction' => 'in',
9415 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9416 
                  'width' => 32,
9417 
                },
9418 
                'data_out_x26' => {
9419 
                  'attributes' => {
9420 
                    'bin_pt' => 0,
9421 
                    'is_floating_block' => 1,
9422 
                    'must_be_hdl_vector' => 1,
9423 
                    'period' => 1,
9424 
                    'port_id' => 30,
9425 
                    'simulinkName' => 'USER_LOGIC/From Register33',
9426 
                    'type' => 'UFix_1_0',
9427 
                  },
9428 
                  'direction' => 'in',
9429 
                  'hdlType' => 'std_logic',
9430 
                  'width' => 1,
9431 
                },
9432 
                'data_out_x27' => {
9433 
                  'attributes' => {
9434 
                    'bin_pt' => 0,
9435 
                    'is_floating_block' => 1,
9436 
                    'must_be_hdl_vector' => 1,
9437 
                    'period' => 1,
9438 
                    'port_id' => 31,
9439 
                    'simulinkName' => 'USER_LOGIC/From Register4',
9440 
                    'type' => 'UFix_1_0',
9441 
                  },
9442 
                  'direction' => 'in',
9443 
                  'hdlType' => 'std_logic',
9444 
                  'width' => 1,
9445 
                },
9446 
                'data_out_x28' => {
9447 
                  'attributes' => {
9448 
                    'bin_pt' => 0,
9449 
                    'is_floating_block' => 1,
9450 
                    'must_be_hdl_vector' => 1,
9451 
                    'period' => 1,
9452 
                    'port_id' => 32,
9453 
                    'simulinkName' => 'USER_LOGIC/From Register5',
9454 
                    'type' => 'UFix_32_0',
9455 
                  },
9456 
                  'direction' => 'in',
9457 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9458 
                  'width' => 32,
9459 
                },
9460 
                'data_out_x29' => {
9461 
                  'attributes' => {
9462 
                    'bin_pt' => 0,
9463 
                    'is_floating_block' => 1,
9464 
                    'must_be_hdl_vector' => 1,
9465 
                    'period' => 1,
9466 
                    'port_id' => 33,
9467 
                    'simulinkName' => 'USER_LOGIC/From Register6',
9468 
                    'type' => 'UFix_1_0',
9469 
                  },
9470 
                  'direction' => 'in',
9471 
                  'hdlType' => 'std_logic',
9472 
                  'width' => 1,
9473 
                },
9474 
                'data_out_x3' => {
9475 
                  'attributes' => {
9476 
                    'bin_pt' => 0,
9477 
                    'is_floating_block' => 1,
9478 
                    'must_be_hdl_vector' => 1,
9479 
                    'period' => 1,
9480 
                    'port_id' => 11,
9481 
                    'simulinkName' => 'USER_LOGIC/From Register12',
9482 
                    'type' => 'UFix_1_0',
9483 
                  },
9484 
                  'direction' => 'in',
9485 
                  'hdlType' => 'std_logic',
9486 
                  'width' => 1,
9487 
                },
9488 
                'data_out_x30' => {
9489 
                  'attributes' => {
9490 
                    'bin_pt' => 0,
9491 
                    'is_floating_block' => 1,
9492 
                    'must_be_hdl_vector' => 1,
9493 
                    'period' => 1,
9494 
                    'port_id' => 34,
9495 
                    'simulinkName' => 'USER_LOGIC/From Register7',
9496 
                    'type' => 'UFix_32_0',
9497 
                  },
9498 
                  'direction' => 'in',
9499 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9500 
                  'width' => 32,
9501 
                },
9502 
                'data_out_x31' => {
9503 
                  'attributes' => {
9504 
                    'bin_pt' => 0,
9505 
                    'is_floating_block' => 1,
9506 
                    'must_be_hdl_vector' => 1,
9507 
                    'period' => 1,
9508 
                    'port_id' => 35,
9509 
                    'simulinkName' => 'USER_LOGIC/From Register8',
9510 
                    'type' => 'UFix_1_0',
9511 
                  },
9512 
                  'direction' => 'in',
9513 
                  'hdlType' => 'std_logic',
9514 
                  'width' => 1,
9515 
                },
9516 
                'data_out_x32' => {
9517 
                  'attributes' => {
9518 
                    'bin_pt' => 0,
9519 
                    'is_floating_block' => 1,
9520 
                    'must_be_hdl_vector' => 1,
9521 
                    'period' => 1,
9522 
                    'port_id' => 36,
9523 
                    'simulinkName' => 'USER_LOGIC/From Register9',
9524 
                    'type' => 'UFix_32_0',
9525 
                  },
9526 
                  'direction' => 'in',
9527 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9528 
                  'width' => 32,
9529 
                },
9530 
                'data_out_x4' => {
9531 
                  'attributes' => {
9532 
                    'bin_pt' => 0,
9533 
                    'is_floating_block' => 1,
9534 
                    'must_be_hdl_vector' => 1,
9535 
                    'period' => 1,
9536 
                    'port_id' => 12,
9537 
                    'simulinkName' => 'USER_LOGIC/From Register13',
9538 
                    'type' => 'UFix_32_0',
9539 
                  },
9540 
                  'direction' => 'in',
9541 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9542 
                  'width' => 32,
9543 
                },
9544 
                'data_out_x5' => {
9545 
                  'attributes' => {
9546 
                    'bin_pt' => 0,
9547 
                    'is_floating_block' => 1,
9548 
                    'must_be_hdl_vector' => 1,
9549 
                    'period' => 1,
9550 
                    'port_id' => 13,
9551 
                    'simulinkName' => 'USER_LOGIC/From Register14',
9552 
                    'type' => 'UFix_1_0',
9553 
                  },
9554 
                  'direction' => 'in',
9555 
                  'hdlType' => 'std_logic',
9556 
                  'width' => 1,
9557 
                },
9558 
                'data_out_x8' => {
9559 
                  'attributes' => {
9560 
                    'bin_pt' => 0,
9561 
                    'is_floating_block' => 1,
9562 
                    'must_be_hdl_vector' => 1,
9563 
                    'period' => 1,
9564 
                    'port_id' => 14,
9565 
                    'simulinkName' => 'USER_LOGIC/From Register17',
9566 
                    'type' => 'UFix_32_0',
9567 
                  },
9568 
                  'direction' => 'in',
9569 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9570 
                  'width' => 32,
9571 
                },
9572 
                'data_out_x9' => {
9573 
                  'attributes' => {
9574 
                    'bin_pt' => 0,
9575 
                    'is_floating_block' => 1,
9576 
                    'must_be_hdl_vector' => 1,
9577 
                    'period' => 1,
9578 
                    'port_id' => 15,
9579 
                    'simulinkName' => 'USER_LOGIC/From Register18',
9580 
                    'type' => 'UFix_1_0',
9581 
                  },
9582 
                  'direction' => 'in',
9583 
                  'hdlType' => 'std_logic',
9584 
                  'width' => 1,
9585 
                },
9586 
                'en' => {
9587 
                  'attributes' => {
9588 
                    'bin_pt' => 0,
9589 
                    'is_floating_block' => 1,
9590 
                    'must_be_hdl_vector' => 1,
9591 
                    'period' => 1,
9592 
                    'port_id' => 0,
9593 
                    'simulinkName' => 'USER_LOGIC/en',
9594 
                    'type' => 'Bool',
9595 
                  },
9596 
                  'direction' => 'out',
9597 
                  'hdlType' => 'std_logic',
9598 
                  'width' => 1,
9599 
                },
9600 
                'en_x0' => {
9601 
                  'attributes' => {
9602 
                    'bin_pt' => 0,
9603 
                    'is_floating_block' => 1,
9604 
                    'must_be_hdl_vector' => 1,
9605 
                    'period' => 1,
9606 
                    'port_id' => 0,
9607 
                    'simulinkName' => 'USER_LOGIC/en',
9608 
                    'type' => 'Bool',
9609 
                  },
9610 
                  'direction' => 'out',
9611 
                  'hdlType' => 'std_logic',
9612 
                  'width' => 1,
9613 
                },
9614 
                'en_x1' => {
9615 
                  'attributes' => {
9616 
                    'bin_pt' => 0,
9617 
                    'is_floating_block' => 1,
9618 
                    'must_be_hdl_vector' => 1,
9619 
                    'period' => 1,
9620 
                    'port_id' => 0,
9621 
                    'simulinkName' => 'USER_LOGIC/en',
9622 
                    'type' => 'Bool',
9623 
                  },
9624 
                  'direction' => 'out',
9625 
                  'hdlType' => 'std_logic',
9626 
                  'width' => 1,
9627 
                },
9628 
                'en_x10' => {
9629 
                  'attributes' => {
9630 
                    'bin_pt' => 0,
9631 
                    'is_floating_block' => 1,
9632 
                    'must_be_hdl_vector' => 1,
9633 
                    'period' => 1,
9634 
                    'port_id' => 0,
9635 
                    'simulinkName' => 'USER_LOGIC/en',
9636 
                    'type' => 'Bool',
9637 
                  },
9638 
                  'direction' => 'out',
9639 
                  'hdlType' => 'std_logic',
9640 
                  'width' => 1,
9641 
                },
9642 
                'en_x11' => {
9643 
                  'attributes' => {
9644 
                    'bin_pt' => 0,
9645 
                    'is_floating_block' => 1,
9646 
                    'must_be_hdl_vector' => 1,
9647 
                    'period' => 1,
9648 
                    'port_id' => 0,
9649 
                    'simulinkName' => 'USER_LOGIC/en',
9650 
                    'type' => 'Bool',
9651 
                  },
9652 
                  'direction' => 'out',
9653 
                  'hdlType' => 'std_logic',
9654 
                  'width' => 1,
9655 
                },
9656 
                'en_x12' => {
9657 
                  'attributes' => {
9658 
                    'bin_pt' => 0,
9659 
                    'is_floating_block' => 1,
9660 
                    'must_be_hdl_vector' => 1,
9661 
                    'period' => 1,
9662 
                    'port_id' => 0,
9663 
                    'simulinkName' => 'USER_LOGIC/en',
9664 
                    'type' => 'Bool',
9665 
                  },
9666 
                  'direction' => 'out',
9667 
                  'hdlType' => 'std_logic',
9668 
                  'width' => 1,
9669 
                },
9670 
                'en_x13' => {
9671 
                  'attributes' => {
9672 
                    'bin_pt' => 0,
9673 
                    'is_floating_block' => 1,
9674 
                    'must_be_hdl_vector' => 1,
9675 
                    'period' => 1,
9676 
                    'port_id' => 0,
9677 
                    'simulinkName' => 'USER_LOGIC/en',
9678 
                    'type' => 'Bool',
9679 
                  },
9680 
                  'direction' => 'out',
9681 
                  'hdlType' => 'std_logic',
9682 
                  'width' => 1,
9683 
                },
9684 
                'en_x14' => {
9685 
                  'attributes' => {
9686 
                    'bin_pt' => 0,
9687 
                    'is_floating_block' => 1,
9688 
                    'must_be_hdl_vector' => 1,
9689 
                    'period' => 1,
9690 
                    'port_id' => 0,
9691 
                    'simulinkName' => 'USER_LOGIC/en',
9692 
                    'type' => 'Bool',
9693 
                  },
9694 
                  'direction' => 'out',
9695 
                  'hdlType' => 'std_logic',
9696 
                  'width' => 1,
9697 
                },
9698 
                'en_x15' => {
9699 
                  'attributes' => {
9700 
                    'bin_pt' => 0,
9701 
                    'is_floating_block' => 1,
9702 
                    'must_be_hdl_vector' => 1,
9703 
                    'period' => 1,
9704 
                    'port_id' => 0,
9705 
                    'simulinkName' => 'USER_LOGIC/en',
9706 
                    'type' => 'Bool',
9707 
                  },
9708 
                  'direction' => 'out',
9709 
                  'hdlType' => 'std_logic',
9710 
                  'width' => 1,
9711 
                },
9712 
                'en_x16' => {
9713 
                  'attributes' => {
9714 
                    'bin_pt' => 0,
9715 
                    'is_floating_block' => 1,
9716 
                    'must_be_hdl_vector' => 1,
9717 
                    'period' => 1,
9718 
                    'port_id' => 0,
9719 
                    'simulinkName' => 'USER_LOGIC/en',
9720 
                    'type' => 'Bool',
9721 
                  },
9722 
                  'direction' => 'out',
9723 
                  'hdlType' => 'std_logic',
9724 
                  'width' => 1,
9725 
                },
9726 
                'en_x17' => {
9727 
                  'attributes' => {
9728 
                    'bin_pt' => 0,
9729 
                    'is_floating_block' => 1,
9730 
                    'must_be_hdl_vector' => 1,
9731 
                    'period' => 1,
9732 
                    'port_id' => 0,
9733 
                    'simulinkName' => 'USER_LOGIC/en',
9734 
                    'type' => 'Bool',
9735 
                  },
9736 
                  'direction' => 'out',
9737 
                  'hdlType' => 'std_logic',
9738 
                  'width' => 1,
9739 
                },
9740 
                'en_x18' => {
9741 
                  'attributes' => {
9742 
                    'bin_pt' => 0,
9743 
                    'is_floating_block' => 1,
9744 
                    'must_be_hdl_vector' => 1,
9745 
                    'period' => 1,
9746 
                    'port_id' => 0,
9747 
                    'simulinkName' => 'USER_LOGIC/en',
9748 
                    'type' => 'Bool',
9749 
                  },
9750 
                  'direction' => 'out',
9751 
                  'hdlType' => 'std_logic',
9752 
                  'width' => 1,
9753 
                },
9754 
                'en_x19' => {
9755 
                  'attributes' => {
9756 
                    'bin_pt' => 0,
9757 
                    'is_floating_block' => 1,
9758 
                    'must_be_hdl_vector' => 1,
9759 
                    'period' => 1,
9760 
                    'port_id' => 0,
9761 
                    'simulinkName' => 'USER_LOGIC/en',
9762 
                    'type' => 'Bool',
9763 
                  },
9764 
                  'direction' => 'out',
9765 
                  'hdlType' => 'std_logic',
9766 
                  'width' => 1,
9767 
                },
9768 
                'en_x2' => {
9769 
                  'attributes' => {
9770 
                    'bin_pt' => 0,
9771 
                    'is_floating_block' => 1,
9772 
                    'must_be_hdl_vector' => 1,
9773 
                    'period' => 1,
9774 
                    'port_id' => 0,
9775 
                    'simulinkName' => 'USER_LOGIC/en',
9776 
                    'type' => 'Bool',
9777 
                  },
9778 
                  'direction' => 'out',
9779 
                  'hdlType' => 'std_logic',
9780 
                  'width' => 1,
9781 
                },
9782 
                'en_x20' => {
9783 
                  'attributes' => {
9784 
                    'bin_pt' => 0,
9785 
                    'is_floating_block' => 1,
9786 
                    'must_be_hdl_vector' => 1,
9787 
                    'period' => 1,
9788 
                    'port_id' => 0,
9789 
                    'simulinkName' => 'USER_LOGIC/en',
9790 
                    'type' => 'Bool',
9791 
                  },
9792 
                  'direction' => 'out',
9793 
                  'hdlType' => 'std_logic',
9794 
                  'width' => 1,
9795 
                },
9796 
                'en_x21' => {
9797 
                  'attributes' => {
9798 
                    'bin_pt' => 0,
9799 
                    'is_floating_block' => 1,
9800 
                    'must_be_hdl_vector' => 1,
9801 
                    'period' => 1,
9802 
                    'port_id' => 0,
9803 
                    'simulinkName' => 'USER_LOGIC/en',
9804 
                    'type' => 'Bool',
9805 
                  },
9806 
                  'direction' => 'out',
9807 
                  'hdlType' => 'std_logic',
9808 
                  'width' => 1,
9809 
                },
9810 
                'en_x22' => {
9811 
                  'attributes' => {
9812 
                    'bin_pt' => 0,
9813 
                    'is_floating_block' => 1,
9814 
                    'must_be_hdl_vector' => 1,
9815 
                    'period' => 1,
9816 
                    'port_id' => 0,
9817 
                    'simulinkName' => 'USER_LOGIC/en',
9818 
                    'type' => 'Bool',
9819 
                  },
9820 
                  'direction' => 'out',
9821 
                  'hdlType' => 'std_logic',
9822 
                  'width' => 1,
9823 
                },
9824 
                'en_x23' => {
9825 
                  'attributes' => {
9826 
                    'bin_pt' => 0,
9827 
                    'is_floating_block' => 1,
9828 
                    'must_be_hdl_vector' => 1,
9829 
                    'period' => 1,
9830 
                    'port_id' => 0,
9831 
                    'simulinkName' => 'USER_LOGIC/en',
9832 
                    'type' => 'Bool',
9833 
                  },
9834 
                  'direction' => 'out',
9835 
                  'hdlType' => 'std_logic',
9836 
                  'width' => 1,
9837 
                },
9838 
                'en_x24' => {
9839 
                  'attributes' => {
9840 
                    'bin_pt' => 0,
9841 
                    'is_floating_block' => 1,
9842 
                    'must_be_hdl_vector' => 1,
9843 
                    'period' => 1,
9844 
                    'port_id' => 0,
9845 
                    'simulinkName' => 'USER_LOGIC/en',
9846 
                    'type' => 'Bool',
9847 
                  },
9848 
                  'direction' => 'out',
9849 
                  'hdlType' => 'std_logic',
9850 
                  'width' => 1,
9851 
                },
9852 
                'en_x25' => {
9853 
                  'attributes' => {
9854 
                    'bin_pt' => 0,
9855 
                    'is_floating_block' => 1,
9856 
                    'must_be_hdl_vector' => 1,
9857 
                    'period' => 1,
9858 
                    'port_id' => 0,
9859 
                    'simulinkName' => 'USER_LOGIC/en',
9860 
                    'type' => 'Bool',
9861 
                  },
9862 
                  'direction' => 'out',
9863 
                  'hdlType' => 'std_logic',
9864 
                  'width' => 1,
9865 
                },
9866 
                'en_x26' => {
9867 
                  'attributes' => {
9868 
                    'bin_pt' => 0,
9869 
                    'is_floating_block' => 1,
9870 
                    'must_be_hdl_vector' => 1,
9871 
                    'period' => 1,
9872 
                    'port_id' => 0,
9873 
                    'simulinkName' => 'USER_LOGIC/en',
9874 
                    'type' => 'Bool',
9875 
                  },
9876 
                  'direction' => 'out',
9877 
                  'hdlType' => 'std_logic',
9878 
                  'width' => 1,
9879 
                },
9880 
                'en_x3' => {
9881 
                  'attributes' => {
9882 
                    'bin_pt' => 0,
9883 
                    'is_floating_block' => 1,
9884 
                    'must_be_hdl_vector' => 1,
9885 
                    'period' => 1,
9886 
                    'port_id' => 0,
9887 
                    'simulinkName' => 'USER_LOGIC/en',
9888 
                    'type' => 'Bool',
9889 
                  },
9890 
                  'direction' => 'out',
9891 
                  'hdlType' => 'std_logic',
9892 
                  'width' => 1,
9893 
                },
9894 
                'en_x4' => {
9895 
                  'attributes' => {
9896 
                    'bin_pt' => 0,
9897 
                    'is_floating_block' => 1,
9898 
                    'must_be_hdl_vector' => 1,
9899 
                    'period' => 1,
9900 
                    'port_id' => 0,
9901 
                    'simulinkName' => 'USER_LOGIC/en',
9902 
                    'type' => 'Bool',
9903 
                  },
9904 
                  'direction' => 'out',
9905 
                  'hdlType' => 'std_logic',
9906 
                  'width' => 1,
9907 
                },
9908 
                'en_x5' => {
9909 
                  'attributes' => {
9910 
                    'bin_pt' => 0,
9911 
                    'is_floating_block' => 1,
9912 
                    'must_be_hdl_vector' => 1,
9913 
                    'period' => 1,
9914 
                    'port_id' => 0,
9915 
                    'simulinkName' => 'USER_LOGIC/en',
9916 
                    'type' => 'Bool',
9917 
                  },
9918 
                  'direction' => 'out',
9919 
                  'hdlType' => 'std_logic',
9920 
                  'width' => 1,
9921 
                },
9922 
                'en_x6' => {
9923 
                  'attributes' => {
9924 
                    'bin_pt' => 0,
9925 
                    'is_floating_block' => 1,
9926 
                    'must_be_hdl_vector' => 1,
9927 
                    'period' => 1,
9928 
                    'port_id' => 0,
9929 
                    'simulinkName' => 'USER_LOGIC/en',
9930 
                    'type' => 'Bool',
9931 
                  },
9932 
                  'direction' => 'out',
9933 
                  'hdlType' => 'std_logic',
9934 
                  'width' => 1,
9935 
                },
9936 
                'en_x7' => {
9937 
                  'attributes' => {
9938 
                    'bin_pt' => 0,
9939 
                    'is_floating_block' => 1,
9940 
                    'must_be_hdl_vector' => 1,
9941 
                    'period' => 1,
9942 
                    'port_id' => 0,
9943 
                    'simulinkName' => 'USER_LOGIC/en',
9944 
                    'type' => 'Bool',
9945 
                  },
9946 
                  'direction' => 'out',
9947 
                  'hdlType' => 'std_logic',
9948 
                  'width' => 1,
9949 
                },
9950 
                'en_x8' => {
9951 
                  'attributes' => {
9952 
                    'bin_pt' => 0,
9953 
                    'is_floating_block' => 1,
9954 
                    'must_be_hdl_vector' => 1,
9955 
                    'period' => 1,
9956 
                    'port_id' => 0,
9957 
                    'simulinkName' => 'USER_LOGIC/en',
9958 
                    'type' => 'Bool',
9959 
                  },
9960 
                  'direction' => 'out',
9961 
                  'hdlType' => 'std_logic',
9962 
                  'width' => 1,
9963 
                },
9964 
                'en_x9' => {
9965 
                  'attributes' => {
9966 
                    'bin_pt' => 0,
9967 
                    'is_floating_block' => 1,
9968 
                    'must_be_hdl_vector' => 1,
9969 
                    'period' => 1,
9970 
                    'port_id' => 0,
9971 
                    'simulinkName' => 'USER_LOGIC/en',
9972 
                    'type' => 'Bool',
9973 
                  },
9974 
                  'direction' => 'out',
9975 
                  'hdlType' => 'std_logic',
9976 
                  'width' => 1,
9977 
                },
9978 
                'fifo_rd_count_x0' => {
9979 
                  'attributes' => {
9980 
                    'bin_pt' => 0,
9981 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
9982 
                    'is_floating_block' => 1,
9983 
                    'is_gateway_port' => 1,
9984 
                    'must_be_hdl_vector' => 1,
9985 
                    'period' => 1,
9986 
                    'port_id' => 1,
9987 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_count',
9988 
                    'source_block' => 'USER_LOGIC',
9989 
                    'timingConstraint' => 'none',
9990 
                    'type' => 'UFix_15_0',
9991 
                  },
9992 
                  'direction' => 'in',
9993 
                  'hdlType' => 'std_logic_vector(14 downto 0)',
9994 
                  'width' => 15,
9995 
                },
9996 
                'fifo_rd_dout' => {
9997 
                  'attributes' => {
9998 
                    'bin_pt' => 0,
9999 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
10000 
                    'is_floating_block' => 1,
10001 
                    'is_gateway_port' => 1,
10002 
                    'must_be_hdl_vector' => 1,
10003 
                    'period' => 1,
10004 
                    'port_id' => 2,
10005 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_dout',
10006 
                    'source_block' => 'USER_LOGIC',
10007 
                    'timingConstraint' => 'none',
10008 
                    'type' => 'UFix_72_0',
10009 
                  },
10010 
                  'direction' => 'in',
10011 
                  'hdlType' => 'std_logic_vector(71 downto 0)',
10012 
                  'width' => 72,
10013 
                },
10014 
                'fifo_rd_empty' => {
10015 
                  'attributes' => {
10016 
                    'bin_pt' => 0,
10017 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
10018 
                    'is_floating_block' => 1,
10019 
                    'is_gateway_port' => 1,
10020 
                    'must_be_hdl_vector' => 1,
10021 
                    'period' => 1,
10022 
                    'port_id' => 3,
10023 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_empty',
10024 
                    'source_block' => 'USER_LOGIC',
10025 
                    'timingConstraint' => 'none',
10026 
                    'type' => 'Bool',
10027 
                  },
10028 
                  'direction' => 'in',
10029 
                  'hdlType' => 'std_logic',
10030 
                  'width' => 1,
10031 
                },
10032 
                'fifo_rd_en_x1' => {
10033 
                  'attributes' => {
10034 
                    'bin_pt' => 0,
10035 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
10036 
                    'is_floating_block' => 1,
10037 
                    'is_gateway_port' => 1,
10038 
                    'must_be_hdl_vector' => 1,
10039 
                    'period' => 1,
10040 
                    'port_id' => 4,
10041 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_en',
10042 
                    'source_block' => 'USER_LOGIC',
10043 
                    'timingConstraint' => 'none',
10044 
                    'type' => 'Bool',
10045 
                  },
10046 
                  'direction' => 'out',
10047 
                  'hdlType' => 'std_logic',
10048 
                  'width' => 1,
10049 
                },
10050 
                'fifo_rd_pempty_x0' => {
10051 
                  'attributes' => {
10052 
                    'bin_pt' => 0,
10053 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
10054 
                    'is_floating_block' => 1,
10055 
                    'is_gateway_port' => 1,
10056 
                    'must_be_hdl_vector' => 1,
10057 
                    'period' => 1,
10058 
                    'port_id' => 4,
10059 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_pempty',
10060 
                    'source_block' => 'USER_LOGIC',
10061 
                    'timingConstraint' => 'none',
10062 
                    'type' => 'Bool',
10063 
                  },
10064 
                  'direction' => 'in',
10065 
                  'hdlType' => 'std_logic',
10066 
                  'width' => 1,
10067 
                },
10068 
                'fifo_rd_valid' => {
10069 
                  'attributes' => {
10070 
                    'bin_pt' => 0,
10071 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
10072 
                    'is_floating_block' => 1,
10073 
                    'is_gateway_port' => 1,
10074 
                    'must_be_hdl_vector' => 1,
10075 
                    'period' => 1,
10076 
                    'port_id' => 5,
10077 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_valid',
10078 
                    'source_block' => 'USER_LOGIC',
10079 
                    'timingConstraint' => 'none',
10080 
                    'type' => 'Bool',
10081 
                  },
10082 
                  'direction' => 'in',
10083 
                  'hdlType' => 'std_logic',
10084 
                  'width' => 1,
10085 
                },
10086 
                'fifo_wr_count_x0' => {
10087 
                  'attributes' => {
10088 
                    'bin_pt' => 0,
10089 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
10090 
                    'is_floating_block' => 1,
10091 
                    'is_gateway_port' => 1,
10092 
                    'must_be_hdl_vector' => 1,
10093 
                    'period' => 1,
10094 
                    'port_id' => 6,
10095 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_count',
10096 
                    'source_block' => 'USER_LOGIC',
10097 
                    'timingConstraint' => 'none',
10098 
                    'type' => 'UFix_15_0',
10099 
                  },
10100 
                  'direction' => 'in',
10101 
                  'hdlType' => 'std_logic_vector(14 downto 0)',
10102 
                  'width' => 15,
10103 
                },
10104 
                'fifo_wr_din' => {
10105 
                  'attributes' => {
10106 
                    'bin_pt' => 0,
10107 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
10108 
                    'is_floating_block' => 1,
10109 
                    'is_gateway_port' => 1,
10110 
                    'must_be_hdl_vector' => 1,
10111 
                    'period' => 1,
10112 
                    'port_id' => 22,
10113 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_din',
10114 
                    'source_block' => 'USER_LOGIC',
10115 
                    'timingConstraint' => 'none',
10116 
                    'type' => 'UFix_72_0',
10117 
                  },
10118 
                  'direction' => 'out',
10119 
                  'hdlType' => 'std_logic_vector(71 downto 0)',
10120 
                  'width' => 72,
10121 
                },
10122 
                'fifo_wr_en_x0' => {
10123 
                  'attributes' => {
10124 
                    'bin_pt' => 0,
10125 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
10126 
                    'is_floating_block' => 1,
10127 
                    'is_gateway_port' => 1,
10128 
                    'must_be_hdl_vector' => 1,
10129 
                    'period' => 1,
10130 
                    'port_id' => 5,
10131 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_en',
10132 
                    'source_block' => 'USER_LOGIC',
10133 
                    'timingConstraint' => 'none',
10134 
                    'type' => 'Bool',
10135 
                  },
10136 
                  'direction' => 'out',
10137 
                  'hdlType' => 'std_logic',
10138 
                  'width' => 1,
10139 
                },
10140 
                'fifo_wr_full_x0' => {
10141 
                  'attributes' => {
10142 
                    'bin_pt' => 0,
10143 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
10144 
                    'is_floating_block' => 1,
10145 
                    'is_gateway_port' => 1,
10146 
                    'must_be_hdl_vector' => 1,
10147 
                    'period' => 1,
10148 
                    'port_id' => 7,
10149 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_full',
10150 
                    'source_block' => 'USER_LOGIC',
10151 
                    'timingConstraint' => 'none',
10152 
                    'type' => 'Bool',
10153 
                  },
10154 
                  'direction' => 'in',
10155 
                  'hdlType' => 'std_logic',
10156 
                  'width' => 1,
10157 
                },
10158 
                'fifo_wr_pfull_x0' => {
10159 
                  'attributes' => {
10160 
                    'bin_pt' => 0,
10161 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
10162 
                    'is_floating_block' => 1,
10163 
                    'is_gateway_port' => 1,
10164 
                    'must_be_hdl_vector' => 1,
10165 
                    'period' => 1,
10166 
                    'port_id' => 8,
10167 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_pfull',
10168 
                    'source_block' => 'USER_LOGIC',
10169 
                    'timingConstraint' => 'none',
10170 
                    'type' => 'Bool',
10171 
                  },
10172 
                  'direction' => 'in',
10173 
                  'hdlType' => 'std_logic',
10174 
                  'width' => 1,
10175 
                },
10176 
                'rst_i' => {
10177 
                  'attributes' => {
10178 
                    'bin_pt' => 0,
10179 
                    'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
10180 
                    'is_floating_block' => 1,
10181 
                    'is_gateway_port' => 1,
10182 
                    'must_be_hdl_vector' => 1,
10183 
                    'period' => 1,
10184 
                    'port_id' => 37,
10185 
                    'simulinkName' => 'USER_LOGIC/rst_i',
10186 
                    'source_block' => 'USER_LOGIC',
10187 
                    'timingConstraint' => 'none',
10188 
                    'type' => 'Bool',
10189 
                  },
10190 
                  'direction' => 'in',
10191 
                  'hdlType' => 'std_logic',
10192 
                  'width' => 1,
10193 
                },
10194 
                'rst_o' => {
10195 
                  'attributes' => {
10196 
                    'bin_pt' => 0,
10197 
                    'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
10198 
                    'is_floating_block' => 1,
10199 
                    'is_gateway_port' => 1,
10200 
                    'must_be_hdl_vector' => 1,
10201 
                    'period' => 1,
10202 
                    'port_id' => 19,
10203 
                    'simulinkName' => 'USER_LOGIC/rst_o',
10204 
                    'source_block' => 'USER_LOGIC',
10205 
                    'timingConstraint' => 'none',
10206 
                    'type' => 'Bool',
10207 
                  },
10208 
                  'direction' => 'out',
10209 
                  'hdlType' => 'std_logic',
10210 
                  'width' => 1,
10211 
                },
10212 
                'user_int_1o' => {
10213 
                  'attributes' => {
10214 
                    'bin_pt' => 0,
10215 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
10216 
                    'is_floating_block' => 1,
10217 
                    'is_gateway_port' => 1,
10218 
                    'must_be_hdl_vector' => 1,
10219 
                    'period' => 1,
10220 
                    'port_id' => 20,
10221 
                    'simulinkName' => 'USER_LOGIC/user_int_1o',
10222 
                    'source_block' => 'USER_LOGIC',
10223 
                    'timingConstraint' => 'none',
10224 
                    'type' => 'Bool',
10225 
                  },
10226 
                  'direction' => 'out',
10227 
                  'hdlType' => 'std_logic',
10228 
                  'width' => 1,
10229 
                },
10230 
                'user_int_2o' => {
10231 
                  'attributes' => {
10232 
                    'bin_pt' => 0,
10233 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
10234 
                    'is_floating_block' => 1,
10235 
                    'is_gateway_port' => 1,
10236 
                    'must_be_hdl_vector' => 1,
10237 
                    'period' => 1,
10238 
                    'port_id' => 30,
10239 
                    'simulinkName' => 'USER_LOGIC/user_int_2o',
10240 
                    'source_block' => 'USER_LOGIC',
10241 
                    'timingConstraint' => 'none',
10242 
                    'type' => 'Bool',
10243 
                  },
10244 
                  'direction' => 'out',
10245 
                  'hdlType' => 'std_logic',
10246 
                  'width' => 1,
10247 
                },
10248 
                'user_int_3o' => {
10249 
                  'attributes' => {
10250 
                    'bin_pt' => 0,
10251 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
10252 
                    'is_floating_block' => 1,
10253 
                    'is_gateway_port' => 1,
10254 
                    'must_be_hdl_vector' => 1,
10255 
                    'period' => 1,
10256 
                    'port_id' => 25,
10257 
                    'simulinkName' => 'USER_LOGIC/user_int_3o',
10258 
                    'source_block' => 'USER_LOGIC',
10259 
                    'timingConstraint' => 'none',
10260 
                    'type' => 'Bool',
10261 
                  },
10262 
                  'direction' => 'out',
10263 
                  'hdlType' => 'std_logic',
10264 
                  'width' => 1,
10265 
                },
10266 
              },
10267 
            },
10268 
            'entityName' => 'user_logic',
10269 
          },
10270 
        },
10271 
      },
10272 
      'entityName' => 'user_logic_cw',
10273 
    },
10274 
    'sysgen_gw_clk' => {
10275 
      'connections' => { 'clk' => '.clk', },
10276 
      'entity' => {
10277 
        'attributes' => {
10278 
          'entityAlreadyNetlisted' => 1,
10279 
          'isClk' => 1,
10280 
          'isGateway' => 1,
10281 
          'is_floating_block' => 1,
10282 
        },
10283 
        'entityName' => 'sysgen_gw_clk',
10284 
        'ports' => {
10285 
          'clk' => {
10286 
            'attributes' => { 'isClk' => 1, },
10287 
            'direction' => 'out',
10288 
            'hdlType' => 'std_logic',
10289 
            'width' => 1,
10290 
          },
10291 
        },
10292 
      },
10293 
      'entityName' => 'sysgen_gw_clk',
10294 
    },
10295 
    'to_register' => {
10296 
      'connections' => {
10297 
        'ce' => 'sysgen_dut.to_register_ce',
10298 
        'clk' => 'sysgen_dut.to_register_clk',
10299 
        'clr' => 'sysgen_dut.to_register_clr',
10300 
        'data_in' => 'sysgen_dut.to_register_data_in',
10301 
        'dout' => 'to_register.dout',
10302 
        'en' => 'sysgen_dut.to_register_en',
10303 
      },
10304 
      'entity' => {
10305 
        'attributes' => {
10306 
          'entityAlreadyNetlisted' => 1,
10307 
          'generics' => [],
10308 
          'is_floating_block' => 1,
10309 
          'mask' => {
10310 
            'Block_Handle' => 2432.00048828125,
10311 
            'Block_handle' => 2432.00048828125,
10312 
            'MDL_Handle' => 2083.00048828125,
10313 
            'MDL_handle' => 2083.00048828125,
10314 
            'arith_type' => 1,
10315 
            'bin_pt' => 14,
10316 
            'block_config' => 'sysgen_blockset:toreg_config',
10317 
            'block_handle' => 2432.00048828125,
10318 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register',
10319 
            'block_type' => 'toreg',
10320 
            'dbl_ovrd' => 0,
10321 
            'explicit_data_type' => 0,
10322 
            'gui_display_data_type' => 1,
10323 
            'init' => 0,
10324 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
10325 
            'mdl_handle' => 2083.00048828125,
10326 
            'model_handle' => 2083.00048828125,
10327 
            'n_bits' => 16,
10328 
            'ownership' => 1,
10329 
            'preci_type' => 1,
10330 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10331 
            'shared_memory_name' => 'register01rd',
10332 
          },
10333 
          'needs_vhdl_wrapper' => 0,
10334 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register',
10335 
        },
10336 
        'entityName' => 'x_x33',
10337 
        'ports' => {
10338 
          'ce' => {
10339 
            'attributes' => {
10340 
              'domain' => '',
10341 
              'group' => 1,
10342 
              'isCe' => 1,
10343 
              'is_floating_block' => 1,
10344 
              'period' => 1,
10345 
              'type' => 'logic',
10346 
            },
10347 
            'direction' => 'in',
10348 
            'hdlType' => 'std_logic',
10349 
            'width' => 1,
10350 
          },
10351 
          'clk' => {
10352 
            'attributes' => {
10353 
              'domain' => '',
10354 
              'group' => 1,
10355 
              'isClk' => 1,
10356 
              'is_floating_block' => 1,
10357 
              'period' => 1,
10358 
              'type' => 'logic',
10359 
            },
10360 
            'direction' => 'in',
10361 
            'hdlType' => 'std_logic',
10362 
            'width' => 1,
10363 
          },
10364 
          'clr' => {
10365 
            'attributes' => {
10366 
              'domain' => '',
10367 
              'group' => 1,
10368 
              'isClr' => 1,
10369 
              'is_floating_block' => 1,
10370 
              'period' => 1,
10371 
              'type' => 'logic',
10372 
              'valid_bit_used' => 0,
10373 
            },
10374 
            'direction' => 'in',
10375 
            'hdlType' => 'std_logic',
10376 
            'width' => 1,
10377 
          },
10378 
          'data_in' => {
10379 
            'attributes' => {
10380 
              'bin_pt' => 0,
10381 
              'is_floating_block' => 1,
10382 
              'must_be_hdl_vector' => 1,
10383 
              'period' => 1,
10384 
              'port_id' => 0,
10385 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/data_in',
10386 
              'type' => 'UFix_32_0',
10387 
            },
10388 
            'direction' => 'in',
10389 
            'hdlType' => 'std_logic_vector(31 downto 0)',
10390 
            'width' => 32,
10391 
          },
10392 
          'dout' => {
10393 
            'attributes' => {
10394 
              'bin_pt' => 0,
10395 
              'is_floating_block' => 1,
10396 
              'must_be_hdl_vector' => 1,
10397 
              'period' => 1,
10398 
              'port_id' => 0,
10399 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/dout',
10400 
              'type' => 'UFix_32_0',
10401 
            },
10402 
            'direction' => 'out',
10403 
            'hdlType' => 'std_logic_vector(31 downto 0)',
10404 
            'width' => 32,
10405 
          },
10406 
          'en' => {
10407 
            'attributes' => {
10408 
              'bin_pt' => 0,
10409 
              'is_floating_block' => 1,
10410 
              'must_be_hdl_vector' => 1,
10411 
              'period' => 1,
10412 
              'port_id' => 1,
10413 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/en',
10414 
              'type' => 'Bool',
10415 
            },
10416 
            'direction' => 'in',
10417 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10418 
            'width' => 1,
10419 
          },
10420 
        },
10421 
      },
10422 
      'entityName' => 'x_x33',
10423 
    },
10424 
    'to_register1' => {
10425 
      'connections' => {
10426 
        'ce' => 'sysgen_dut.to_register1_ce',
10427 
        'clk' => 'sysgen_dut.to_register1_clk',
10428 
        'clr' => 'sysgen_dut.to_register1_clr',
10429 
        'data_in' => 'sysgen_dut.to_register1_data_in',
10430 
        'dout' => 'to_register1.dout',
10431 
        'en' => 'sysgen_dut.to_register1_en',
10432 
      },
10433 
      'entity' => {
10434 
        'attributes' => {
10435 
          'entityAlreadyNetlisted' => 1,
10436 
          'generics' => [],
10437 
          'is_floating_block' => 1,
10438 
          'mask' => {
10439 
            'Block_Handle' => 2433.00048828125,
10440 
            'Block_handle' => 2433.00048828125,
10441 
            'MDL_Handle' => 2083.00048828125,
10442 
            'MDL_handle' => 2083.00048828125,
10443 
            'arith_type' => 1,
10444 
            'bin_pt' => 14,
10445 
            'block_config' => 'sysgen_blockset:toreg_config',
10446 
            'block_handle' => 2433.00048828125,
10447 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1',
10448 
            'block_type' => 'toreg',
10449 
            'dbl_ovrd' => 0,
10450 
            'explicit_data_type' => 0,
10451 
            'gui_display_data_type' => 1,
10452 
            'init' => 0,
10453 
            'init_bit_vector' => '\'b0',
10454 
            'mdl_handle' => 2083.00048828125,
10455 
            'model_handle' => 2083.00048828125,
10456 
            'n_bits' => 16,
10457 
            'ownership' => 1,
10458 
            'preci_type' => 1,
10459 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10460 
            'shared_memory_name' => 'register01rv',
10461 
          },
10462 
          'needs_vhdl_wrapper' => 0,
10463 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1',
10464 
        },
10465 
        'entityName' => 'x_x34',
10466 
        'ports' => {
10467 
          'ce' => {
10468 
            'attributes' => {
10469 
              'domain' => '',
10470 
              'group' => 1,
10471 
              'isCe' => 1,
10472 
              'is_floating_block' => 1,
10473 
              'period' => 1,
10474 
              'type' => 'logic',
10475 
            },
10476 
            'direction' => 'in',
10477 
            'hdlType' => 'std_logic',
10478 
            'width' => 1,
10479 
          },
10480 
          'clk' => {
10481 
            'attributes' => {
10482 
              'domain' => '',
10483 
              'group' => 1,
10484 
              'isClk' => 1,
10485 
              'is_floating_block' => 1,
10486 
              'period' => 1,
10487 
              'type' => 'logic',
10488 
            },
10489 
            'direction' => 'in',
10490 
            'hdlType' => 'std_logic',
10491 
            'width' => 1,
10492 
          },
10493 
          'clr' => {
10494 
            'attributes' => {
10495 
              'domain' => '',
10496 
              'group' => 1,
10497 
              'isClr' => 1,
10498 
              'is_floating_block' => 1,
10499 
              'period' => 1,
10500 
              'type' => 'logic',
10501 
              'valid_bit_used' => 0,
10502 
            },
10503 
            'direction' => 'in',
10504 
            'hdlType' => 'std_logic',
10505 
            'width' => 1,
10506 
          },
10507 
          'data_in' => {
10508 
            'attributes' => {
10509 
              'bin_pt' => 0,
10510 
              'is_floating_block' => 1,
10511 
              'must_be_hdl_vector' => 1,
10512 
              'period' => 1,
10513 
              'port_id' => 0,
10514 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/data_in',
10515 
              'type' => 'Bool',
10516 
            },
10517 
            'direction' => 'in',
10518 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10519 
            'width' => 1,
10520 
          },
10521 
          'dout' => {
10522 
            'attributes' => {
10523 
              'bin_pt' => 0,
10524 
              'is_floating_block' => 1,
10525 
              'must_be_hdl_vector' => 1,
10526 
              'period' => 1,
10527 
              'port_id' => 0,
10528 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/dout',
10529 
              'type' => 'Bool',
10530 
            },
10531 
            'direction' => 'out',
10532 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10533 
            'width' => 1,
10534 
          },
10535 
          'en' => {
10536 
            'attributes' => {
10537 
              'bin_pt' => 0,
10538 
              'is_floating_block' => 1,
10539 
              'must_be_hdl_vector' => 1,
10540 
              'period' => 1,
10541 
              'port_id' => 1,
10542 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/en',
10543 
              'type' => 'Bool',
10544 
            },
10545 
            'direction' => 'in',
10546 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10547 
            'width' => 1,
10548 
          },
10549 
        },
10550 
      },
10551 
      'entityName' => 'x_x34',
10552 
    },
10553 
    'to_register10' => {
10554 
      'connections' => {
10555 
        'ce' => 'sysgen_dut.to_register10_ce',
10556 
        'clk' => 'sysgen_dut.to_register10_clk',
10557 
        'clr' => 'sysgen_dut.to_register10_clr',
10558 
        'data_in' => 'sysgen_dut.to_register10_data_in',
10559 
        'dout' => 'to_register10.dout',
10560 
        'en' => 'sysgen_dut.to_register10_en',
10561 
      },
10562 
      'entity' => {
10563 
        'attributes' => {
10564 
          'entityAlreadyNetlisted' => 1,
10565 
          'generics' => [],
10566 
          'is_floating_block' => 1,
10567 
          'mask' => {
10568 
            'Block_Handle' => 2434.00048828125,
10569 
            'Block_handle' => 2434.00048828125,
10570 
            'MDL_Handle' => 2083.00048828125,
10571 
            'MDL_handle' => 2083.00048828125,
10572 
            'arith_type' => 1,
10573 
            'bin_pt' => 14,
10574 
            'block_config' => 'sysgen_blockset:toreg_config',
10575 
            'block_handle' => 2434.00048828125,
10576 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10',
10577 
            'block_type' => 'toreg',
10578 
            'dbl_ovrd' => 0,
10579 
            'explicit_data_type' => 0,
10580 
            'gui_display_data_type' => 1,
10581 
            'init' => 0,
10582 
            'init_bit_vector' => '\'b0',
10583 
            'mdl_handle' => 2083.00048828125,
10584 
            'model_handle' => 2083.00048828125,
10585 
            'n_bits' => 16,
10586 
            'ownership' => 1,
10587 
            'preci_type' => 1,
10588 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10589 
            'shared_memory_name' => 'register05rv',
10590 
          },
10591 
          'needs_vhdl_wrapper' => 0,
10592 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10',
10593 
        },
10594 
        'entityName' => 'x_x35',
10595 
        'ports' => {
10596 
          'ce' => {
10597 
            'attributes' => {
10598 
              'domain' => '',
10599 
              'group' => 1,
10600 
              'isCe' => 1,
10601 
              'is_floating_block' => 1,
10602 
              'period' => 1,
10603 
              'type' => 'logic',
10604 
            },
10605 
            'direction' => 'in',
10606 
            'hdlType' => 'std_logic',
10607 
            'width' => 1,
10608 
          },
10609 
          'clk' => {
10610 
            'attributes' => {
10611 
              'domain' => '',
10612 
              'group' => 1,
10613 
              'isClk' => 1,
10614 
              'is_floating_block' => 1,
10615 
              'period' => 1,
10616 
              'type' => 'logic',
10617 
            },
10618 
            'direction' => 'in',
10619 
            'hdlType' => 'std_logic',
10620 
            'width' => 1,
10621 
          },
10622 
          'clr' => {
10623 
            'attributes' => {
10624 
              'domain' => '',
10625 
              'group' => 1,
10626 
              'isClr' => 1,
10627 
              'is_floating_block' => 1,
10628 
              'period' => 1,
10629 
              'type' => 'logic',
10630 
              'valid_bit_used' => 0,
10631 
            },
10632 
            'direction' => 'in',
10633 
            'hdlType' => 'std_logic',
10634 
            'width' => 1,
10635 
          },
10636 
          'data_in' => {
10637 
            'attributes' => {
10638 
              'bin_pt' => 0,
10639 
              'is_floating_block' => 1,
10640 
              'must_be_hdl_vector' => 1,
10641 
              'period' => 1,
10642 
              'port_id' => 0,
10643 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/data_in',
10644 
              'type' => 'Bool',
10645 
            },
10646 
            'direction' => 'in',
10647 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10648 
            'width' => 1,
10649 
          },
10650 
          'dout' => {
10651 
            'attributes' => {
10652 
              'bin_pt' => 0,
10653 
              'is_floating_block' => 1,
10654 
              'must_be_hdl_vector' => 1,
10655 
              'period' => 1,
10656 
              'port_id' => 0,
10657 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/dout',
10658 
              'type' => 'Bool',
10659 
            },
10660 
            'direction' => 'out',
10661 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10662 
            'width' => 1,
10663 
          },
10664 
          'en' => {
10665 
            'attributes' => {
10666 
              'bin_pt' => 0,
10667 
              'is_floating_block' => 1,
10668 
              'must_be_hdl_vector' => 1,
10669 
              'period' => 1,
10670 
              'port_id' => 1,
10671 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/en',
10672 
              'type' => 'Bool',
10673 
            },
10674 
            'direction' => 'in',
10675 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10676 
            'width' => 1,
10677 
          },
10678 
        },
10679 
      },
10680 
      'entityName' => 'x_x35',
10681 
    },
10682 
    'to_register11' => {
10683 
      'connections' => {
10684 
        'ce' => 'sysgen_dut.to_register11_ce',
10685 
        'clk' => 'sysgen_dut.to_register11_clk',
10686 
        'clr' => 'sysgen_dut.to_register11_clr',
10687 
        'data_in' => 'sysgen_dut.to_register11_data_in',
10688 
        'dout' => 'to_register11.dout',
10689 
        'en' => 'sysgen_dut.to_register11_en',
10690 
      },
10691 
      'entity' => {
10692 
        'attributes' => {
10693 
          'entityAlreadyNetlisted' => 1,
10694 
          'generics' => [],
10695 
          'is_floating_block' => 1,
10696 
          'mask' => {
10697 
            'Block_Handle' => 2435.00048828125,
10698 
            'Block_handle' => 2435.00048828125,
10699 
            'MDL_Handle' => 2083.00048828125,
10700 
            'MDL_handle' => 2083.00048828125,
10701 
            'arith_type' => 1,
10702 
            'bin_pt' => 14,
10703 
            'block_config' => 'sysgen_blockset:toreg_config',
10704 
            'block_handle' => 2435.00048828125,
10705 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11',
10706 
            'block_type' => 'toreg',
10707 
            'dbl_ovrd' => 0,
10708 
            'explicit_data_type' => 0,
10709 
            'gui_display_data_type' => 1,
10710 
            'init' => 0,
10711 
            'init_bit_vector' => '\'b0',
10712 
            'mdl_handle' => 2083.00048828125,
10713 
            'model_handle' => 2083.00048828125,
10714 
            'n_bits' => 16,
10715 
            'ownership' => 1,
10716 
            'preci_type' => 1,
10717 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10718 
            'shared_memory_name' => 'register06rv',
10719 
          },
10720 
          'needs_vhdl_wrapper' => 0,
10721 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11',
10722 
        },
10723 
        'entityName' => 'x_x36',
10724 
        'ports' => {
10725 
          'ce' => {
10726 
            'attributes' => {
10727 
              'domain' => '',
10728 
              'group' => 1,
10729 
              'isCe' => 1,
10730 
              'is_floating_block' => 1,
10731 
              'period' => 1,
10732 
              'type' => 'logic',
10733 
            },
10734 
            'direction' => 'in',
10735 
            'hdlType' => 'std_logic',
10736 
            'width' => 1,
10737 
          },
10738 
          'clk' => {
10739 
            'attributes' => {
10740 
              'domain' => '',
10741 
              'group' => 1,
10742 
              'isClk' => 1,
10743 
              'is_floating_block' => 1,
10744 
              'period' => 1,
10745 
              'type' => 'logic',
10746 
            },
10747 
            'direction' => 'in',
10748 
            'hdlType' => 'std_logic',
10749 
            'width' => 1,
10750 
          },
10751 
          'clr' => {
10752 
            'attributes' => {
10753 
              'domain' => '',
10754 
              'group' => 1,
10755 
              'isClr' => 1,
10756 
              'is_floating_block' => 1,
10757 
              'period' => 1,
10758 
              'type' => 'logic',
10759 
              'valid_bit_used' => 0,
10760 
            },
10761 
            'direction' => 'in',
10762 
            'hdlType' => 'std_logic',
10763 
            'width' => 1,
10764 
          },
10765 
          'data_in' => {
10766 
            'attributes' => {
10767 
              'bin_pt' => 0,
10768 
              'is_floating_block' => 1,
10769 
              'must_be_hdl_vector' => 1,
10770 
              'period' => 1,
10771 
              'port_id' => 0,
10772 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/data_in',
10773 
              'type' => 'Bool',
10774 
            },
10775 
            'direction' => 'in',
10776 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10777 
            'width' => 1,
10778 
          },
10779 
          'dout' => {
10780 
            'attributes' => {
10781 
              'bin_pt' => 0,
10782 
              'is_floating_block' => 1,
10783 
              'must_be_hdl_vector' => 1,
10784 
              'period' => 1,
10785 
              'port_id' => 0,
10786 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/dout',
10787 
              'type' => 'Bool',
10788 
            },
10789 
            'direction' => 'out',
10790 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10791 
            'width' => 1,
10792 
          },
10793 
          'en' => {
10794 
            'attributes' => {
10795 
              'bin_pt' => 0,
10796 
              'is_floating_block' => 1,
10797 
              'must_be_hdl_vector' => 1,
10798 
              'period' => 1,
10799 
              'port_id' => 1,
10800 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/en',
10801 
              'type' => 'Bool',
10802 
            },
10803 
            'direction' => 'in',
10804 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10805 
            'width' => 1,
10806 
          },
10807 
        },
10808 
      },
10809 
      'entityName' => 'x_x36',
10810 
    },
10811 
    'to_register12' => {
10812 
      'connections' => {
10813 
        'ce' => 'sysgen_dut.to_register12_ce',
10814 
        'clk' => 'sysgen_dut.to_register12_clk',
10815 
        'clr' => 'sysgen_dut.to_register12_clr',
10816 
        'data_in' => 'sysgen_dut.to_register12_data_in',
10817 
        'dout' => 'to_register12.dout',
10818 
        'en' => 'sysgen_dut.to_register12_en',
10819 
      },
10820 
      'entity' => {
10821 
        'attributes' => {
10822 
          'entityAlreadyNetlisted' => 1,
10823 
          'generics' => [],
10824 
          'is_floating_block' => 1,
10825 
          'mask' => {
10826 
            'Block_Handle' => 2436.00048828125,
10827 
            'Block_handle' => 2436.00048828125,
10828 
            'MDL_Handle' => 2083.00048828125,
10829 
            'MDL_handle' => 2083.00048828125,
10830 
            'arith_type' => 1,
10831 
            'bin_pt' => 14,
10832 
            'block_config' => 'sysgen_blockset:toreg_config',
10833 
            'block_handle' => 2436.00048828125,
10834 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12',
10835 
            'block_type' => 'toreg',
10836 
            'dbl_ovrd' => 0,
10837 
            'explicit_data_type' => 0,
10838 
            'gui_display_data_type' => 1,
10839 
            'init' => 0,
10840 
            'init_bit_vector' => '\'b0',
10841 
            'mdl_handle' => 2083.00048828125,
10842 
            'model_handle' => 2083.00048828125,
10843 
            'n_bits' => 16,
10844 
            'ownership' => 1,
10845 
            'preci_type' => 1,
10846 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10847 
            'shared_memory_name' => 'register07rv',
10848 
          },
10849 
          'needs_vhdl_wrapper' => 0,
10850 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12',
10851 
        },
10852 
        'entityName' => 'x_x37',
10853 
        'ports' => {
10854 
          'ce' => {
10855 
            'attributes' => {
10856 
              'domain' => '',
10857 
              'group' => 1,
10858 
              'isCe' => 1,
10859 
              'is_floating_block' => 1,
10860 
              'period' => 1,
10861 
              'type' => 'logic',
10862 
            },
10863 
            'direction' => 'in',
10864 
            'hdlType' => 'std_logic',
10865 
            'width' => 1,
10866 
          },
10867 
          'clk' => {
10868 
            'attributes' => {
10869 
              'domain' => '',
10870 
              'group' => 1,
10871 
              'isClk' => 1,
10872 
              'is_floating_block' => 1,
10873 
              'period' => 1,
10874 
              'type' => 'logic',
10875 
            },
10876 
            'direction' => 'in',
10877 
            'hdlType' => 'std_logic',
10878 
            'width' => 1,
10879 
          },
10880 
          'clr' => {
10881 
            'attributes' => {
10882 
              'domain' => '',
10883 
              'group' => 1,
10884 
              'isClr' => 1,
10885 
              'is_floating_block' => 1,
10886 
              'period' => 1,
10887 
              'type' => 'logic',
10888 
              'valid_bit_used' => 0,
10889 
            },
10890 
            'direction' => 'in',
10891 
            'hdlType' => 'std_logic',
10892 
            'width' => 1,
10893 
          },
10894 
          'data_in' => {
10895 
            'attributes' => {
10896 
              'bin_pt' => 0,
10897 
              'is_floating_block' => 1,
10898 
              'must_be_hdl_vector' => 1,
10899 
              'period' => 1,
10900 
              'port_id' => 0,
10901 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/data_in',
10902 
              'type' => 'Bool',
10903 
            },
10904 
            'direction' => 'in',
10905 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10906 
            'width' => 1,
10907 
          },
10908 
          'dout' => {
10909 
            'attributes' => {
10910 
              'bin_pt' => 0,
10911 
              'is_floating_block' => 1,
10912 
              'must_be_hdl_vector' => 1,
10913 
              'period' => 1,
10914 
              'port_id' => 0,
10915 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/dout',
10916 
              'type' => 'Bool',
10917 
            },
10918 
            'direction' => 'out',
10919 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10920 
            'width' => 1,
10921 
          },
10922 
          'en' => {
10923 
            'attributes' => {
10924 
              'bin_pt' => 0,
10925 
              'is_floating_block' => 1,
10926 
              'must_be_hdl_vector' => 1,
10927 
              'period' => 1,
10928 
              'port_id' => 1,
10929 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/en',
10930 
              'type' => 'Bool',
10931 
            },
10932 
            'direction' => 'in',
10933 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10934 
            'width' => 1,
10935 
          },
10936 
        },
10937 
      },
10938 
      'entityName' => 'x_x37',
10939 
    },
10940 
    'to_register13' => {
10941 
      'connections' => {
10942 
        'ce' => 'sysgen_dut.to_register13_ce',
10943 
        'clk' => 'sysgen_dut.to_register13_clk',
10944 
        'clr' => 'sysgen_dut.to_register13_clr',
10945 
        'data_in' => 'sysgen_dut.to_register13_data_in',
10946 
        'dout' => 'to_register13.dout',
10947 
        'en' => 'sysgen_dut.to_register13_en',
10948 
      },
10949 
      'entity' => {
10950 
        'attributes' => {
10951 
          'entityAlreadyNetlisted' => 1,
10952 
          'generics' => [],
10953 
          'is_floating_block' => 1,
10954 
          'mask' => {
10955 
            'Block_Handle' => 2437.00048828125,
10956 
            'Block_handle' => 2437.00048828125,
10957 
            'MDL_Handle' => 2083.00048828125,
10958 
            'MDL_handle' => 2083.00048828125,
10959 
            'arith_type' => 1,
10960 
            'bin_pt' => 14,
10961 
            'block_config' => 'sysgen_blockset:toreg_config',
10962 
            'block_handle' => 2437.00048828125,
10963 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13',
10964 
            'block_type' => 'toreg',
10965 
            'dbl_ovrd' => 0,
10966 
            'explicit_data_type' => 0,
10967 
            'gui_display_data_type' => 1,
10968 
            'init' => 0,
10969 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
10970 
            'mdl_handle' => 2083.00048828125,
10971 
            'model_handle' => 2083.00048828125,
10972 
            'n_bits' => 16,
10973 
            'ownership' => 1,
10974 
            'preci_type' => 1,
10975 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10976 
            'shared_memory_name' => 'register07rd',
10977 
          },
10978 
          'needs_vhdl_wrapper' => 0,
10979 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13',
10980 
        },
10981 
        'entityName' => 'x_x38',
10982 
        'ports' => {
10983 
          'ce' => {
10984 
            'attributes' => {
10985 
              'domain' => '',
10986 
              'group' => 1,
10987 
              'isCe' => 1,
10988 
              'is_floating_block' => 1,
10989 
              'period' => 1,
10990 
              'type' => 'logic',
10991 
            },
10992 
            'direction' => 'in',
10993 
            'hdlType' => 'std_logic',
10994 
            'width' => 1,
10995 
          },
10996 
          'clk' => {
10997 
            'attributes' => {
10998 
              'domain' => '',
10999 
              'group' => 1,
11000 
              'isClk' => 1,
11001 
              'is_floating_block' => 1,
11002 
              'period' => 1,
11003 
              'type' => 'logic',
11004 
            },
11005 
            'direction' => 'in',
11006 
            'hdlType' => 'std_logic',
11007 
            'width' => 1,
11008 
          },
11009 
          'clr' => {
11010 
            'attributes' => {
11011 
              'domain' => '',
11012 
              'group' => 1,
11013 
              'isClr' => 1,
11014 
              'is_floating_block' => 1,
11015 
              'period' => 1,
11016 
              'type' => 'logic',
11017 
              'valid_bit_used' => 0,
11018 
            },
11019 
            'direction' => 'in',
11020 
            'hdlType' => 'std_logic',
11021 
            'width' => 1,
11022 
          },
11023 
          'data_in' => {
11024 
            'attributes' => {
11025 
              'bin_pt' => 0,
11026 
              'is_floating_block' => 1,
11027 
              'must_be_hdl_vector' => 1,
11028 
              'period' => 1,
11029 
              'port_id' => 0,
11030 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/data_in',
11031 
              'type' => 'UFix_32_0',
11032 
            },
11033 
            'direction' => 'in',
11034 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11035 
            'width' => 32,
11036 
          },
11037 
          'dout' => {
11038 
            'attributes' => {
11039 
              'bin_pt' => 0,
11040 
              'is_floating_block' => 1,
11041 
              'must_be_hdl_vector' => 1,
11042 
              'period' => 1,
11043 
              'port_id' => 0,
11044 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/dout',
11045 
              'type' => 'UFix_32_0',
11046 
            },
11047 
            'direction' => 'out',
11048 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11049 
            'width' => 32,
11050 
          },
11051 
          'en' => {
11052 
            'attributes' => {
11053 
              'bin_pt' => 0,
11054 
              'is_floating_block' => 1,
11055 
              'must_be_hdl_vector' => 1,
11056 
              'period' => 1,
11057 
              'port_id' => 1,
11058 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/en',
11059 
              'type' => 'Bool',
11060 
            },
11061 
            'direction' => 'in',
11062 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11063 
            'width' => 1,
11064 
          },
11065 
        },
11066 
      },
11067 
      'entityName' => 'x_x38',
11068 
    },
11069 
    'to_register14' => {
11070 
      'connections' => {
11071 
        'ce' => 'sysgen_dut.to_register14_ce',
11072 
        'clk' => 'sysgen_dut.to_register14_clk',
11073 
        'clr' => 'sysgen_dut.to_register14_clr',
11074 
        'data_in' => 'sysgen_dut.to_register14_data_in',
11075 
        'dout' => 'to_register14.dout',
11076 
        'en' => 'sysgen_dut.to_register14_en',
11077 
      },
11078 
      'entity' => {
11079 
        'attributes' => {
11080 
          'entityAlreadyNetlisted' => 1,
11081 
          'generics' => [],
11082 
          'is_floating_block' => 1,
11083 
          'mask' => {
11084 
            'Block_Handle' => 2438.00048828125,
11085 
            'Block_handle' => 2438.00048828125,
11086 
            'MDL_Handle' => 2083.00048828125,
11087 
            'MDL_handle' => 2083.00048828125,
11088 
            'arith_type' => 1,
11089 
            'bin_pt' => 14,
11090 
            'block_config' => 'sysgen_blockset:toreg_config',
11091 
            'block_handle' => 2438.00048828125,
11092 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14',
11093 
            'block_type' => 'toreg',
11094 
            'dbl_ovrd' => 0,
11095 
            'explicit_data_type' => 0,
11096 
            'gui_display_data_type' => 1,
11097 
            'init' => 0,
11098 
            'init_bit_vector' => '\'b0',
11099 
            'mdl_handle' => 2083.00048828125,
11100 
            'model_handle' => 2083.00048828125,
11101 
            'n_bits' => 16,
11102 
            'ownership' => 1,
11103 
            'preci_type' => 1,
11104 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11105 
            'shared_memory_name' => 'register08rv',
11106 
          },
11107 
          'needs_vhdl_wrapper' => 0,
11108 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14',
11109 
        },
11110 
        'entityName' => 'x_x39',
11111 
        'ports' => {
11112 
          'ce' => {
11113 
            'attributes' => {
11114 
              'domain' => '',
11115 
              'group' => 1,
11116 
              'isCe' => 1,
11117 
              'is_floating_block' => 1,
11118 
              'period' => 1,
11119 
              'type' => 'logic',
11120 
            },
11121 
            'direction' => 'in',
11122 
            'hdlType' => 'std_logic',
11123 
            'width' => 1,
11124 
          },
11125 
          'clk' => {
11126 
            'attributes' => {
11127 
              'domain' => '',
11128 
              'group' => 1,
11129 
              'isClk' => 1,
11130 
              'is_floating_block' => 1,
11131 
              'period' => 1,
11132 
              'type' => 'logic',
11133 
            },
11134 
            'direction' => 'in',
11135 
            'hdlType' => 'std_logic',
11136 
            'width' => 1,
11137 
          },
11138 
          'clr' => {
11139 
            'attributes' => {
11140 
              'domain' => '',
11141 
              'group' => 1,
11142 
              'isClr' => 1,
11143 
              'is_floating_block' => 1,
11144 
              'period' => 1,
11145 
              'type' => 'logic',
11146 
              'valid_bit_used' => 0,
11147 
            },
11148 
            'direction' => 'in',
11149 
            'hdlType' => 'std_logic',
11150 
            'width' => 1,
11151 
          },
11152 
          'data_in' => {
11153 
            'attributes' => {
11154 
              'bin_pt' => 0,
11155 
              'is_floating_block' => 1,
11156 
              'must_be_hdl_vector' => 1,
11157 
              'period' => 1,
11158 
              'port_id' => 0,
11159 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/data_in',
11160 
              'type' => 'Bool',
11161 
            },
11162 
            'direction' => 'in',
11163 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11164 
            'width' => 1,
11165 
          },
11166 
          'dout' => {
11167 
            'attributes' => {
11168 
              'bin_pt' => 0,
11169 
              'is_floating_block' => 1,
11170 
              'must_be_hdl_vector' => 1,
11171 
              'period' => 1,
11172 
              'port_id' => 0,
11173 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/dout',
11174 
              'type' => 'Bool',
11175 
            },
11176 
            'direction' => 'out',
11177 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11178 
            'width' => 1,
11179 
          },
11180 
          'en' => {
11181 
            'attributes' => {
11182 
              'bin_pt' => 0,
11183 
              'is_floating_block' => 1,
11184 
              'must_be_hdl_vector' => 1,
11185 
              'period' => 1,
11186 
              'port_id' => 1,
11187 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/en',
11188 
              'type' => 'Bool',
11189 
            },
11190 
            'direction' => 'in',
11191 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11192 
            'width' => 1,
11193 
          },
11194 
        },
11195 
      },
11196 
      'entityName' => 'x_x39',
11197 
    },
11198 
    'to_register15' => {
11199 
      'connections' => {
11200 
        'ce' => 'sysgen_dut.to_register15_ce',
11201 
        'clk' => 'sysgen_dut.to_register15_clk',
11202 
        'clr' => 'sysgen_dut.to_register15_clr',
11203 
        'data_in' => 'sysgen_dut.to_register15_data_in',
11204 
        'dout' => 'to_register15.dout',
11205 
        'en' => 'sysgen_dut.to_register15_en',
11206 
      },
11207 
      'entity' => {
11208 
        'attributes' => {
11209 
          'entityAlreadyNetlisted' => 1,
11210 
          'generics' => [],
11211 
          'is_floating_block' => 1,
11212 
          'mask' => {
11213 
            'Block_Handle' => 2439.00048828125,
11214 
            'Block_handle' => 2439.00048828125,
11215 
            'MDL_Handle' => 2083.00048828125,
11216 
            'MDL_handle' => 2083.00048828125,
11217 
            'arith_type' => 1,
11218 
            'bin_pt' => 14,
11219 
            'block_config' => 'sysgen_blockset:toreg_config',
11220 
            'block_handle' => 2439.00048828125,
11221 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15',
11222 
            'block_type' => 'toreg',
11223 
            'dbl_ovrd' => 0,
11224 
            'explicit_data_type' => 0,
11225 
            'gui_display_data_type' => 1,
11226 
            'init' => 0,
11227 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11228 
            'mdl_handle' => 2083.00048828125,
11229 
            'model_handle' => 2083.00048828125,
11230 
            'n_bits' => 16,
11231 
            'ownership' => 1,
11232 
            'preci_type' => 1,
11233 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11234 
            'shared_memory_name' => 'register08rd',
11235 
          },
11236 
          'needs_vhdl_wrapper' => 0,
11237 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15',
11238 
        },
11239 
        'entityName' => 'x_x40',
11240 
        'ports' => {
11241 
          'ce' => {
11242 
            'attributes' => {
11243 
              'domain' => '',
11244 
              'group' => 1,
11245 
              'isCe' => 1,
11246 
              'is_floating_block' => 1,
11247 
              'period' => 1,
11248 
              'type' => 'logic',
11249 
            },
11250 
            'direction' => 'in',
11251 
            'hdlType' => 'std_logic',
11252 
            'width' => 1,
11253 
          },
11254 
          'clk' => {
11255 
            'attributes' => {
11256 
              'domain' => '',
11257 
              'group' => 1,
11258 
              'isClk' => 1,
11259 
              'is_floating_block' => 1,
11260 
              'period' => 1,
11261 
              'type' => 'logic',
11262 
            },
11263 
            'direction' => 'in',
11264 
            'hdlType' => 'std_logic',
11265 
            'width' => 1,
11266 
          },
11267 
          'clr' => {
11268 
            'attributes' => {
11269 
              'domain' => '',
11270 
              'group' => 1,
11271 
              'isClr' => 1,
11272 
              'is_floating_block' => 1,
11273 
              'period' => 1,
11274 
              'type' => 'logic',
11275 
              'valid_bit_used' => 0,
11276 
            },
11277 
            'direction' => 'in',
11278 
            'hdlType' => 'std_logic',
11279 
            'width' => 1,
11280 
          },
11281 
          'data_in' => {
11282 
            'attributes' => {
11283 
              'bin_pt' => 0,
11284 
              'is_floating_block' => 1,
11285 
              'must_be_hdl_vector' => 1,
11286 
              'period' => 1,
11287 
              'port_id' => 0,
11288 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/data_in',
11289 
              'type' => 'UFix_32_0',
11290 
            },
11291 
            'direction' => 'in',
11292 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11293 
            'width' => 32,
11294 
          },
11295 
          'dout' => {
11296 
            'attributes' => {
11297 
              'bin_pt' => 0,
11298 
              'is_floating_block' => 1,
11299 
              'must_be_hdl_vector' => 1,
11300 
              'period' => 1,
11301 
              'port_id' => 0,
11302 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/dout',
11303 
              'type' => 'UFix_32_0',
11304 
            },
11305 
            'direction' => 'out',
11306 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11307 
            'width' => 32,
11308 
          },
11309 
          'en' => {
11310 
            'attributes' => {
11311 
              'bin_pt' => 0,
11312 
              'is_floating_block' => 1,
11313 
              'must_be_hdl_vector' => 1,
11314 
              'period' => 1,
11315 
              'port_id' => 1,
11316 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/en',
11317 
              'type' => 'Bool',
11318 
            },
11319 
            'direction' => 'in',
11320 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11321 
            'width' => 1,
11322 
          },
11323 
        },
11324 
      },
11325 
      'entityName' => 'x_x40',
11326 
    },
11327 
    'to_register16' => {
11328 
      'connections' => {
11329 
        'ce' => 'sysgen_dut.to_register16_ce',
11330 
        'clk' => 'sysgen_dut.to_register16_clk',
11331 
        'clr' => 'sysgen_dut.to_register16_clr',
11332 
        'data_in' => 'sysgen_dut.to_register16_data_in',
11333 
        'dout' => 'to_register16.dout',
11334 
        'en' => 'sysgen_dut.to_register16_en',
11335 
      },
11336 
      'entity' => {
11337 
        'attributes' => {
11338 
          'entityAlreadyNetlisted' => 1,
11339 
          'generics' => [],
11340 
          'is_floating_block' => 1,
11341 
          'mask' => {
11342 
            'Block_Handle' => 2440.00048828125,
11343 
            'Block_handle' => 2440.00048828125,
11344 
            'MDL_Handle' => 2083.00048828125,
11345 
            'MDL_handle' => 2083.00048828125,
11346 
            'arith_type' => 1,
11347 
            'bin_pt' => 14,
11348 
            'block_config' => 'sysgen_blockset:toreg_config',
11349 
            'block_handle' => 2440.00048828125,
11350 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16',
11351 
            'block_type' => 'toreg',
11352 
            'dbl_ovrd' => 0,
11353 
            'explicit_data_type' => 0,
11354 
            'gui_display_data_type' => 1,
11355 
            'init' => 0,
11356 
            'init_bit_vector' => '\'b0',
11357 
            'mdl_handle' => 2083.00048828125,
11358 
            'model_handle' => 2083.00048828125,
11359 
            'n_bits' => 16,
11360 
            'ownership' => 1,
11361 
            'preci_type' => 1,
11362 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11363 
            'shared_memory_name' => 'register09rv',
11364 
          },
11365 
          'needs_vhdl_wrapper' => 0,
11366 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16',
11367 
        },
11368 
        'entityName' => 'x_x41',
11369 
        'ports' => {
11370 
          'ce' => {
11371 
            'attributes' => {
11372 
              'domain' => '',
11373 
              'group' => 1,
11374 
              'isCe' => 1,
11375 
              'is_floating_block' => 1,
11376 
              'period' => 1,
11377 
              'type' => 'logic',
11378 
            },
11379 
            'direction' => 'in',
11380 
            'hdlType' => 'std_logic',
11381 
            'width' => 1,
11382 
          },
11383 
          'clk' => {
11384 
            'attributes' => {
11385 
              'domain' => '',
11386 
              'group' => 1,
11387 
              'isClk' => 1,
11388 
              'is_floating_block' => 1,
11389 
              'period' => 1,
11390 
              'type' => 'logic',
11391 
            },
11392 
            'direction' => 'in',
11393 
            'hdlType' => 'std_logic',
11394 
            'width' => 1,
11395 
          },
11396 
          'clr' => {
11397 
            'attributes' => {
11398 
              'domain' => '',
11399 
              'group' => 1,
11400 
              'isClr' => 1,
11401 
              'is_floating_block' => 1,
11402 
              'period' => 1,
11403 
              'type' => 'logic',
11404 
              'valid_bit_used' => 0,
11405 
            },
11406 
            'direction' => 'in',
11407 
            'hdlType' => 'std_logic',
11408 
            'width' => 1,
11409 
          },
11410 
          'data_in' => {
11411 
            'attributes' => {
11412 
              'bin_pt' => 0,
11413 
              'is_floating_block' => 1,
11414 
              'must_be_hdl_vector' => 1,
11415 
              'period' => 1,
11416 
              'port_id' => 0,
11417 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/data_in',
11418 
              'type' => 'Bool',
11419 
            },
11420 
            'direction' => 'in',
11421 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11422 
            'width' => 1,
11423 
          },
11424 
          'dout' => {
11425 
            'attributes' => {
11426 
              'bin_pt' => 0,
11427 
              'is_floating_block' => 1,
11428 
              'must_be_hdl_vector' => 1,
11429 
              'period' => 1,
11430 
              'port_id' => 0,
11431 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/dout',
11432 
              'type' => 'Bool',
11433 
            },
11434 
            'direction' => 'out',
11435 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11436 
            'width' => 1,
11437 
          },
11438 
          'en' => {
11439 
            'attributes' => {
11440 
              'bin_pt' => 0,
11441 
              'is_floating_block' => 1,
11442 
              'must_be_hdl_vector' => 1,
11443 
              'period' => 1,
11444 
              'port_id' => 1,
11445 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/en',
11446 
              'type' => 'Bool',
11447 
            },
11448 
            'direction' => 'in',
11449 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11450 
            'width' => 1,
11451 
          },
11452 
        },
11453 
      },
11454 
      'entityName' => 'x_x41',
11455 
    },
11456 
    'to_register17' => {
11457 
      'connections' => {
11458 
        'ce' => 'sysgen_dut.to_register17_ce',
11459 
        'clk' => 'sysgen_dut.to_register17_clk',
11460 
        'clr' => 'sysgen_dut.to_register17_clr',
11461 
        'data_in' => 'sysgen_dut.to_register17_data_in',
11462 
        'dout' => 'to_register17.dout',
11463 
        'en' => 'sysgen_dut.to_register17_en',
11464 
      },
11465 
      'entity' => {
11466 
        'attributes' => {
11467 
          'entityAlreadyNetlisted' => 1,
11468 
          'generics' => [],
11469 
          'is_floating_block' => 1,
11470 
          'mask' => {
11471 
            'Block_Handle' => 2441.00048828125,
11472 
            'Block_handle' => 2441.00048828125,
11473 
            'MDL_Handle' => 2083.00048828125,
11474 
            'MDL_handle' => 2083.00048828125,
11475 
            'arith_type' => 1,
11476 
            'bin_pt' => 14,
11477 
            'block_config' => 'sysgen_blockset:toreg_config',
11478 
            'block_handle' => 2441.00048828125,
11479 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17',
11480 
            'block_type' => 'toreg',
11481 
            'dbl_ovrd' => 0,
11482 
            'explicit_data_type' => 0,
11483 
            'gui_display_data_type' => 1,
11484 
            'init' => 0,
11485 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11486 
            'mdl_handle' => 2083.00048828125,
11487 
            'model_handle' => 2083.00048828125,
11488 
            'n_bits' => 16,
11489 
            'ownership' => 1,
11490 
            'preci_type' => 1,
11491 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11492 
            'shared_memory_name' => 'register09rd',
11493 
          },
11494 
          'needs_vhdl_wrapper' => 0,
11495 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17',
11496 
        },
11497 
        'entityName' => 'x_x42',
11498 
        'ports' => {
11499 
          'ce' => {
11500 
            'attributes' => {
11501 
              'domain' => '',
11502 
              'group' => 1,
11503 
              'isCe' => 1,
11504 
              'is_floating_block' => 1,
11505 
              'period' => 1,
11506 
              'type' => 'logic',
11507 
            },
11508 
            'direction' => 'in',
11509 
            'hdlType' => 'std_logic',
11510 
            'width' => 1,
11511 
          },
11512 
          'clk' => {
11513 
            'attributes' => {
11514 
              'domain' => '',
11515 
              'group' => 1,
11516 
              'isClk' => 1,
11517 
              'is_floating_block' => 1,
11518 
              'period' => 1,
11519 
              'type' => 'logic',
11520 
            },
11521 
            'direction' => 'in',
11522 
            'hdlType' => 'std_logic',
11523 
            'width' => 1,
11524 
          },
11525 
          'clr' => {
11526 
            'attributes' => {
11527 
              'domain' => '',
11528 
              'group' => 1,
11529 
              'isClr' => 1,
11530 
              'is_floating_block' => 1,
11531 
              'period' => 1,
11532 
              'type' => 'logic',
11533 
              'valid_bit_used' => 0,
11534 
            },
11535 
            'direction' => 'in',
11536 
            'hdlType' => 'std_logic',
11537 
            'width' => 1,
11538 
          },
11539 
          'data_in' => {
11540 
            'attributes' => {
11541 
              'bin_pt' => 0,
11542 
              'is_floating_block' => 1,
11543 
              'must_be_hdl_vector' => 1,
11544 
              'period' => 1,
11545 
              'port_id' => 0,
11546 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/data_in',
11547 
              'type' => 'UFix_32_0',
11548 
            },
11549 
            'direction' => 'in',
11550 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11551 
            'width' => 32,
11552 
          },
11553 
          'dout' => {
11554 
            'attributes' => {
11555 
              'bin_pt' => 0,
11556 
              'is_floating_block' => 1,
11557 
              'must_be_hdl_vector' => 1,
11558 
              'period' => 1,
11559 
              'port_id' => 0,
11560 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/dout',
11561 
              'type' => 'UFix_32_0',
11562 
            },
11563 
            'direction' => 'out',
11564 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11565 
            'width' => 32,
11566 
          },
11567 
          'en' => {
11568 
            'attributes' => {
11569 
              'bin_pt' => 0,
11570 
              'is_floating_block' => 1,
11571 
              'must_be_hdl_vector' => 1,
11572 
              'period' => 1,
11573 
              'port_id' => 1,
11574 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/en',
11575 
              'type' => 'Bool',
11576 
            },
11577 
            'direction' => 'in',
11578 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11579 
            'width' => 1,
11580 
          },
11581 
        },
11582 
      },
11583 
      'entityName' => 'x_x42',
11584 
    },
11585 
    'to_register18' => {
11586 
      'connections' => {
11587 
        'ce' => 'sysgen_dut.to_register18_ce',
11588 
        'clk' => 'sysgen_dut.to_register18_clk',
11589 
        'clr' => 'sysgen_dut.to_register18_clr',
11590 
        'data_in' => 'sysgen_dut.to_register18_data_in',
11591 
        'dout' => 'to_register18.dout',
11592 
        'en' => 'sysgen_dut.to_register18_en',
11593 
      },
11594 
      'entity' => {
11595 
        'attributes' => {
11596 
          'entityAlreadyNetlisted' => 1,
11597 
          'generics' => [],
11598 
          'is_floating_block' => 1,
11599 
          'mask' => {
11600 
            'Block_Handle' => 2442.00048828125,
11601 
            'Block_handle' => 2442.00048828125,
11602 
            'MDL_Handle' => 2083.00048828125,
11603 
            'MDL_handle' => 2083.00048828125,
11604 
            'arith_type' => 1,
11605 
            'bin_pt' => 14,
11606 
            'block_config' => 'sysgen_blockset:toreg_config',
11607 
            'block_handle' => 2442.00048828125,
11608 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18',
11609 
            'block_type' => 'toreg',
11610 
            'dbl_ovrd' => 0,
11611 
            'explicit_data_type' => 0,
11612 
            'gui_display_data_type' => 1,
11613 
            'init' => 0,
11614 
            'init_bit_vector' => '\'b0',
11615 
            'mdl_handle' => 2083.00048828125,
11616 
            'model_handle' => 2083.00048828125,
11617 
            'n_bits' => 16,
11618 
            'ownership' => 1,
11619 
            'preci_type' => 1,
11620 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11621 
            'shared_memory_name' => 'register10rv',
11622 
          },
11623 
          'needs_vhdl_wrapper' => 0,
11624 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18',
11625 
        },
11626 
        'entityName' => 'x_x43',
11627 
        'ports' => {
11628 
          'ce' => {
11629 
            'attributes' => {
11630 
              'domain' => '',
11631 
              'group' => 1,
11632 
              'isCe' => 1,
11633 
              'is_floating_block' => 1,
11634 
              'period' => 1,
11635 
              'type' => 'logic',
11636 
            },
11637 
            'direction' => 'in',
11638 
            'hdlType' => 'std_logic',
11639 
            'width' => 1,
11640 
          },
11641 
          'clk' => {
11642 
            'attributes' => {
11643 
              'domain' => '',
11644 
              'group' => 1,
11645 
              'isClk' => 1,
11646 
              'is_floating_block' => 1,
11647 
              'period' => 1,
11648 
              'type' => 'logic',
11649 
            },
11650 
            'direction' => 'in',
11651 
            'hdlType' => 'std_logic',
11652 
            'width' => 1,
11653 
          },
11654 
          'clr' => {
11655 
            'attributes' => {
11656 
              'domain' => '',
11657 
              'group' => 1,
11658 
              'isClr' => 1,
11659 
              'is_floating_block' => 1,
11660 
              'period' => 1,
11661 
              'type' => 'logic',
11662 
              'valid_bit_used' => 0,
11663 
            },
11664 
            'direction' => 'in',
11665 
            'hdlType' => 'std_logic',
11666 
            'width' => 1,
11667 
          },
11668 
          'data_in' => {
11669 
            'attributes' => {
11670 
              'bin_pt' => 0,
11671 
              'is_floating_block' => 1,
11672 
              'must_be_hdl_vector' => 1,
11673 
              'period' => 1,
11674 
              'port_id' => 0,
11675 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/data_in',
11676 
              'type' => 'Bool',
11677 
            },
11678 
            'direction' => 'in',
11679 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11680 
            'width' => 1,
11681 
          },
11682 
          'dout' => {
11683 
            'attributes' => {
11684 
              'bin_pt' => 0,
11685 
              'is_floating_block' => 1,
11686 
              'must_be_hdl_vector' => 1,
11687 
              'period' => 1,
11688 
              'port_id' => 0,
11689 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/dout',
11690 
              'type' => 'Bool',
11691 
            },
11692 
            'direction' => 'out',
11693 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11694 
            'width' => 1,
11695 
          },
11696 
          'en' => {
11697 
            'attributes' => {
11698 
              'bin_pt' => 0,
11699 
              'is_floating_block' => 1,
11700 
              'must_be_hdl_vector' => 1,
11701 
              'period' => 1,
11702 
              'port_id' => 1,
11703 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/en',
11704 
              'type' => 'Bool',
11705 
            },
11706 
            'direction' => 'in',
11707 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11708 
            'width' => 1,
11709 
          },
11710 
        },
11711 
      },
11712 
      'entityName' => 'x_x43',
11713 
    },
11714 
    'to_register19' => {
11715 
      'connections' => {
11716 
        'ce' => 'sysgen_dut.to_register19_ce',
11717 
        'clk' => 'sysgen_dut.to_register19_clk',
11718 
        'clr' => 'sysgen_dut.to_register19_clr',
11719 
        'data_in' => 'sysgen_dut.to_register19_data_in',
11720 
        'dout' => 'to_register19.dout',
11721 
        'en' => 'sysgen_dut.to_register19_en',
11722 
      },
11723 
      'entity' => {
11724 
        'attributes' => {
11725 
          'entityAlreadyNetlisted' => 1,
11726 
          'generics' => [],
11727 
          'is_floating_block' => 1,
11728 
          'mask' => {
11729 
            'Block_Handle' => 2443.00048828125,
11730 
            'Block_handle' => 2443.00048828125,
11731 
            'MDL_Handle' => 2083.00048828125,
11732 
            'MDL_handle' => 2083.00048828125,
11733 
            'arith_type' => 1,
11734 
            'bin_pt' => 14,
11735 
            'block_config' => 'sysgen_blockset:toreg_config',
11736 
            'block_handle' => 2443.00048828125,
11737 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19',
11738 
            'block_type' => 'toreg',
11739 
            'dbl_ovrd' => 0,
11740 
            'explicit_data_type' => 0,
11741 
            'gui_display_data_type' => 1,
11742 
            'init' => 0,
11743 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11744 
            'mdl_handle' => 2083.00048828125,
11745 
            'model_handle' => 2083.00048828125,
11746 
            'n_bits' => 16,
11747 
            'ownership' => 1,
11748 
            'preci_type' => 1,
11749 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11750 
            'shared_memory_name' => 'register10rd',
11751 
          },
11752 
          'needs_vhdl_wrapper' => 0,
11753 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19',
11754 
        },
11755 
        'entityName' => 'x_x44',
11756 
        'ports' => {
11757 
          'ce' => {
11758 
            'attributes' => {
11759 
              'domain' => '',
11760 
              'group' => 1,
11761 
              'isCe' => 1,
11762 
              'is_floating_block' => 1,
11763 
              'period' => 1,
11764 
              'type' => 'logic',
11765 
            },
11766 
            'direction' => 'in',
11767 
            'hdlType' => 'std_logic',
11768 
            'width' => 1,
11769 
          },
11770 
          'clk' => {
11771 
            'attributes' => {
11772 
              'domain' => '',
11773 
              'group' => 1,
11774 
              'isClk' => 1,
11775 
              'is_floating_block' => 1,
11776 
              'period' => 1,
11777 
              'type' => 'logic',
11778 
            },
11779 
            'direction' => 'in',
11780 
            'hdlType' => 'std_logic',
11781 
            'width' => 1,
11782 
          },
11783 
          'clr' => {
11784 
            'attributes' => {
11785 
              'domain' => '',
11786 
              'group' => 1,
11787 
              'isClr' => 1,
11788 
              'is_floating_block' => 1,
11789 
              'period' => 1,
11790 
              'type' => 'logic',
11791 
              'valid_bit_used' => 0,
11792 
            },
11793 
            'direction' => 'in',
11794 
            'hdlType' => 'std_logic',
11795 
            'width' => 1,
11796 
          },
11797 
          'data_in' => {
11798 
            'attributes' => {
11799 
              'bin_pt' => 0,
11800 
              'is_floating_block' => 1,
11801 
              'must_be_hdl_vector' => 1,
11802 
              'period' => 1,
11803 
              'port_id' => 0,
11804 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/data_in',
11805 
              'type' => 'UFix_32_0',
11806 
            },
11807 
            'direction' => 'in',
11808 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11809 
            'width' => 32,
11810 
          },
11811 
          'dout' => {
11812 
            'attributes' => {
11813 
              'bin_pt' => 0,
11814 
              'is_floating_block' => 1,
11815 
              'must_be_hdl_vector' => 1,
11816 
              'period' => 1,
11817 
              'port_id' => 0,
11818 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/dout',
11819 
              'type' => 'UFix_32_0',
11820 
            },
11821 
            'direction' => 'out',
11822 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11823 
            'width' => 32,
11824 
          },
11825 
          'en' => {
11826 
            'attributes' => {
11827 
              'bin_pt' => 0,
11828 
              'is_floating_block' => 1,
11829 
              'must_be_hdl_vector' => 1,
11830 
              'period' => 1,
11831 
              'port_id' => 1,
11832 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/en',
11833 
              'type' => 'Bool',
11834 
            },
11835 
            'direction' => 'in',
11836 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11837 
            'width' => 1,
11838 
          },
11839 
        },
11840 
      },
11841 
      'entityName' => 'x_x44',
11842 
    },
11843 
    'to_register2' => {
11844 
      'connections' => {
11845 
        'ce' => 'sysgen_dut.to_register2_ce',
11846 
        'clk' => 'sysgen_dut.to_register2_clk',
11847 
        'clr' => 'sysgen_dut.to_register2_clr',
11848 
        'data_in' => 'sysgen_dut.to_register2_data_in',
11849 
        'dout' => 'to_register2.dout',
11850 
        'en' => 'sysgen_dut.to_register2_en',
11851 
      },
11852 
      'entity' => {
11853 
        'attributes' => {
11854 
          'entityAlreadyNetlisted' => 1,
11855 
          'generics' => [],
11856 
          'is_floating_block' => 1,
11857 
          'mask' => {
11858 
            'Block_Handle' => 2444.00048828125,
11859 
            'Block_handle' => 2444.00048828125,
11860 
            'MDL_Handle' => 2083.00048828125,
11861 
            'MDL_handle' => 2083.00048828125,
11862 
            'arith_type' => 1,
11863 
            'bin_pt' => 14,
11864 
            'block_config' => 'sysgen_blockset:toreg_config',
11865 
            'block_handle' => 2444.00048828125,
11866 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2',
11867 
            'block_type' => 'toreg',
11868 
            'dbl_ovrd' => 0,
11869 
            'explicit_data_type' => 0,
11870 
            'gui_display_data_type' => 1,
11871 
            'init' => 0,
11872 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
11873 
            'mdl_handle' => 2083.00048828125,
11874 
            'model_handle' => 2083.00048828125,
11875 
            'n_bits' => 16,
11876 
            'ownership' => 1,
11877 
            'preci_type' => 1,
11878 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11879 
            'shared_memory_name' => 'register02rd',
11880 
          },
11881 
          'needs_vhdl_wrapper' => 0,
11882 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2',
11883 
        },
11884 
        'entityName' => 'x_x45',
11885 
        'ports' => {
11886 
          'ce' => {
11887 
            'attributes' => {
11888 
              'domain' => '',
11889 
              'group' => 1,
11890 
              'isCe' => 1,
11891 
              'is_floating_block' => 1,
11892 
              'period' => 1,
11893 
              'type' => 'logic',
11894 
            },
11895 
            'direction' => 'in',
11896 
            'hdlType' => 'std_logic',
11897 
            'width' => 1,
11898 
          },
11899 
          'clk' => {
11900 
            'attributes' => {
11901 
              'domain' => '',
11902 
              'group' => 1,
11903 
              'isClk' => 1,
11904 
              'is_floating_block' => 1,
11905 
              'period' => 1,
11906 
              'type' => 'logic',
11907 
            },
11908 
            'direction' => 'in',
11909 
            'hdlType' => 'std_logic',
11910 
            'width' => 1,
11911 
          },
11912 
          'clr' => {
11913 
            'attributes' => {
11914 
              'domain' => '',
11915 
              'group' => 1,
11916 
              'isClr' => 1,
11917 
              'is_floating_block' => 1,
11918 
              'period' => 1,
11919 
              'type' => 'logic',
11920 
              'valid_bit_used' => 0,
11921 
            },
11922 
            'direction' => 'in',
11923 
            'hdlType' => 'std_logic',
11924 
            'width' => 1,
11925 
          },
11926 
          'data_in' => {
11927 
            'attributes' => {
11928 
              'bin_pt' => 0,
11929 
              'is_floating_block' => 1,
11930 
              'must_be_hdl_vector' => 1,
11931 
              'period' => 1,
11932 
              'port_id' => 0,
11933 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/data_in',
11934 
              'type' => 'UFix_32_0',
11935 
            },
11936 
            'direction' => 'in',
11937 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11938 
            'width' => 32,
11939 
          },
11940 
          'dout' => {
11941 
            'attributes' => {
11942 
              'bin_pt' => 0,
11943 
              'is_floating_block' => 1,
11944 
              'must_be_hdl_vector' => 1,
11945 
              'period' => 1,
11946 
              'port_id' => 0,
11947 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/dout',
11948 
              'type' => 'UFix_32_0',
11949 
            },
11950 
            'direction' => 'out',
11951 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11952 
            'width' => 32,
11953 
          },
11954 
          'en' => {
11955 
            'attributes' => {
11956 
              'bin_pt' => 0,
11957 
              'is_floating_block' => 1,
11958 
              'must_be_hdl_vector' => 1,
11959 
              'period' => 1,
11960 
              'port_id' => 1,
11961 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/en',
11962 
              'type' => 'Bool',
11963 
            },
11964 
            'direction' => 'in',
11965 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11966 
            'width' => 1,
11967 
          },
11968 
        },
11969 
      },
11970 
      'entityName' => 'x_x45',
11971 
    },
11972 
    'to_register20' => {
11973 
      'connections' => {
11974 
        'ce' => 'sysgen_dut.to_register20_ce',
11975 
        'clk' => 'sysgen_dut.to_register20_clk',
11976 
        'clr' => 'sysgen_dut.to_register20_clr',
11977 
        'data_in' => 'sysgen_dut.to_register20_data_in',
11978 
        'dout' => 'to_register20.dout',
11979 
        'en' => 'sysgen_dut.to_register20_en',
11980 
      },
11981 
      'entity' => {
11982 
        'attributes' => {
11983 
          'entityAlreadyNetlisted' => 1,
11984 
          'generics' => [],
11985 
          'is_floating_block' => 1,
11986 
          'mask' => {
11987 
            'Block_Handle' => 2445.00048828125,
11988 
            'Block_handle' => 2445.00048828125,
11989 
            'MDL_Handle' => 2083.00048828125,
11990 
            'MDL_handle' => 2083.00048828125,
11991 
            'arith_type' => 1,
11992 
            'bin_pt' => 14,
11993 
            'block_config' => 'sysgen_blockset:toreg_config',
11994 
            'block_handle' => 2445.00048828125,
11995 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20',
11996 
            'block_type' => 'toreg',
11997 
            'dbl_ovrd' => 0,
11998 
            'explicit_data_type' => 0,
11999 
            'gui_display_data_type' => 1,
12000 
            'init' => 0,
12001 
            'init_bit_vector' => '\'b0',
12002 
            'mdl_handle' => 2083.00048828125,
12003 
            'model_handle' => 2083.00048828125,
12004 
            'n_bits' => 16,
12005 
            'ownership' => 1,
12006 
            'preci_type' => 1,
12007 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12008 
            'shared_memory_name' => 'register11rv',
12009 
          },
12010 
          'needs_vhdl_wrapper' => 0,
12011 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20',
12012 
        },
12013 
        'entityName' => 'x_x46',
12014 
        'ports' => {
12015 
          'ce' => {
12016 
            'attributes' => {
12017 
              'domain' => '',
12018 
              'group' => 1,
12019 
              'isCe' => 1,
12020 
              'is_floating_block' => 1,
12021 
              'period' => 1,
12022 
              'type' => 'logic',
12023 
            },
12024 
            'direction' => 'in',
12025 
            'hdlType' => 'std_logic',
12026 
            'width' => 1,
12027 
          },
12028 
          'clk' => {
12029 
            'attributes' => {
12030 
              'domain' => '',
12031 
              'group' => 1,
12032 
              'isClk' => 1,
12033 
              'is_floating_block' => 1,
12034 
              'period' => 1,
12035 
              'type' => 'logic',
12036 
            },
12037 
            'direction' => 'in',
12038 
            'hdlType' => 'std_logic',
12039 
            'width' => 1,
12040 
          },
12041 
          'clr' => {
12042 
            'attributes' => {
12043 
              'domain' => '',
12044 
              'group' => 1,
12045 
              'isClr' => 1,
12046 
              'is_floating_block' => 1,
12047 
              'period' => 1,
12048 
              'type' => 'logic',
12049 
              'valid_bit_used' => 0,
12050 
            },
12051 
            'direction' => 'in',
12052 
            'hdlType' => 'std_logic',
12053 
            'width' => 1,
12054 
          },
12055 
          'data_in' => {
12056 
            'attributes' => {
12057 
              'bin_pt' => 0,
12058 
              'is_floating_block' => 1,
12059 
              'must_be_hdl_vector' => 1,
12060 
              'period' => 1,
12061 
              'port_id' => 0,
12062 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/data_in',
12063 
              'type' => 'Bool',
12064 
            },
12065 
            'direction' => 'in',
12066 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12067 
            'width' => 1,
12068 
          },
12069 
          'dout' => {
12070 
            'attributes' => {
12071 
              'bin_pt' => 0,
12072 
              'is_floating_block' => 1,
12073 
              'must_be_hdl_vector' => 1,
12074 
              'period' => 1,
12075 
              'port_id' => 0,
12076 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/dout',
12077 
              'type' => 'Bool',
12078 
            },
12079 
            'direction' => 'out',
12080 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12081 
            'width' => 1,
12082 
          },
12083 
          'en' => {
12084 
            'attributes' => {
12085 
              'bin_pt' => 0,
12086 
              'is_floating_block' => 1,
12087 
              'must_be_hdl_vector' => 1,
12088 
              'period' => 1,
12089 
              'port_id' => 1,
12090 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/en',
12091 
              'type' => 'Bool',
12092 
            },
12093 
            'direction' => 'in',
12094 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12095 
            'width' => 1,
12096 
          },
12097 
        },
12098 
      },
12099 
      'entityName' => 'x_x46',
12100 
    },
12101 
    'to_register21' => {
12102 
      'connections' => {
12103 
        'ce' => 'sysgen_dut.to_register21_ce',
12104 
        'clk' => 'sysgen_dut.to_register21_clk',
12105 
        'clr' => 'sysgen_dut.to_register21_clr',
12106 
        'data_in' => 'sysgen_dut.to_register21_data_in',
12107 
        'dout' => 'to_register21.dout',
12108 
        'en' => 'sysgen_dut.to_register21_en',
12109 
      },
12110 
      'entity' => {
12111 
        'attributes' => {
12112 
          'entityAlreadyNetlisted' => 1,
12113 
          'generics' => [],
12114 
          'is_floating_block' => 1,
12115 
          'mask' => {
12116 
            'Block_Handle' => 2446.00048828125,
12117 
            'Block_handle' => 2446.00048828125,
12118 
            'MDL_Handle' => 2083.00048828125,
12119 
            'MDL_handle' => 2083.00048828125,
12120 
            'arith_type' => 1,
12121 
            'bin_pt' => 14,
12122 
            'block_config' => 'sysgen_blockset:toreg_config',
12123 
            'block_handle' => 2446.00048828125,
12124 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21',
12125 
            'block_type' => 'toreg',
12126 
            'dbl_ovrd' => 0,
12127 
            'explicit_data_type' => 0,
12128 
            'gui_display_data_type' => 1,
12129 
            'init' => 0,
12130 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12131 
            'mdl_handle' => 2083.00048828125,
12132 
            'model_handle' => 2083.00048828125,
12133 
            'n_bits' => 16,
12134 
            'ownership' => 1,
12135 
            'preci_type' => 1,
12136 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12137 
            'shared_memory_name' => 'register11rd',
12138 
          },
12139 
          'needs_vhdl_wrapper' => 0,
12140 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21',
12141 
        },
12142 
        'entityName' => 'x_x47',
12143 
        'ports' => {
12144 
          'ce' => {
12145 
            'attributes' => {
12146 
              'domain' => '',
12147 
              'group' => 1,
12148 
              'isCe' => 1,
12149 
              'is_floating_block' => 1,
12150 
              'period' => 1,
12151 
              'type' => 'logic',
12152 
            },
12153 
            'direction' => 'in',
12154 
            'hdlType' => 'std_logic',
12155 
            'width' => 1,
12156 
          },
12157 
          'clk' => {
12158 
            'attributes' => {
12159 
              'domain' => '',
12160 
              'group' => 1,
12161 
              'isClk' => 1,
12162 
              'is_floating_block' => 1,
12163 
              'period' => 1,
12164 
              'type' => 'logic',
12165 
            },
12166 
            'direction' => 'in',
12167 
            'hdlType' => 'std_logic',
12168 
            'width' => 1,
12169 
          },
12170 
          'clr' => {
12171 
            'attributes' => {
12172 
              'domain' => '',
12173 
              'group' => 1,
12174 
              'isClr' => 1,
12175 
              'is_floating_block' => 1,
12176 
              'period' => 1,
12177 
              'type' => 'logic',
12178 
              'valid_bit_used' => 0,
12179 
            },
12180 
            'direction' => 'in',
12181 
            'hdlType' => 'std_logic',
12182 
            'width' => 1,
12183 
          },
12184 
          'data_in' => {
12185 
            'attributes' => {
12186 
              'bin_pt' => 0,
12187 
              'is_floating_block' => 1,
12188 
              'must_be_hdl_vector' => 1,
12189 
              'period' => 1,
12190 
              'port_id' => 0,
12191 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/data_in',
12192 
              'type' => 'UFix_32_0',
12193 
            },
12194 
            'direction' => 'in',
12195 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12196 
            'width' => 32,
12197 
          },
12198 
          'dout' => {
12199 
            'attributes' => {
12200 
              'bin_pt' => 0,
12201 
              'is_floating_block' => 1,
12202 
              'must_be_hdl_vector' => 1,
12203 
              'period' => 1,
12204 
              'port_id' => 0,
12205 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/dout',
12206 
              'type' => 'UFix_32_0',
12207 
            },
12208 
            'direction' => 'out',
12209 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12210 
            'width' => 32,
12211 
          },
12212 
          'en' => {
12213 
            'attributes' => {
12214 
              'bin_pt' => 0,
12215 
              'is_floating_block' => 1,
12216 
              'must_be_hdl_vector' => 1,
12217 
              'period' => 1,
12218 
              'port_id' => 1,
12219 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/en',
12220 
              'type' => 'Bool',
12221 
            },
12222 
            'direction' => 'in',
12223 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12224 
            'width' => 1,
12225 
          },
12226 
        },
12227 
      },
12228 
      'entityName' => 'x_x47',
12229 
    },
12230 
    'to_register22' => {
12231 
      'connections' => {
12232 
        'ce' => 'sysgen_dut.to_register22_ce',
12233 
        'clk' => 'sysgen_dut.to_register22_clk',
12234 
        'clr' => 'sysgen_dut.to_register22_clr',
12235 
        'data_in' => 'sysgen_dut.to_register22_data_in',
12236 
        'dout' => 'to_register22.dout',
12237 
        'en' => 'sysgen_dut.to_register22_en',
12238 
      },
12239 
      'entity' => {
12240 
        'attributes' => {
12241 
          'entityAlreadyNetlisted' => 1,
12242 
          'generics' => [],
12243 
          'is_floating_block' => 1,
12244 
          'mask' => {
12245 
            'Block_Handle' => 2447.00048828125,
12246 
            'Block_handle' => 2447.00048828125,
12247 
            'MDL_Handle' => 2083.00048828125,
12248 
            'MDL_handle' => 2083.00048828125,
12249 
            'arith_type' => 1,
12250 
            'bin_pt' => 14,
12251 
            'block_config' => 'sysgen_blockset:toreg_config',
12252 
            'block_handle' => 2447.00048828125,
12253 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22',
12254 
            'block_type' => 'toreg',
12255 
            'dbl_ovrd' => 0,
12256 
            'explicit_data_type' => 0,
12257 
            'gui_display_data_type' => 1,
12258 
            'init' => 0,
12259 
            'init_bit_vector' => '\'b0',
12260 
            'mdl_handle' => 2083.00048828125,
12261 
            'model_handle' => 2083.00048828125,
12262 
            'n_bits' => 16,
12263 
            'ownership' => 1,
12264 
            'preci_type' => 1,
12265 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12266 
            'shared_memory_name' => 'register12rv',
12267 
          },
12268 
          'needs_vhdl_wrapper' => 0,
12269 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22',
12270 
        },
12271 
        'entityName' => 'x_x48',
12272 
        'ports' => {
12273 
          'ce' => {
12274 
            'attributes' => {
12275 
              'domain' => '',
12276 
              'group' => 1,
12277 
              'isCe' => 1,
12278 
              'is_floating_block' => 1,
12279 
              'period' => 1,
12280 
              'type' => 'logic',
12281 
            },
12282 
            'direction' => 'in',
12283 
            'hdlType' => 'std_logic',
12284 
            'width' => 1,
12285 
          },
12286 
          'clk' => {
12287 
            'attributes' => {
12288 
              'domain' => '',
12289 
              'group' => 1,
12290 
              'isClk' => 1,
12291 
              'is_floating_block' => 1,
12292 
              'period' => 1,
12293 
              'type' => 'logic',
12294 
            },
12295 
            'direction' => 'in',
12296 
            'hdlType' => 'std_logic',
12297 
            'width' => 1,
12298 
          },
12299 
          'clr' => {
12300 
            'attributes' => {
12301 
              'domain' => '',
12302 
              'group' => 1,
12303 
              'isClr' => 1,
12304 
              'is_floating_block' => 1,
12305 
              'period' => 1,
12306 
              'type' => 'logic',
12307 
              'valid_bit_used' => 0,
12308 
            },
12309 
            'direction' => 'in',
12310 
            'hdlType' => 'std_logic',
12311 
            'width' => 1,
12312 
          },
12313 
          'data_in' => {
12314 
            'attributes' => {
12315 
              'bin_pt' => 0,
12316 
              'is_floating_block' => 1,
12317 
              'must_be_hdl_vector' => 1,
12318 
              'period' => 1,
12319 
              'port_id' => 0,
12320 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/data_in',
12321 
              'type' => 'Bool',
12322 
            },
12323 
            'direction' => 'in',
12324 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12325 
            'width' => 1,
12326 
          },
12327 
          'dout' => {
12328 
            'attributes' => {
12329 
              'bin_pt' => 0,
12330 
              'is_floating_block' => 1,
12331 
              'must_be_hdl_vector' => 1,
12332 
              'period' => 1,
12333 
              'port_id' => 0,
12334 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/dout',
12335 
              'type' => 'Bool',
12336 
            },
12337 
            'direction' => 'out',
12338 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12339 
            'width' => 1,
12340 
          },
12341 
          'en' => {
12342 
            'attributes' => {
12343 
              'bin_pt' => 0,
12344 
              'is_floating_block' => 1,
12345 
              'must_be_hdl_vector' => 1,
12346 
              'period' => 1,
12347 
              'port_id' => 1,
12348 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/en',
12349 
              'type' => 'Bool',
12350 
            },
12351 
            'direction' => 'in',
12352 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12353 
            'width' => 1,
12354 
          },
12355 
        },
12356 
      },
12357 
      'entityName' => 'x_x48',
12358 
    },
12359 
    'to_register23' => {
12360 
      'connections' => {
12361 
        'ce' => 'sysgen_dut.to_register23_ce',
12362 
        'clk' => 'sysgen_dut.to_register23_clk',
12363 
        'clr' => 'sysgen_dut.to_register23_clr',
12364 
        'data_in' => 'sysgen_dut.to_register23_data_in',
12365 
        'dout' => 'to_register23.dout',
12366 
        'en' => 'sysgen_dut.to_register23_en',
12367 
      },
12368 
      'entity' => {
12369 
        'attributes' => {
12370 
          'entityAlreadyNetlisted' => 1,
12371 
          'generics' => [],
12372 
          'is_floating_block' => 1,
12373 
          'mask' => {
12374 
            'Block_Handle' => 2448.00048828125,
12375 
            'Block_handle' => 2448.00048828125,
12376 
            'MDL_Handle' => 2083.00048828125,
12377 
            'MDL_handle' => 2083.00048828125,
12378 
            'arith_type' => 1,
12379 
            'bin_pt' => 14,
12380 
            'block_config' => 'sysgen_blockset:toreg_config',
12381 
            'block_handle' => 2448.00048828125,
12382 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23',
12383 
            'block_type' => 'toreg',
12384 
            'dbl_ovrd' => 0,
12385 
            'explicit_data_type' => 0,
12386 
            'gui_display_data_type' => 1,
12387 
            'init' => 0,
12388 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12389 
            'mdl_handle' => 2083.00048828125,
12390 
            'model_handle' => 2083.00048828125,
12391 
            'n_bits' => 16,
12392 
            'ownership' => 1,
12393 
            'preci_type' => 1,
12394 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12395 
            'shared_memory_name' => 'register12rd',
12396 
          },
12397 
          'needs_vhdl_wrapper' => 0,
12398 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23',
12399 
        },
12400 
        'entityName' => 'x_x49',
12401 
        'ports' => {
12402 
          'ce' => {
12403 
            'attributes' => {
12404 
              'domain' => '',
12405 
              'group' => 1,
12406 
              'isCe' => 1,
12407 
              'is_floating_block' => 1,
12408 
              'period' => 1,
12409 
              'type' => 'logic',
12410 
            },
12411 
            'direction' => 'in',
12412 
            'hdlType' => 'std_logic',
12413 
            'width' => 1,
12414 
          },
12415 
          'clk' => {
12416 
            'attributes' => {
12417 
              'domain' => '',
12418 
              'group' => 1,
12419 
              'isClk' => 1,
12420 
              'is_floating_block' => 1,
12421 
              'period' => 1,
12422 
              'type' => 'logic',
12423 
            },
12424 
            'direction' => 'in',
12425 
            'hdlType' => 'std_logic',
12426 
            'width' => 1,
12427 
          },
12428 
          'clr' => {
12429 
            'attributes' => {
12430 
              'domain' => '',
12431 
              'group' => 1,
12432 
              'isClr' => 1,
12433 
              'is_floating_block' => 1,
12434 
              'period' => 1,
12435 
              'type' => 'logic',
12436 
              'valid_bit_used' => 0,
12437 
            },
12438 
            'direction' => 'in',
12439 
            'hdlType' => 'std_logic',
12440 
            'width' => 1,
12441 
          },
12442 
          'data_in' => {
12443 
            'attributes' => {
12444 
              'bin_pt' => 0,
12445 
              'is_floating_block' => 1,
12446 
              'must_be_hdl_vector' => 1,
12447 
              'period' => 1,
12448 
              'port_id' => 0,
12449 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/data_in',
12450 
              'type' => 'UFix_32_0',
12451 
            },
12452 
            'direction' => 'in',
12453 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12454 
            'width' => 32,
12455 
          },
12456 
          'dout' => {
12457 
            'attributes' => {
12458 
              'bin_pt' => 0,
12459 
              'is_floating_block' => 1,
12460 
              'must_be_hdl_vector' => 1,
12461 
              'period' => 1,
12462 
              'port_id' => 0,
12463 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/dout',
12464 
              'type' => 'UFix_32_0',
12465 
            },
12466 
            'direction' => 'out',
12467 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12468 
            'width' => 32,
12469 
          },
12470 
          'en' => {
12471 
            'attributes' => {
12472 
              'bin_pt' => 0,
12473 
              'is_floating_block' => 1,
12474 
              'must_be_hdl_vector' => 1,
12475 
              'period' => 1,
12476 
              'port_id' => 1,
12477 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/en',
12478 
              'type' => 'Bool',
12479 
            },
12480 
            'direction' => 'in',
12481 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12482 
            'width' => 1,
12483 
          },
12484 
        },
12485 
      },
12486 
      'entityName' => 'x_x49',
12487 
    },
12488 
    'to_register24' => {
12489 
      'connections' => {
12490 
        'ce' => 'sysgen_dut.to_register24_ce',
12491 
        'clk' => 'sysgen_dut.to_register24_clk',
12492 
        'clr' => 'sysgen_dut.to_register24_clr',
12493 
        'data_in' => 'sysgen_dut.to_register24_data_in',
12494 
        'dout' => 'to_register24.dout',
12495 
        'en' => 'sysgen_dut.to_register24_en',
12496 
      },
12497 
      'entity' => {
12498 
        'attributes' => {
12499 
          'entityAlreadyNetlisted' => 1,
12500 
          'generics' => [],
12501 
          'is_floating_block' => 1,
12502 
          'mask' => {
12503 
            'Block_Handle' => 2449.00048828125,
12504 
            'Block_handle' => 2449.00048828125,
12505 
            'MDL_Handle' => 2083.00048828125,
12506 
            'MDL_handle' => 2083.00048828125,
12507 
            'arith_type' => 1,
12508 
            'bin_pt' => 14,
12509 
            'block_config' => 'sysgen_blockset:toreg_config',
12510 
            'block_handle' => 2449.00048828125,
12511 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24',
12512 
            'block_type' => 'toreg',
12513 
            'dbl_ovrd' => 0,
12514 
            'explicit_data_type' => 0,
12515 
            'gui_display_data_type' => 1,
12516 
            'init' => 0,
12517 
            'init_bit_vector' => '\'b0',
12518 
            'mdl_handle' => 2083.00048828125,
12519 
            'model_handle' => 2083.00048828125,
12520 
            'n_bits' => 16,
12521 
            'ownership' => 1,
12522 
            'preci_type' => 1,
12523 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12524 
            'shared_memory_name' => 'register13rv',
12525 
          },
12526 
          'needs_vhdl_wrapper' => 0,
12527 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24',
12528 
        },
12529 
        'entityName' => 'x_x50',
12530 
        'ports' => {
12531 
          'ce' => {
12532 
            'attributes' => {
12533 
              'domain' => '',
12534 
              'group' => 1,
12535 
              'isCe' => 1,
12536 
              'is_floating_block' => 1,
12537 
              'period' => 1,
12538 
              'type' => 'logic',
12539 
            },
12540 
            'direction' => 'in',
12541 
            'hdlType' => 'std_logic',
12542 
            'width' => 1,
12543 
          },
12544 
          'clk' => {
12545 
            'attributes' => {
12546 
              'domain' => '',
12547 
              'group' => 1,
12548 
              'isClk' => 1,
12549 
              'is_floating_block' => 1,
12550 
              'period' => 1,
12551 
              'type' => 'logic',
12552 
            },
12553 
            'direction' => 'in',
12554 
            'hdlType' => 'std_logic',
12555 
            'width' => 1,
12556 
          },
12557 
          'clr' => {
12558 
            'attributes' => {
12559 
              'domain' => '',
12560 
              'group' => 1,
12561 
              'isClr' => 1,
12562 
              'is_floating_block' => 1,
12563 
              'period' => 1,
12564 
              'type' => 'logic',
12565 
              'valid_bit_used' => 0,
12566 
            },
12567 
            'direction' => 'in',
12568 
            'hdlType' => 'std_logic',
12569 
            'width' => 1,
12570 
          },
12571 
          'data_in' => {
12572 
            'attributes' => {
12573 
              'bin_pt' => 0,
12574 
              'is_floating_block' => 1,
12575 
              'must_be_hdl_vector' => 1,
12576 
              'period' => 1,
12577 
              'port_id' => 0,
12578 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/data_in',
12579 
              'type' => 'Bool',
12580 
            },
12581 
            'direction' => 'in',
12582 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12583 
            'width' => 1,
12584 
          },
12585 
          'dout' => {
12586 
            'attributes' => {
12587 
              'bin_pt' => 0,
12588 
              'is_floating_block' => 1,
12589 
              'must_be_hdl_vector' => 1,
12590 
              'period' => 1,
12591 
              'port_id' => 0,
12592 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/dout',
12593 
              'type' => 'Bool',
12594 
            },
12595 
            'direction' => 'out',
12596 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12597 
            'width' => 1,
12598 
          },
12599 
          'en' => {
12600 
            'attributes' => {
12601 
              'bin_pt' => 0,
12602 
              'is_floating_block' => 1,
12603 
              'must_be_hdl_vector' => 1,
12604 
              'period' => 1,
12605 
              'port_id' => 1,
12606 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/en',
12607 
              'type' => 'Bool',
12608 
            },
12609 
            'direction' => 'in',
12610 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12611 
            'width' => 1,
12612 
          },
12613 
        },
12614 
      },
12615 
      'entityName' => 'x_x50',
12616 
    },
12617 
    'to_register25' => {
12618 
      'connections' => {
12619 
        'ce' => 'sysgen_dut.to_register25_ce',
12620 
        'clk' => 'sysgen_dut.to_register25_clk',
12621 
        'clr' => 'sysgen_dut.to_register25_clr',
12622 
        'data_in' => 'sysgen_dut.to_register25_data_in',
12623 
        'dout' => 'to_register25.dout',
12624 
        'en' => 'sysgen_dut.to_register25_en',
12625 
      },
12626 
      'entity' => {
12627 
        'attributes' => {
12628 
          'entityAlreadyNetlisted' => 1,
12629 
          'generics' => [],
12630 
          'is_floating_block' => 1,
12631 
          'mask' => {
12632 
            'Block_Handle' => 2450.00048828125,
12633 
            'Block_handle' => 2450.00048828125,
12634 
            'MDL_Handle' => 2083.00048828125,
12635 
            'MDL_handle' => 2083.00048828125,
12636 
            'arith_type' => 1,
12637 
            'bin_pt' => 14,
12638 
            'block_config' => 'sysgen_blockset:toreg_config',
12639 
            'block_handle' => 2450.00048828125,
12640 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25',
12641 
            'block_type' => 'toreg',
12642 
            'dbl_ovrd' => 0,
12643 
            'explicit_data_type' => 0,
12644 
            'gui_display_data_type' => 1,
12645 
            'init' => 0,
12646 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12647 
            'mdl_handle' => 2083.00048828125,
12648 
            'model_handle' => 2083.00048828125,
12649 
            'n_bits' => 16,
12650 
            'ownership' => 1,
12651 
            'preci_type' => 1,
12652 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12653 
            'shared_memory_name' => 'register13rd',
12654 
          },
12655 
          'needs_vhdl_wrapper' => 0,
12656 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25',
12657 
        },
12658 
        'entityName' => 'x_x51',
12659 
        'ports' => {
12660 
          'ce' => {
12661 
            'attributes' => {
12662 
              'domain' => '',
12663 
              'group' => 1,
12664 
              'isCe' => 1,
12665 
              'is_floating_block' => 1,
12666 
              'period' => 1,
12667 
              'type' => 'logic',
12668 
            },
12669 
            'direction' => 'in',
12670 
            'hdlType' => 'std_logic',
12671 
            'width' => 1,
12672 
          },
12673 
          'clk' => {
12674 
            'attributes' => {
12675 
              'domain' => '',
12676 
              'group' => 1,
12677 
              'isClk' => 1,
12678 
              'is_floating_block' => 1,
12679 
              'period' => 1,
12680 
              'type' => 'logic',
12681 
            },
12682 
            'direction' => 'in',
12683 
            'hdlType' => 'std_logic',
12684 
            'width' => 1,
12685 
          },
12686 
          'clr' => {
12687 
            'attributes' => {
12688 
              'domain' => '',
12689 
              'group' => 1,
12690 
              'isClr' => 1,
12691 
              'is_floating_block' => 1,
12692 
              'period' => 1,
12693 
              'type' => 'logic',
12694 
              'valid_bit_used' => 0,
12695 
            },
12696 
            'direction' => 'in',
12697 
            'hdlType' => 'std_logic',
12698 
            'width' => 1,
12699 
          },
12700 
          'data_in' => {
12701 
            'attributes' => {
12702 
              'bin_pt' => 0,
12703 
              'is_floating_block' => 1,
12704 
              'must_be_hdl_vector' => 1,
12705 
              'period' => 1,
12706 
              'port_id' => 0,
12707 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/data_in',
12708 
              'type' => 'UFix_32_0',
12709 
            },
12710 
            'direction' => 'in',
12711 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12712 
            'width' => 32,
12713 
          },
12714 
          'dout' => {
12715 
            'attributes' => {
12716 
              'bin_pt' => 0,
12717 
              'is_floating_block' => 1,
12718 
              'must_be_hdl_vector' => 1,
12719 
              'period' => 1,
12720 
              'port_id' => 0,
12721 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/dout',
12722 
              'type' => 'UFix_32_0',
12723 
            },
12724 
            'direction' => 'out',
12725 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12726 
            'width' => 32,
12727 
          },
12728 
          'en' => {
12729 
            'attributes' => {
12730 
              'bin_pt' => 0,
12731 
              'is_floating_block' => 1,
12732 
              'must_be_hdl_vector' => 1,
12733 
              'period' => 1,
12734 
              'port_id' => 1,
12735 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/en',
12736 
              'type' => 'Bool',
12737 
            },
12738 
            'direction' => 'in',
12739 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12740 
            'width' => 1,
12741 
          },
12742 
        },
12743 
      },
12744 
      'entityName' => 'x_x51',
12745 
    },
12746 
    'to_register26' => {
12747 
      'connections' => {
12748 
        'ce' => 'sysgen_dut.to_register26_ce',
12749 
        'clk' => 'sysgen_dut.to_register26_clk',
12750 
        'clr' => 'sysgen_dut.to_register26_clr',
12751 
        'data_in' => 'sysgen_dut.to_register26_data_in',
12752 
        'dout' => 'to_register26.dout',
12753 
        'en' => 'sysgen_dut.to_register26_en',
12754 
      },
12755 
      'entity' => {
12756 
        'attributes' => {
12757 
          'entityAlreadyNetlisted' => 1,
12758 
          'generics' => [],
12759 
          'is_floating_block' => 1,
12760 
          'mask' => {
12761 
            'Block_Handle' => 2451.00048828125,
12762 
            'Block_handle' => 2451.00048828125,
12763 
            'MDL_Handle' => 2083.00048828125,
12764 
            'MDL_handle' => 2083.00048828125,
12765 
            'arith_type' => 1,
12766 
            'bin_pt' => 14,
12767 
            'block_config' => 'sysgen_blockset:toreg_config',
12768 
            'block_handle' => 2451.00048828125,
12769 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26',
12770 
            'block_type' => 'toreg',
12771 
            'dbl_ovrd' => 0,
12772 
            'explicit_data_type' => 0,
12773 
            'gui_display_data_type' => 1,
12774 
            'init' => 0,
12775 
            'init_bit_vector' => '\'b0',
12776 
            'mdl_handle' => 2083.00048828125,
12777 
            'model_handle' => 2083.00048828125,
12778 
            'n_bits' => 16,
12779 
            'ownership' => 1,
12780 
            'preci_type' => 1,
12781 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12782 
            'shared_memory_name' => 'register14rv',
12783 
          },
12784 
          'needs_vhdl_wrapper' => 0,
12785 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26',
12786 
        },
12787 
        'entityName' => 'x_x52',
12788 
        'ports' => {
12789 
          'ce' => {
12790 
            'attributes' => {
12791 
              'domain' => '',
12792 
              'group' => 1,
12793 
              'isCe' => 1,
12794 
              'is_floating_block' => 1,
12795 
              'period' => 1,
12796 
              'type' => 'logic',
12797 
            },
12798 
            'direction' => 'in',
12799 
            'hdlType' => 'std_logic',
12800 
            'width' => 1,
12801 
          },
12802 
          'clk' => {
12803 
            'attributes' => {
12804 
              'domain' => '',
12805 
              'group' => 1,
12806 
              'isClk' => 1,
12807 
              'is_floating_block' => 1,
12808 
              'period' => 1,
12809 
              'type' => 'logic',
12810 
            },
12811 
            'direction' => 'in',
12812 
            'hdlType' => 'std_logic',
12813 
            'width' => 1,
12814 
          },
12815 
          'clr' => {
12816 
            'attributes' => {
12817 
              'domain' => '',
12818 
              'group' => 1,
12819 
              'isClr' => 1,
12820 
              'is_floating_block' => 1,
12821 
              'period' => 1,
12822 
              'type' => 'logic',
12823 
              'valid_bit_used' => 0,
12824 
            },
12825 
            'direction' => 'in',
12826 
            'hdlType' => 'std_logic',
12827 
            'width' => 1,
12828 
          },
12829 
          'data_in' => {
12830 
            'attributes' => {
12831 
              'bin_pt' => 0,
12832 
              'is_floating_block' => 1,
12833 
              'must_be_hdl_vector' => 1,
12834 
              'period' => 1,
12835 
              'port_id' => 0,
12836 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/data_in',
12837 
              'type' => 'Bool',
12838 
            },
12839 
            'direction' => 'in',
12840 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12841 
            'width' => 1,
12842 
          },
12843 
          'dout' => {
12844 
            'attributes' => {
12845 
              'bin_pt' => 0,
12846 
              'is_floating_block' => 1,
12847 
              'must_be_hdl_vector' => 1,
12848 
              'period' => 1,
12849 
              'port_id' => 0,
12850 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/dout',
12851 
              'type' => 'Bool',
12852 
            },
12853 
            'direction' => 'out',
12854 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12855 
            'width' => 1,
12856 
          },
12857 
          'en' => {
12858 
            'attributes' => {
12859 
              'bin_pt' => 0,
12860 
              'is_floating_block' => 1,
12861 
              'must_be_hdl_vector' => 1,
12862 
              'period' => 1,
12863 
              'port_id' => 1,
12864 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/en',
12865 
              'type' => 'Bool',
12866 
            },
12867 
            'direction' => 'in',
12868 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12869 
            'width' => 1,
12870 
          },
12871 
        },
12872 
      },
12873 
      'entityName' => 'x_x52',
12874 
    },
12875 
    'to_register27' => {
12876 
      'connections' => {
12877 
        'ce' => 'sysgen_dut.to_register27_ce',
12878 
        'clk' => 'sysgen_dut.to_register27_clk',
12879 
        'clr' => 'sysgen_dut.to_register27_clr',
12880 
        'data_in' => 'sysgen_dut.to_register27_data_in',
12881 
        'dout' => 'to_register27.dout',
12882 
        'en' => 'sysgen_dut.to_register27_en',
12883 
      },
12884 
      'entity' => {
12885 
        'attributes' => {
12886 
          'entityAlreadyNetlisted' => 1,
12887 
          'generics' => [],
12888 
          'is_floating_block' => 1,
12889 
          'mask' => {
12890 
            'Block_Handle' => 2452.00048828125,
12891 
            'Block_handle' => 2452.00048828125,
12892 
            'MDL_Handle' => 2083.00048828125,
12893 
            'MDL_handle' => 2083.00048828125,
12894 
            'arith_type' => 1,
12895 
            'bin_pt' => 14,
12896 
            'block_config' => 'sysgen_blockset:toreg_config',
12897 
            'block_handle' => 2452.00048828125,
12898 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27',
12899 
            'block_type' => 'toreg',
12900 
            'dbl_ovrd' => 0,
12901 
            'explicit_data_type' => 0,
12902 
            'gui_display_data_type' => 1,
12903 
            'init' => 0,
12904 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
12905 
            'mdl_handle' => 2083.00048828125,
12906 
            'model_handle' => 2083.00048828125,
12907 
            'n_bits' => 16,
12908 
            'ownership' => 1,
12909 
            'preci_type' => 1,
12910 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12911 
            'shared_memory_name' => 'register14rd',
12912 
          },
12913 
          'needs_vhdl_wrapper' => 0,
12914 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27',
12915 
        },
12916 
        'entityName' => 'x_x53',
12917 
        'ports' => {
12918 
          'ce' => {
12919 
            'attributes' => {
12920 
              'domain' => '',
12921 
              'group' => 1,
12922 
              'isCe' => 1,
12923 
              'is_floating_block' => 1,
12924 
              'period' => 1,
12925 
              'type' => 'logic',
12926 
            },
12927 
            'direction' => 'in',
12928 
            'hdlType' => 'std_logic',
12929 
            'width' => 1,
12930 
          },
12931 
          'clk' => {
12932 
            'attributes' => {
12933 
              'domain' => '',
12934 
              'group' => 1,
12935 
              'isClk' => 1,
12936 
              'is_floating_block' => 1,
12937 
              'period' => 1,
12938 
              'type' => 'logic',
12939 
            },
12940 
            'direction' => 'in',
12941 
            'hdlType' => 'std_logic',
12942 
            'width' => 1,
12943 
          },
12944 
          'clr' => {
12945 
            'attributes' => {
12946 
              'domain' => '',
12947 
              'group' => 1,
12948 
              'isClr' => 1,
12949 
              'is_floating_block' => 1,
12950 
              'period' => 1,
12951 
              'type' => 'logic',
12952 
              'valid_bit_used' => 0,
12953 
            },
12954 
            'direction' => 'in',
12955 
            'hdlType' => 'std_logic',
12956 
            'width' => 1,
12957 
          },
12958 
          'data_in' => {
12959 
            'attributes' => {
12960 
              'bin_pt' => 0,
12961 
              'is_floating_block' => 1,
12962 
              'must_be_hdl_vector' => 1,
12963 
              'period' => 1,
12964 
              'port_id' => 0,
12965 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/data_in',
12966 
              'type' => 'UFix_32_0',
12967 
            },
12968 
            'direction' => 'in',
12969 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12970 
            'width' => 32,
12971 
          },
12972 
          'dout' => {
12973 
            'attributes' => {
12974 
              'bin_pt' => 0,
12975 
              'is_floating_block' => 1,
12976 
              'must_be_hdl_vector' => 1,
12977 
              'period' => 1,
12978 
              'port_id' => 0,
12979 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/dout',
12980 
              'type' => 'UFix_32_0',
12981 
            },
12982 
            'direction' => 'out',
12983 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12984 
            'width' => 32,
12985 
          },
12986 
          'en' => {
12987 
            'attributes' => {
12988 
              'bin_pt' => 0,
12989 
              'is_floating_block' => 1,
12990 
              'must_be_hdl_vector' => 1,
12991 
              'period' => 1,
12992 
              'port_id' => 1,
12993 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/en',
12994 
              'type' => 'Bool',
12995 
            },
12996 
            'direction' => 'in',
12997 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12998 
            'width' => 1,
12999 
          },
13000 
        },
13001 
      },
13002 
      'entityName' => 'x_x53',
13003 
    },
13004 
    'to_register3' => {
13005 
      'connections' => {
13006 
        'ce' => 'sysgen_dut.to_register3_ce',
13007 
        'clk' => 'sysgen_dut.to_register3_clk',
13008 
        'clr' => 'sysgen_dut.to_register3_clr',
13009 
        'data_in' => 'sysgen_dut.to_register3_data_in',
13010 
        'dout' => 'to_register3.dout',
13011 
        'en' => 'sysgen_dut.to_register3_en',
13012 
      },
13013 
      'entity' => {
13014 
        'attributes' => {
13015 
          'entityAlreadyNetlisted' => 1,
13016 
          'generics' => [],
13017 
          'is_floating_block' => 1,
13018 
          'mask' => {
13019 
            'Block_Handle' => 2453.00048828125,
13020 
            'Block_handle' => 2453.00048828125,
13021 
            'MDL_Handle' => 2083.00048828125,
13022 
            'MDL_handle' => 2083.00048828125,
13023 
            'arith_type' => 1,
13024 
            'bin_pt' => 14,
13025 
            'block_config' => 'sysgen_blockset:toreg_config',
13026 
            'block_handle' => 2453.00048828125,
13027 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3',
13028 
            'block_type' => 'toreg',
13029 
            'dbl_ovrd' => 0,
13030 
            'explicit_data_type' => 0,
13031 
            'gui_display_data_type' => 1,
13032 
            'init' => 0,
13033 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13034 
            'mdl_handle' => 2083.00048828125,
13035 
            'model_handle' => 2083.00048828125,
13036 
            'n_bits' => 16,
13037 
            'ownership' => 1,
13038 
            'preci_type' => 1,
13039 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13040 
            'shared_memory_name' => 'register03rd',
13041 
          },
13042 
          'needs_vhdl_wrapper' => 0,
13043 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3',
13044 
        },
13045 
        'entityName' => 'x_x54',
13046 
        'ports' => {
13047 
          'ce' => {
13048 
            'attributes' => {
13049 
              'domain' => '',
13050 
              'group' => 1,
13051 
              'isCe' => 1,
13052 
              'is_floating_block' => 1,
13053 
              'period' => 1,
13054 
              'type' => 'logic',
13055 
            },
13056 
            'direction' => 'in',
13057 
            'hdlType' => 'std_logic',
13058 
            'width' => 1,
13059 
          },
13060 
          'clk' => {
13061 
            'attributes' => {
13062 
              'domain' => '',
13063 
              'group' => 1,
13064 
              'isClk' => 1,
13065 
              'is_floating_block' => 1,
13066 
              'period' => 1,
13067 
              'type' => 'logic',
13068 
            },
13069 
            'direction' => 'in',
13070 
            'hdlType' => 'std_logic',
13071 
            'width' => 1,
13072 
          },
13073 
          'clr' => {
13074 
            'attributes' => {
13075 
              'domain' => '',
13076 
              'group' => 1,
13077 
              'isClr' => 1,
13078 
              'is_floating_block' => 1,
13079 
              'period' => 1,
13080 
              'type' => 'logic',
13081 
              'valid_bit_used' => 0,
13082 
            },
13083 
            'direction' => 'in',
13084 
            'hdlType' => 'std_logic',
13085 
            'width' => 1,
13086 
          },
13087 
          'data_in' => {
13088 
            'attributes' => {
13089 
              'bin_pt' => 0,
13090 
              'is_floating_block' => 1,
13091 
              'must_be_hdl_vector' => 1,
13092 
              'period' => 1,
13093 
              'port_id' => 0,
13094 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/data_in',
13095 
              'type' => 'UFix_32_0',
13096 
            },
13097 
            'direction' => 'in',
13098 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13099 
            'width' => 32,
13100 
          },
13101 
          'dout' => {
13102 
            'attributes' => {
13103 
              'bin_pt' => 0,
13104 
              'is_floating_block' => 1,
13105 
              'must_be_hdl_vector' => 1,
13106 
              'period' => 1,
13107 
              'port_id' => 0,
13108 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/dout',
13109 
              'type' => 'UFix_32_0',
13110 
            },
13111 
            'direction' => 'out',
13112 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13113 
            'width' => 32,
13114 
          },
13115 
          'en' => {
13116 
            'attributes' => {
13117 
              'bin_pt' => 0,
13118 
              'is_floating_block' => 1,
13119 
              'must_be_hdl_vector' => 1,
13120 
              'period' => 1,
13121 
              'port_id' => 1,
13122 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/en',
13123 
              'type' => 'Bool',
13124 
            },
13125 
            'direction' => 'in',
13126 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13127 
            'width' => 1,
13128 
          },
13129 
        },
13130 
      },
13131 
      'entityName' => 'x_x54',
13132 
    },
13133 
    'to_register4' => {
13134 
      'connections' => {
13135 
        'ce' => 'sysgen_dut.to_register4_ce',
13136 
        'clk' => 'sysgen_dut.to_register4_clk',
13137 
        'clr' => 'sysgen_dut.to_register4_clr',
13138 
        'data_in' => 'sysgen_dut.to_register4_data_in',
13139 
        'dout' => 'to_register4.dout',
13140 
        'en' => 'sysgen_dut.to_register4_en',
13141 
      },
13142 
      'entity' => {
13143 
        'attributes' => {
13144 
          'entityAlreadyNetlisted' => 1,
13145 
          'generics' => [],
13146 
          'is_floating_block' => 1,
13147 
          'mask' => {
13148 
            'Block_Handle' => 2454.00048828125,
13149 
            'Block_handle' => 2454.00048828125,
13150 
            'MDL_Handle' => 2083.00048828125,
13151 
            'MDL_handle' => 2083.00048828125,
13152 
            'arith_type' => 1,
13153 
            'bin_pt' => 14,
13154 
            'block_config' => 'sysgen_blockset:toreg_config',
13155 
            'block_handle' => 2454.00048828125,
13156 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4',
13157 
            'block_type' => 'toreg',
13158 
            'dbl_ovrd' => 0,
13159 
            'explicit_data_type' => 0,
13160 
            'gui_display_data_type' => 1,
13161 
            'init' => 0,
13162 
            'init_bit_vector' => '\'b0',
13163 
            'mdl_handle' => 2083.00048828125,
13164 
            'model_handle' => 2083.00048828125,
13165 
            'n_bits' => 16,
13166 
            'ownership' => 1,
13167 
            'preci_type' => 1,
13168 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13169 
            'shared_memory_name' => 'register02rv',
13170 
          },
13171 
          'needs_vhdl_wrapper' => 0,
13172 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4',
13173 
        },
13174 
        'entityName' => 'x_x55',
13175 
        'ports' => {
13176 
          'ce' => {
13177 
            'attributes' => {
13178 
              'domain' => '',
13179 
              'group' => 1,
13180 
              'isCe' => 1,
13181 
              'is_floating_block' => 1,
13182 
              'period' => 1,
13183 
              'type' => 'logic',
13184 
            },
13185 
            'direction' => 'in',
13186 
            'hdlType' => 'std_logic',
13187 
            'width' => 1,
13188 
          },
13189 
          'clk' => {
13190 
            'attributes' => {
13191 
              'domain' => '',
13192 
              'group' => 1,
13193 
              'isClk' => 1,
13194 
              'is_floating_block' => 1,
13195 
              'period' => 1,
13196 
              'type' => 'logic',
13197 
            },
13198 
            'direction' => 'in',
13199 
            'hdlType' => 'std_logic',
13200 
            'width' => 1,
13201 
          },
13202 
          'clr' => {
13203 
            'attributes' => {
13204 
              'domain' => '',
13205 
              'group' => 1,
13206 
              'isClr' => 1,
13207 
              'is_floating_block' => 1,
13208 
              'period' => 1,
13209 
              'type' => 'logic',
13210 
              'valid_bit_used' => 0,
13211 
            },
13212 
            'direction' => 'in',
13213 
            'hdlType' => 'std_logic',
13214 
            'width' => 1,
13215 
          },
13216 
          'data_in' => {
13217 
            'attributes' => {
13218 
              'bin_pt' => 0,
13219 
              'is_floating_block' => 1,
13220 
              'must_be_hdl_vector' => 1,
13221 
              'period' => 1,
13222 
              'port_id' => 0,
13223 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/data_in',
13224 
              'type' => 'Bool',
13225 
            },
13226 
            'direction' => 'in',
13227 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13228 
            'width' => 1,
13229 
          },
13230 
          'dout' => {
13231 
            'attributes' => {
13232 
              'bin_pt' => 0,
13233 
              'is_floating_block' => 1,
13234 
              'must_be_hdl_vector' => 1,
13235 
              'period' => 1,
13236 
              'port_id' => 0,
13237 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/dout',
13238 
              'type' => 'Bool',
13239 
            },
13240 
            'direction' => 'out',
13241 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13242 
            'width' => 1,
13243 
          },
13244 
          'en' => {
13245 
            'attributes' => {
13246 
              'bin_pt' => 0,
13247 
              'is_floating_block' => 1,
13248 
              'must_be_hdl_vector' => 1,
13249 
              'period' => 1,
13250 
              'port_id' => 1,
13251 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/en',
13252 
              'type' => 'Bool',
13253 
            },
13254 
            'direction' => 'in',
13255 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13256 
            'width' => 1,
13257 
          },
13258 
        },
13259 
      },
13260 
      'entityName' => 'x_x55',
13261 
    },
13262 
    'to_register5' => {
13263 
      'connections' => {
13264 
        'ce' => 'sysgen_dut.to_register5_ce',
13265 
        'clk' => 'sysgen_dut.to_register5_clk',
13266 
        'clr' => 'sysgen_dut.to_register5_clr',
13267 
        'data_in' => 'sysgen_dut.to_register5_data_in',
13268 
        'dout' => 'to_register5.dout',
13269 
        'en' => 'sysgen_dut.to_register5_en',
13270 
      },
13271 
      'entity' => {
13272 
        'attributes' => {
13273 
          'entityAlreadyNetlisted' => 1,
13274 
          'generics' => [],
13275 
          'is_floating_block' => 1,
13276 
          'mask' => {
13277 
            'Block_Handle' => 2455.00048828125,
13278 
            'Block_handle' => 2455.00048828125,
13279 
            'MDL_Handle' => 2083.00048828125,
13280 
            'MDL_handle' => 2083.00048828125,
13281 
            'arith_type' => 1,
13282 
            'bin_pt' => 14,
13283 
            'block_config' => 'sysgen_blockset:toreg_config',
13284 
            'block_handle' => 2455.00048828125,
13285 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5',
13286 
            'block_type' => 'toreg',
13287 
            'dbl_ovrd' => 0,
13288 
            'explicit_data_type' => 0,
13289 
            'gui_display_data_type' => 1,
13290 
            'init' => 0,
13291 
            'init_bit_vector' => '\'b0',
13292 
            'mdl_handle' => 2083.00048828125,
13293 
            'model_handle' => 2083.00048828125,
13294 
            'n_bits' => 16,
13295 
            'ownership' => 1,
13296 
            'preci_type' => 1,
13297 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13298 
            'shared_memory_name' => 'register03rv',
13299 
          },
13300 
          'needs_vhdl_wrapper' => 0,
13301 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5',
13302 
        },
13303 
        'entityName' => 'x_x56',
13304 
        'ports' => {
13305 
          'ce' => {
13306 
            'attributes' => {
13307 
              'domain' => '',
13308 
              'group' => 1,
13309 
              'isCe' => 1,
13310 
              'is_floating_block' => 1,
13311 
              'period' => 1,
13312 
              'type' => 'logic',
13313 
            },
13314 
            'direction' => 'in',
13315 
            'hdlType' => 'std_logic',
13316 
            'width' => 1,
13317 
          },
13318 
          'clk' => {
13319 
            'attributes' => {
13320 
              'domain' => '',
13321 
              'group' => 1,
13322 
              'isClk' => 1,
13323 
              'is_floating_block' => 1,
13324 
              'period' => 1,
13325 
              'type' => 'logic',
13326 
            },
13327 
            'direction' => 'in',
13328 
            'hdlType' => 'std_logic',
13329 
            'width' => 1,
13330 
          },
13331 
          'clr' => {
13332 
            'attributes' => {
13333 
              'domain' => '',
13334 
              'group' => 1,
13335 
              'isClr' => 1,
13336 
              'is_floating_block' => 1,
13337 
              'period' => 1,
13338 
              'type' => 'logic',
13339 
              'valid_bit_used' => 0,
13340 
            },
13341 
            'direction' => 'in',
13342 
            'hdlType' => 'std_logic',
13343 
            'width' => 1,
13344 
          },
13345 
          'data_in' => {
13346 
            'attributes' => {
13347 
              'bin_pt' => 0,
13348 
              'is_floating_block' => 1,
13349 
              'must_be_hdl_vector' => 1,
13350 
              'period' => 1,
13351 
              'port_id' => 0,
13352 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/data_in',
13353 
              'type' => 'Bool',
13354 
            },
13355 
            'direction' => 'in',
13356 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13357 
            'width' => 1,
13358 
          },
13359 
          'dout' => {
13360 
            'attributes' => {
13361 
              'bin_pt' => 0,
13362 
              'is_floating_block' => 1,
13363 
              'must_be_hdl_vector' => 1,
13364 
              'period' => 1,
13365 
              'port_id' => 0,
13366 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/dout',
13367 
              'type' => 'Bool',
13368 
            },
13369 
            'direction' => 'out',
13370 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13371 
            'width' => 1,
13372 
          },
13373 
          'en' => {
13374 
            'attributes' => {
13375 
              'bin_pt' => 0,
13376 
              'is_floating_block' => 1,
13377 
              'must_be_hdl_vector' => 1,
13378 
              'period' => 1,
13379 
              'port_id' => 1,
13380 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/en',
13381 
              'type' => 'Bool',
13382 
            },
13383 
            'direction' => 'in',
13384 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13385 
            'width' => 1,
13386 
          },
13387 
        },
13388 
      },
13389 
      'entityName' => 'x_x56',
13390 
    },
13391 
    'to_register6' => {
13392 
      'connections' => {
13393 
        'ce' => 'sysgen_dut.to_register6_ce',
13394 
        'clk' => 'sysgen_dut.to_register6_clk',
13395 
        'clr' => 'sysgen_dut.to_register6_clr',
13396 
        'data_in' => 'sysgen_dut.to_register6_data_in',
13397 
        'dout' => 'to_register6.dout',
13398 
        'en' => 'sysgen_dut.to_register6_en',
13399 
      },
13400 
      'entity' => {
13401 
        'attributes' => {
13402 
          'entityAlreadyNetlisted' => 1,
13403 
          'generics' => [],
13404 
          'is_floating_block' => 1,
13405 
          'mask' => {
13406 
            'Block_Handle' => 2456.00048828125,
13407 
            'Block_handle' => 2456.00048828125,
13408 
            'MDL_Handle' => 2083.00048828125,
13409 
            'MDL_handle' => 2083.00048828125,
13410 
            'arith_type' => 1,
13411 
            'bin_pt' => 14,
13412 
            'block_config' => 'sysgen_blockset:toreg_config',
13413 
            'block_handle' => 2456.00048828125,
13414 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6',
13415 
            'block_type' => 'toreg',
13416 
            'dbl_ovrd' => 0,
13417 
            'explicit_data_type' => 0,
13418 
            'gui_display_data_type' => 1,
13419 
            'init' => 0,
13420 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13421 
            'mdl_handle' => 2083.00048828125,
13422 
            'model_handle' => 2083.00048828125,
13423 
            'n_bits' => 16,
13424 
            'ownership' => 1,
13425 
            'preci_type' => 1,
13426 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13427 
            'shared_memory_name' => 'register04rd',
13428 
          },
13429 
          'needs_vhdl_wrapper' => 0,
13430 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6',
13431 
        },
13432 
        'entityName' => 'x_x57',
13433 
        'ports' => {
13434 
          'ce' => {
13435 
            'attributes' => {
13436 
              'domain' => '',
13437 
              'group' => 1,
13438 
              'isCe' => 1,
13439 
              'is_floating_block' => 1,
13440 
              'period' => 1,
13441 
              'type' => 'logic',
13442 
            },
13443 
            'direction' => 'in',
13444 
            'hdlType' => 'std_logic',
13445 
            'width' => 1,
13446 
          },
13447 
          'clk' => {
13448 
            'attributes' => {
13449 
              'domain' => '',
13450 
              'group' => 1,
13451 
              'isClk' => 1,
13452 
              'is_floating_block' => 1,
13453 
              'period' => 1,
13454 
              'type' => 'logic',
13455 
            },
13456 
            'direction' => 'in',
13457 
            'hdlType' => 'std_logic',
13458 
            'width' => 1,
13459 
          },
13460 
          'clr' => {
13461 
            'attributes' => {
13462 
              'domain' => '',
13463 
              'group' => 1,
13464 
              'isClr' => 1,
13465 
              'is_floating_block' => 1,
13466 
              'period' => 1,
13467 
              'type' => 'logic',
13468 
              'valid_bit_used' => 0,
13469 
            },
13470 
            'direction' => 'in',
13471 
            'hdlType' => 'std_logic',
13472 
            'width' => 1,
13473 
          },
13474 
          'data_in' => {
13475 
            'attributes' => {
13476 
              'bin_pt' => 0,
13477 
              'is_floating_block' => 1,
13478 
              'must_be_hdl_vector' => 1,
13479 
              'period' => 1,
13480 
              'port_id' => 0,
13481 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/data_in',
13482 
              'type' => 'UFix_32_0',
13483 
            },
13484 
            'direction' => 'in',
13485 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13486 
            'width' => 32,
13487 
          },
13488 
          'dout' => {
13489 
            'attributes' => {
13490 
              'bin_pt' => 0,
13491 
              'is_floating_block' => 1,
13492 
              'must_be_hdl_vector' => 1,
13493 
              'period' => 1,
13494 
              'port_id' => 0,
13495 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/dout',
13496 
              'type' => 'UFix_32_0',
13497 
            },
13498 
            'direction' => 'out',
13499 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13500 
            'width' => 32,
13501 
          },
13502 
          'en' => {
13503 
            'attributes' => {
13504 
              'bin_pt' => 0,
13505 
              'is_floating_block' => 1,
13506 
              'must_be_hdl_vector' => 1,
13507 
              'period' => 1,
13508 
              'port_id' => 1,
13509 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/en',
13510 
              'type' => 'Bool',
13511 
            },
13512 
            'direction' => 'in',
13513 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13514 
            'width' => 1,
13515 
          },
13516 
        },
13517 
      },
13518 
      'entityName' => 'x_x57',
13519 
    },
13520 
    'to_register7' => {
13521 
      'connections' => {
13522 
        'ce' => 'sysgen_dut.to_register7_ce',
13523 
        'clk' => 'sysgen_dut.to_register7_clk',
13524 
        'clr' => 'sysgen_dut.to_register7_clr',
13525 
        'data_in' => 'sysgen_dut.to_register7_data_in',
13526 
        'dout' => 'to_register7.dout',
13527 
        'en' => 'sysgen_dut.to_register7_en',
13528 
      },
13529 
      'entity' => {
13530 
        'attributes' => {
13531 
          'entityAlreadyNetlisted' => 1,
13532 
          'generics' => [],
13533 
          'is_floating_block' => 1,
13534 
          'mask' => {
13535 
            'Block_Handle' => 2457.00048828125,
13536 
            'Block_handle' => 2457.00048828125,
13537 
            'MDL_Handle' => 2083.00048828125,
13538 
            'MDL_handle' => 2083.00048828125,
13539 
            'arith_type' => 1,
13540 
            'bin_pt' => 14,
13541 
            'block_config' => 'sysgen_blockset:toreg_config',
13542 
            'block_handle' => 2457.00048828125,
13543 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7',
13544 
            'block_type' => 'toreg',
13545 
            'dbl_ovrd' => 0,
13546 
            'explicit_data_type' => 0,
13547 
            'gui_display_data_type' => 1,
13548 
            'init' => 0,
13549 
            'init_bit_vector' => '\'b0',
13550 
            'mdl_handle' => 2083.00048828125,
13551 
            'model_handle' => 2083.00048828125,
13552 
            'n_bits' => 16,
13553 
            'ownership' => 1,
13554 
            'preci_type' => 1,
13555 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13556 
            'shared_memory_name' => 'register04rv',
13557 
          },
13558 
          'needs_vhdl_wrapper' => 0,
13559 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7',
13560 
        },
13561 
        'entityName' => 'x_x58',
13562 
        'ports' => {
13563 
          'ce' => {
13564 
            'attributes' => {
13565 
              'domain' => '',
13566 
              'group' => 1,
13567 
              'isCe' => 1,
13568 
              'is_floating_block' => 1,
13569 
              'period' => 1,
13570 
              'type' => 'logic',
13571 
            },
13572 
            'direction' => 'in',
13573 
            'hdlType' => 'std_logic',
13574 
            'width' => 1,
13575 
          },
13576 
          'clk' => {
13577 
            'attributes' => {
13578 
              'domain' => '',
13579 
              'group' => 1,
13580 
              'isClk' => 1,
13581 
              'is_floating_block' => 1,
13582 
              'period' => 1,
13583 
              'type' => 'logic',
13584 
            },
13585 
            'direction' => 'in',
13586 
            'hdlType' => 'std_logic',
13587 
            'width' => 1,
13588 
          },
13589 
          'clr' => {
13590 
            'attributes' => {
13591 
              'domain' => '',
13592 
              'group' => 1,
13593 
              'isClr' => 1,
13594 
              'is_floating_block' => 1,
13595 
              'period' => 1,
13596 
              'type' => 'logic',
13597 
              'valid_bit_used' => 0,
13598 
            },
13599 
            'direction' => 'in',
13600 
            'hdlType' => 'std_logic',
13601 
            'width' => 1,
13602 
          },
13603 
          'data_in' => {
13604 
            'attributes' => {
13605 
              'bin_pt' => 0,
13606 
              'is_floating_block' => 1,
13607 
              'must_be_hdl_vector' => 1,
13608 
              'period' => 1,
13609 
              'port_id' => 0,
13610 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/data_in',
13611 
              'type' => 'Bool',
13612 
            },
13613 
            'direction' => 'in',
13614 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13615 
            'width' => 1,
13616 
          },
13617 
          'dout' => {
13618 
            'attributes' => {
13619 
              'bin_pt' => 0,
13620 
              'is_floating_block' => 1,
13621 
              'must_be_hdl_vector' => 1,
13622 
              'period' => 1,
13623 
              'port_id' => 0,
13624 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/dout',
13625 
              'type' => 'Bool',
13626 
            },
13627 
            'direction' => 'out',
13628 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13629 
            'width' => 1,
13630 
          },
13631 
          'en' => {
13632 
            'attributes' => {
13633 
              'bin_pt' => 0,
13634 
              'is_floating_block' => 1,
13635 
              'must_be_hdl_vector' => 1,
13636 
              'period' => 1,
13637 
              'port_id' => 1,
13638 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/en',
13639 
              'type' => 'Bool',
13640 
            },
13641 
            'direction' => 'in',
13642 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13643 
            'width' => 1,
13644 
          },
13645 
        },
13646 
      },
13647 
      'entityName' => 'x_x58',
13648 
    },
13649 
    'to_register8' => {
13650 
      'connections' => {
13651 
        'ce' => 'sysgen_dut.to_register8_ce',
13652 
        'clk' => 'sysgen_dut.to_register8_clk',
13653 
        'clr' => 'sysgen_dut.to_register8_clr',
13654 
        'data_in' => 'sysgen_dut.to_register8_data_in',
13655 
        'dout' => 'to_register8.dout',
13656 
        'en' => 'sysgen_dut.to_register8_en',
13657 
      },
13658 
      'entity' => {
13659 
        'attributes' => {
13660 
          'entityAlreadyNetlisted' => 1,
13661 
          'generics' => [],
13662 
          'is_floating_block' => 1,
13663 
          'mask' => {
13664 
            'Block_Handle' => 2458.00048828125,
13665 
            'Block_handle' => 2458.00048828125,
13666 
            'MDL_Handle' => 2083.00048828125,
13667 
            'MDL_handle' => 2083.00048828125,
13668 
            'arith_type' => 1,
13669 
            'bin_pt' => 14,
13670 
            'block_config' => 'sysgen_blockset:toreg_config',
13671 
            'block_handle' => 2458.00048828125,
13672 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8',
13673 
            'block_type' => 'toreg',
13674 
            'dbl_ovrd' => 0,
13675 
            'explicit_data_type' => 0,
13676 
            'gui_display_data_type' => 1,
13677 
            'init' => 0,
13678 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13679 
            'mdl_handle' => 2083.00048828125,
13680 
            'model_handle' => 2083.00048828125,
13681 
            'n_bits' => 16,
13682 
            'ownership' => 1,
13683 
            'preci_type' => 1,
13684 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13685 
            'shared_memory_name' => 'register05rd',
13686 
          },
13687 
          'needs_vhdl_wrapper' => 0,
13688 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8',
13689 
        },
13690 
        'entityName' => 'x_x59',
13691 
        'ports' => {
13692 
          'ce' => {
13693 
            'attributes' => {
13694 
              'domain' => '',
13695 
              'group' => 1,
13696 
              'isCe' => 1,
13697 
              'is_floating_block' => 1,
13698 
              'period' => 1,
13699 
              'type' => 'logic',
13700 
            },
13701 
            'direction' => 'in',
13702 
            'hdlType' => 'std_logic',
13703 
            'width' => 1,
13704 
          },
13705 
          'clk' => {
13706 
            'attributes' => {
13707 
              'domain' => '',
13708 
              'group' => 1,
13709 
              'isClk' => 1,
13710 
              'is_floating_block' => 1,
13711 
              'period' => 1,
13712 
              'type' => 'logic',
13713 
            },
13714 
            'direction' => 'in',
13715 
            'hdlType' => 'std_logic',
13716 
            'width' => 1,
13717 
          },
13718 
          'clr' => {
13719 
            'attributes' => {
13720 
              'domain' => '',
13721 
              'group' => 1,
13722 
              'isClr' => 1,
13723 
              'is_floating_block' => 1,
13724 
              'period' => 1,
13725 
              'type' => 'logic',
13726 
              'valid_bit_used' => 0,
13727 
            },
13728 
            'direction' => 'in',
13729 
            'hdlType' => 'std_logic',
13730 
            'width' => 1,
13731 
          },
13732 
          'data_in' => {
13733 
            'attributes' => {
13734 
              'bin_pt' => 0,
13735 
              'is_floating_block' => 1,
13736 
              'must_be_hdl_vector' => 1,
13737 
              'period' => 1,
13738 
              'port_id' => 0,
13739 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/data_in',
13740 
              'type' => 'UFix_32_0',
13741 
            },
13742 
            'direction' => 'in',
13743 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13744 
            'width' => 32,
13745 
          },
13746 
          'dout' => {
13747 
            'attributes' => {
13748 
              'bin_pt' => 0,
13749 
              'is_floating_block' => 1,
13750 
              'must_be_hdl_vector' => 1,
13751 
              'period' => 1,
13752 
              'port_id' => 0,
13753 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/dout',
13754 
              'type' => 'UFix_32_0',
13755 
            },
13756 
            'direction' => 'out',
13757 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13758 
            'width' => 32,
13759 
          },
13760 
          'en' => {
13761 
            'attributes' => {
13762 
              'bin_pt' => 0,
13763 
              'is_floating_block' => 1,
13764 
              'must_be_hdl_vector' => 1,
13765 
              'period' => 1,
13766 
              'port_id' => 1,
13767 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/en',
13768 
              'type' => 'Bool',
13769 
            },
13770 
            'direction' => 'in',
13771 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13772 
            'width' => 1,
13773 
          },
13774 
        },
13775 
      },
13776 
      'entityName' => 'x_x59',
13777 
    },
13778 
    'to_register9' => {
13779 
      'connections' => {
13780 
        'ce' => 'sysgen_dut.to_register9_ce',
13781 
        'clk' => 'sysgen_dut.to_register9_clk',
13782 
        'clr' => 'sysgen_dut.to_register9_clr',
13783 
        'data_in' => 'sysgen_dut.to_register9_data_in',
13784 
        'dout' => 'to_register9.dout',
13785 
        'en' => 'sysgen_dut.to_register9_en',
13786 
      },
13787 
      'entity' => {
13788 
        'attributes' => {
13789 
          'entityAlreadyNetlisted' => 1,
13790 
          'generics' => [],
13791 
          'is_floating_block' => 1,
13792 
          'mask' => {
13793 
            'Block_Handle' => 2459.00048828125,
13794 
            'Block_handle' => 2459.00048828125,
13795 
            'MDL_Handle' => 2083.00048828125,
13796 
            'MDL_handle' => 2083.00048828125,
13797 
            'arith_type' => 1,
13798 
            'bin_pt' => 14,
13799 
            'block_config' => 'sysgen_blockset:toreg_config',
13800 
            'block_handle' => 2459.00048828125,
13801 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9',
13802 
            'block_type' => 'toreg',
13803 
            'dbl_ovrd' => 0,
13804 
            'explicit_data_type' => 0,
13805 
            'gui_display_data_type' => 1,
13806 
            'init' => 0,
13807 
            'init_bit_vector' => '\'b00000000000000000000000000000000',
13808 
            'mdl_handle' => 2083.00048828125,
13809 
            'model_handle' => 2083.00048828125,
13810 
            'n_bits' => 16,
13811 
            'ownership' => 1,
13812 
            'preci_type' => 1,
13813 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13814 
            'shared_memory_name' => 'register06rd',
13815 
          },
13816 
          'needs_vhdl_wrapper' => 0,
13817 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9',
13818 
        },
13819 
        'entityName' => 'x_x60',
13820 
        'ports' => {
13821 
          'ce' => {
13822 
            'attributes' => {
13823 
              'domain' => '',
13824 
              'group' => 1,
13825 
              'isCe' => 1,
13826 
              'is_floating_block' => 1,
13827 
              'period' => 1,
13828 
              'type' => 'logic',
13829 
            },
13830 
            'direction' => 'in',
13831 
            'hdlType' => 'std_logic',
13832 
            'width' => 1,
13833 
          },
13834 
          'clk' => {
13835 
            'attributes' => {
13836 
              'domain' => '',
13837 
              'group' => 1,
13838 
              'isClk' => 1,
13839 
              'is_floating_block' => 1,
13840 
              'period' => 1,
13841 
              'type' => 'logic',
13842 
            },
13843 
            'direction' => 'in',
13844 
            'hdlType' => 'std_logic',
13845 
            'width' => 1,
13846 
          },
13847 
          'clr' => {
13848 
            'attributes' => {
13849 
              'domain' => '',
13850 
              'group' => 1,
13851 
              'isClr' => 1,
13852 
              'is_floating_block' => 1,
13853 
              'period' => 1,
13854 
              'type' => 'logic',
13855 
              'valid_bit_used' => 0,
13856 
            },
13857 
            'direction' => 'in',
13858 
            'hdlType' => 'std_logic',
13859 
            'width' => 1,
13860 
          },
13861 
          'data_in' => {
13862 
            'attributes' => {
13863 
              'bin_pt' => 0,
13864 
              'is_floating_block' => 1,
13865 
              'must_be_hdl_vector' => 1,
13866 
              'period' => 1,
13867 
              'port_id' => 0,
13868 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/data_in',
13869 
              'type' => 'UFix_32_0',
13870 
            },
13871 
            'direction' => 'in',
13872 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13873 
            'width' => 32,
13874 
          },
13875 
          'dout' => {
13876 
            'attributes' => {
13877 
              'bin_pt' => 0,
13878 
              'is_floating_block' => 1,
13879 
              'must_be_hdl_vector' => 1,
13880 
              'period' => 1,
13881 
              'port_id' => 0,
13882 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/dout',
13883 
              'type' => 'UFix_32_0',
13884 
            },
13885 
            'direction' => 'out',
13886 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13887 
            'width' => 32,
13888 
          },
13889 
          'en' => {
13890 
            'attributes' => {
13891 
              'bin_pt' => 0,
13892 
              'is_floating_block' => 1,
13893 
              'must_be_hdl_vector' => 1,
13894 
              'period' => 1,
13895 
              'port_id' => 1,
13896 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/en',
13897 
              'type' => 'Bool',
13898 
            },
13899 
            'direction' => 'in',
13900 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13901 
            'width' => 1,
13902 
          },
13903 
        },
13904 
      },
13905 
      'entityName' => 'x_x60',
13906 
    },
13907 
    'user_int_1o' => {
13908 
      'connections' => { 'user_int_1o' => 'sysgen_dut.user_int_1o', },
13909 
      'entity' => {
13910 
        'attributes' => {
13911 
          'entityAlreadyNetlisted' => 1,
13912 
          'isGateway' => 1,
13913 
          'is_floating_block' => 1,
13914 
        },
13915 
        'entityName' => 'user_int_1o',
13916 
        'ports' => {
13917 
          'user_int_1o' => {
13918 
            'attributes' => {
13919 
              'bin_pt' => 0,
13920 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
13921 
              'is_floating_block' => 1,
13922 
              'is_gateway_port' => 1,
13923 
              'must_be_hdl_vector' => 1,
13924 
              'period' => 1,
13925 
              'port_id' => 0,
13926 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o/user_int_1o',
13927 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o',
13928 
              'timingConstraint' => 'none',
13929 
              'type' => 'Bool',
13930 
            },
13931 
            'direction' => 'in',
13932 
            'hdlType' => 'std_logic',
13933 
            'width' => 1,
13934 
          },
13935 
        },
13936 
      },
13937 
      'entityName' => 'user_int_1o',
13938 
    },
13939 
    'user_int_2o' => {
13940 
      'connections' => { 'user_int_2o' => 'sysgen_dut.user_int_2o', },
13941 
      'entity' => {
13942 
        'attributes' => {
13943 
          'entityAlreadyNetlisted' => 1,
13944 
          'isGateway' => 1,
13945 
          'is_floating_block' => 1,
13946 
        },
13947 
        'entityName' => 'user_int_2o',
13948 
        'ports' => {
13949 
          'user_int_2o' => {
13950 
            'attributes' => {
13951 
              'bin_pt' => 0,
13952 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
13953 
              'is_floating_block' => 1,
13954 
              'is_gateway_port' => 1,
13955 
              'must_be_hdl_vector' => 1,
13956 
              'period' => 1,
13957 
              'port_id' => 0,
13958 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o/user_int_2o',
13959 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o',
13960 
              'timingConstraint' => 'none',
13961 
              'type' => 'Bool',
13962 
            },
13963 
            'direction' => 'in',
13964 
            'hdlType' => 'std_logic',
13965 
            'width' => 1,
13966 
          },
13967 
        },
13968 
      },
13969 
      'entityName' => 'user_int_2o',
13970 
    },
13971 
    'user_int_3o' => {
13972 
      'connections' => { 'user_int_3o' => 'sysgen_dut.user_int_3o', },
13973 
      'entity' => {
13974 
        'attributes' => {
13975 
          'entityAlreadyNetlisted' => 1,
13976 
          'isGateway' => 1,
13977 
          'is_floating_block' => 1,
13978 
        },
13979 
        'entityName' => 'user_int_3o',
13980 
        'ports' => {
13981 
          'user_int_3o' => {
13982 
            'attributes' => {
13983 
              'bin_pt' => 0,
13984 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
13985 
              'is_floating_block' => 1,
13986 
              'is_gateway_port' => 1,
13987 
              'must_be_hdl_vector' => 1,
13988 
              'period' => 1,
13989 
              'port_id' => 0,
13990 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o/user_int_3o',
13991 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o',
13992 
              'timingConstraint' => 'none',
13993 
              'type' => 'Bool',
13994 
            },
13995 
            'direction' => 'in',
13996 
            'hdlType' => 'std_logic',
13997 
            'width' => 1,
13998 
          },
13999 
        },
14000 
      },
14001 
      'entityName' => 'user_int_3o',
14002 
    },
14003 
  },
14004 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.