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[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [ipcore_dir_ISE13.3/] [v6_afifo_1024x72.vhd] - Blame information for rev 13

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1 13 barabba 
--------------------------------------------------------------------------------
2 
-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.
3 
--------------------------------------------------------------------------------
4 
--   ____  ____
5 
--  /   /\/   /
6 
-- /___/  \  /    Vendor: Xilinx
7 
-- \   \   \/     Version: O.76xd
8 
--  \   \         Application: netgen
9 
--  /   /         Filename: v6_afifo_1024x72.vhd
10 
-- /___/   /\     Timestamp: Mon Mar 26 15:25:37 2012
11 
-- \   \  /  \
12 
--  \___\/\___\
13 
--
14 
-- Command      : -w -sim -ofmt vhdl "C:/Temp/Xilinx PCI Express/ML605_ISE13.3/ipcore_dir_ISE13.3/tmp/_cg/v6_afifo_1024x72.ngc" "C:/Temp/Xilinx PCI Express/ML605_ISE13.3/ipcore_dir_ISE13.3/tmp/_cg/v6_afifo_1024x72.vhd"
15 
-- Device       : 6vlx240tff1156-1
16 
-- Input file   : C:/Temp/Xilinx PCI Express/ML605_ISE13.3/ipcore_dir_ISE13.3/tmp/_cg/v6_afifo_1024x72.ngc
17 
-- Output file  : C:/Temp/Xilinx PCI Express/ML605_ISE13.3/ipcore_dir_ISE13.3/tmp/_cg/v6_afifo_1024x72.vhd
18 
-- # of Entities        : 1
19 
-- Design Name  : v6_afifo_1024x72
20 
-- Xilinx       : C:\Programmi\Xilinx\13.3\ISE_DS\ISE\
21 
--
22 
-- Purpose:
23 
--     This VHDL netlist is a verification model and uses simulation
24 
--     primitives which may not represent the true implementation of the
25 
--     device, however the netlist is functionally correct and should not
26 
--     be modified. This file cannot be synthesized and should only be used
27 
--     with supported simulation tools.
28 
--
29 
-- Reference:
30 
--     Command Line Tools User Guide, Chapter 23
31 
--     Synthesis and Simulation Design Guide, Chapter 6
32 
--
33 
--------------------------------------------------------------------------------
34 
 
35 
 
36 
-- synthesis translate_off
37 
library IEEE;
38 
use IEEE.STD_LOGIC_1164.ALL;
39 
library UNISIM;
40 
use UNISIM.VCOMPONENTS.ALL;
41 
use UNISIM.VPKG.ALL;
42 
 
43 
entity v6_afifo_1024x72 is
44 
  port (
45 
    rst : in STD_LOGIC := 'X';
46 
    wr_clk : in STD_LOGIC := 'X';
47 
    rd_clk : in STD_LOGIC := 'X';
48 
    wr_en : in STD_LOGIC := 'X';
49 
    rd_en : in STD_LOGIC := 'X';
50 
    full : out STD_LOGIC;
51 
    empty : out STD_LOGIC;
52 
    prog_full : out STD_LOGIC;
53 
    prog_empty : out STD_LOGIC;
54 
    din : in STD_LOGIC_VECTOR ( 71 downto 0 );
55 
    dout : out STD_LOGIC_VECTOR ( 71 downto 0 )
56 
  );
57 
end v6_afifo_1024x72;
58 
 
59 
architecture STRUCTURE of v6_afifo_1024x72 is
60 
  signal N0 : STD_LOGIC;
61 
  signal N1 : STD_LOGIC;
62 
  signal NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i : STD_LOGIC;
63 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_i_24 : STD_LOGIC;
64 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en : STD_LOGIC;
65 
  signal NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i : STD_LOGIC;
66 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27 : STD_LOGIC;
67 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_i_28 : STD_LOGIC;
68 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2_101 : STD_LOGIC;
69 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_RST_FULL_GEN_102 : STD_LOGIC;
70 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_tmp_ram_rd_en : STD_LOGIC;
71 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en : STD_LOGIC;
72 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0_comp1_OR_6_o : STD_LOGIC;
73 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp1 : STD_LOGIC;
74 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0 : STD_LOGIC;
75 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_fb_i_235 : STD_LOGIC;
76 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1_GND_411_o_MUX_26_o : STD_LOGIC;
77 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp2 : STD_LOGIC;
78 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1 : STD_LOGIC;
79 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_comb : STD_LOGIC;
80 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_comb : STD_LOGIC;
81 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_241 : STD_LOGIC;
82 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d2_242 : STD_LOGIC;
83 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d1_243 : STD_LOGIC;
84 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_244 : STD_LOGIC;
85 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d2_245 : STD_LOGIC;
86 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d1_246 : STD_LOGIC;
87 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d3_247 : STD_LOGIC;
88 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d1_248 : STD_LOGIC;
89 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_10_Q_285 : STD_LOGIC;
90 
 
91 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_9_Q_286 : STD_LOGIC;
92 
 
93 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_9_Q_287 : STD_LOGIC;
94 
 
95 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_8_Q_288 : STD_LOGIC;
96 
 
97 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_8_Q_289 : STD_LOGIC;
98 
 
99 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_7_Q_290 : STD_LOGIC;
100 
 
101 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_7_Q_291 : STD_LOGIC;
102 
 
103 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_6_Q_292 : STD_LOGIC;
104 
 
105 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_6_Q_293 : STD_LOGIC;
106 
 
107 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_5_Q_294 : STD_LOGIC;
108 
 
109 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_5_Q_295 : STD_LOGIC;
110 
 
111 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_4_Q_296 : STD_LOGIC;
112 
 
113 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_4_Q_297 : STD_LOGIC;
114 
 
115 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_3_Q_298 : STD_LOGIC;
116 
 
117 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_3_Q_299 : STD_LOGIC;
118 
 
119 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_2_Q_300 : STD_LOGIC;
120 
 
121 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_2_Q_301 : STD_LOGIC;
122 
 
123 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_1_Q_302 : STD_LOGIC;
124 
 
125 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_1_Q_303 : STD_LOGIC;
126 
 
127 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_0_Q_304 : STD_LOGIC;
128 
 
129 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_3_Q : STD_LOGIC;
130 
 
131 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_4_Q : STD_LOGIC;
132 
 
133 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_5_Q : STD_LOGIC;
134 
 
135 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_6_Q : STD_LOGIC;
136 
 
137 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_7_Q : STD_LOGIC;
138 
 
139 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_8_Q : STD_LOGIC;
140 
 
141 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_9_Q : STD_LOGIC;
142 
 
143 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_10_Q : STD_LOGIC;
144 
 
145 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41 : STD_LOGIC;
146 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT81_324 : STD_LOGIC;
147 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT103 : STD_LOGIC;
148 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_1_Q : STD_LOGIC;
149 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_2_Q : STD_LOGIC;
150 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_3_Q : STD_LOGIC;
151 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_4_Q : STD_LOGIC;
152 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_5_Q : STD_LOGIC;
153 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_6_Q : STD_LOGIC;
154 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_7_Q : STD_LOGIC;
155 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_8_Q : STD_LOGIC;
156 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_9_Q : STD_LOGIC;
157 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_10_Q_335 : STD_LOGIC;
158 
 
159 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_9_Q_336 : STD_LOGIC;
160 
 
161 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_9_Q_337 : STD_LOGIC;
162 
 
163 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_8_Q_338 : STD_LOGIC;
164 
 
165 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_8_Q_339 : STD_LOGIC;
166 
 
167 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_7_Q_340 : STD_LOGIC;
168 
 
169 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_7_Q_341 : STD_LOGIC;
170 
 
171 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_6_Q_342 : STD_LOGIC;
172 
 
173 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_6_Q_343 : STD_LOGIC;
174 
 
175 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_5_Q_344 : STD_LOGIC;
176 
 
177 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_5_Q_345 : STD_LOGIC;
178 
 
179 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_4_Q_346 : STD_LOGIC;
180 
 
181 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_4_Q_347 : STD_LOGIC;
182 
 
183 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_3_Q_348 : STD_LOGIC;
184 
 
185 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_3_Q_349 : STD_LOGIC;
186 
 
187 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_2_Q_350 : STD_LOGIC;
188 
 
189 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_2_Q_351 : STD_LOGIC;
190 
 
191 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_1_Q_352 : STD_LOGIC;
192 
 
193 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_1_Q_353 : STD_LOGIC;
194 
 
195 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_0_Q_354 : STD_LOGIC;
196 
 
197 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_9_Q : STD_LOGIC;
198 
 
199 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_10_Q : STD_LOGIC;
200 
 
201 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_bdd0 : STD_LOGIC;
202 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_1_Q : STD_LOGIC;
203 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_2_Q : STD_LOGIC;
204 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_Q : STD_LOGIC;
205 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_4_Q : STD_LOGIC;
206 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_5_Q : STD_LOGIC;
207 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_6_Q : STD_LOGIC;
208 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_7_Q : STD_LOGIC;
209 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_8_Q_367 : STD_LOGIC;
210 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_9_Q_368 : STD_LOGIC;
211 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_11_o : STD_LOGIC;
212 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_10_o : STD_LOGIC;
213 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_9_o : STD_LOGIC;
214 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_8_o : STD_LOGIC;
215 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_7_o : STD_LOGIC;
216 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_6_o : STD_LOGIC;
217 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_5_o : STD_LOGIC;
218 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_4_o : STD_LOGIC;
219 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_24_o : STD_LOGIC;
220 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_23_o : STD_LOGIC;
221 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_22_o : STD_LOGIC;
222 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_21_o : STD_LOGIC;
223 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_20_o : STD_LOGIC;
224 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_19_o : STD_LOGIC;
225 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_18_o : STD_LOGIC;
226 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_17_o : STD_LOGIC;
227 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_0_RD_PNTR_1_XOR_63_o : STD_LOGIC;
228 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_1_RD_PNTR_2_XOR_62_o : STD_LOGIC;
229 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_2_RD_PNTR_3_XOR_61_o : STD_LOGIC;
230 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_3_RD_PNTR_4_XOR_60_o : STD_LOGIC;
231 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_4_RD_PNTR_5_XOR_59_o : STD_LOGIC;
232 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_5_RD_PNTR_6_XOR_58_o : STD_LOGIC;
233 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_6_RD_PNTR_7_XOR_57_o : STD_LOGIC;
234 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_7_RD_PNTR_8_XOR_56_o : STD_LOGIC;
235 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_8_RD_PNTR_9_XOR_55_o : STD_LOGIC;
236 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_0_WR_PNTR_1_XOR_9_o : STD_LOGIC;
237 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_1_WR_PNTR_2_XOR_8_o : STD_LOGIC;
238 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_2_WR_PNTR_3_XOR_7_o : STD_LOGIC;
239 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_3_WR_PNTR_4_XOR_6_o : STD_LOGIC;
240 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_4_WR_PNTR_5_XOR_5_o : STD_LOGIC;
241 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_5_WR_PNTR_6_XOR_4_o : STD_LOGIC;
242 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_6_WR_PNTR_7_XOR_3_o : STD_LOGIC;
243 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_7_WR_PNTR_8_XOR_2_o : STD_LOGIC;
244 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_8_WR_PNTR_9_XOR_1_o : STD_LOGIC;
245 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_12_o : STD_LOGIC;
246 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_25_o : STD_LOGIC;
247 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus1_0_inv : STD_LOGIC;
248 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus2_1_inv : STD_LOGIC;
249 
  signal N6 : STD_LOGIC;
250 
  signal N8 : STD_LOGIC;
251 
  signal N10 : STD_LOGIC;
252 
  signal N12 : STD_LOGIC;
253 
  signal N16 : STD_LOGIC;
254 
  signal N18 : STD_LOGIC;
255 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_rstpot_473 : STD_LOGIC;
256 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i_rstpot_474 : STD_LOGIC;
257 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i_rstpot_475 : STD_LOGIC;
258 
  signal N24 : STD_LOGIC;
259 
  signal N26 : STD_LOGIC;
260 
  signal N28 : STD_LOGIC;
261 
  signal N30 : STD_LOGIC;
262 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTA_UNCONNECTED : STD_LOGIC;
263 
 
264 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTB_UNCONNECTED : STD_LOGIC;
265 
 
266 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DBITERR_UNCONNECTED : STD_LOGIC;
267 
 
268 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_SBITERR_UNCONNECTED : STD_LOGIC;
269 
 
270 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_31_UNCONNECTED : STD_LOGIC;
271 
 
272 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_30_UNCONNECTED : STD_LOGIC;
273 
 
274 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_29_UNCONNECTED : STD_LOGIC;
275 
 
276 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_28_UNCONNECTED : STD_LOGIC;
277 
 
278 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_27_UNCONNECTED : STD_LOGIC;
279 
 
280 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_26_UNCONNECTED : STD_LOGIC;
281 
 
282 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_25_UNCONNECTED : STD_LOGIC;
283 
 
284 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_24_UNCONNECTED : STD_LOGIC;
285 
 
286 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_23_UNCONNECTED : STD_LOGIC;
287 
 
288 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_22_UNCONNECTED : STD_LOGIC;
289 
 
290 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_21_UNCONNECTED : STD_LOGIC;
291 
 
292 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_20_UNCONNECTED : STD_LOGIC;
293 
 
294 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_19_UNCONNECTED : STD_LOGIC;
295 
 
296 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_18_UNCONNECTED : STD_LOGIC;
297 
 
298 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_17_UNCONNECTED : STD_LOGIC;
299 
 
300 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_16_UNCONNECTED : STD_LOGIC;
301 
 
302 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_15_UNCONNECTED : STD_LOGIC;
303 
 
304 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_14_UNCONNECTED : STD_LOGIC;
305 
 
306 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_13_UNCONNECTED : STD_LOGIC;
307 
 
308 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_12_UNCONNECTED : STD_LOGIC;
309 
 
310 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_11_UNCONNECTED : STD_LOGIC;
311 
 
312 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_10_UNCONNECTED : STD_LOGIC;
313 
 
314 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_9_UNCONNECTED : STD_LOGIC;
315 
 
316 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_8_UNCONNECTED : STD_LOGIC;
317 
 
318 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_7_UNCONNECTED : STD_LOGIC;
319 
 
320 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_6_UNCONNECTED : STD_LOGIC;
321 
 
322 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_5_UNCONNECTED : STD_LOGIC;
323 
 
324 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_4_UNCONNECTED : STD_LOGIC;
325 
 
326 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_3_UNCONNECTED : STD_LOGIC;
327 
 
328 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_2_UNCONNECTED : STD_LOGIC;
329 
 
330 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_1_UNCONNECTED : STD_LOGIC;
331 
 
332 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_0_UNCONNECTED : STD_LOGIC;
333 
 
334 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_3_UNCONNECTED : STD_LOGIC;
335 
 
336 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_2_UNCONNECTED : STD_LOGIC;
337 
 
338 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_1_UNCONNECTED : STD_LOGIC;
339 
 
340 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_0_UNCONNECTED : STD_LOGIC;
341 
 
342 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_7_UNCONNECTED : STD_LOGIC;
343 
 
344 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_6_UNCONNECTED : STD_LOGIC;
345 
 
346 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_5_UNCONNECTED : STD_LOGIC;
347 
 
348 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_4_UNCONNECTED : STD_LOGIC;
349 
 
350 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_3_UNCONNECTED : STD_LOGIC;
351 
 
352 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_2_UNCONNECTED : STD_LOGIC;
353 
 
354 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_1_UNCONNECTED : STD_LOGIC;
355 
 
356 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_0_UNCONNECTED : STD_LOGIC;
357 
 
358 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_8_UNCONNECTED : STD_LOGIC;
359 
 
360 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_7_UNCONNECTED : STD_LOGIC;
361 
 
362 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_6_UNCONNECTED : STD_LOGIC;
363 
 
364 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_5_UNCONNECTED : STD_LOGIC;
365 
 
366 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_4_UNCONNECTED : STD_LOGIC;
367 
 
368 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_3_UNCONNECTED : STD_LOGIC;
369 
 
370 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_2_UNCONNECTED : STD_LOGIC;
371 
 
372 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_1_UNCONNECTED : STD_LOGIC;
373 
 
374 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_0_UNCONNECTED : STD_LOGIC;
375 
 
376 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTA_UNCONNECTED : STD_LOGIC;
377 
 
378 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTB_UNCONNECTED : STD_LOGIC;
379 
 
380 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DBITERR_UNCONNECTED : STD_LOGIC;
381 
 
382 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_SBITERR_UNCONNECTED : STD_LOGIC;
383 
 
384 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_31_UNCONNECTED : STD_LOGIC;
385 
 
386 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_30_UNCONNECTED : STD_LOGIC;
387 
 
388 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_29_UNCONNECTED : STD_LOGIC;
389 
 
390 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_28_UNCONNECTED : STD_LOGIC;
391 
 
392 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_27_UNCONNECTED : STD_LOGIC;
393 
 
394 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_26_UNCONNECTED : STD_LOGIC;
395 
 
396 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_25_UNCONNECTED : STD_LOGIC;
397 
 
398 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_24_UNCONNECTED : STD_LOGIC;
399 
 
400 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_23_UNCONNECTED : STD_LOGIC;
401 
 
402 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_22_UNCONNECTED : STD_LOGIC;
403 
 
404 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_21_UNCONNECTED : STD_LOGIC;
405 
 
406 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_20_UNCONNECTED : STD_LOGIC;
407 
 
408 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_19_UNCONNECTED : STD_LOGIC;
409 
 
410 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_18_UNCONNECTED : STD_LOGIC;
411 
 
412 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_17_UNCONNECTED : STD_LOGIC;
413 
 
414 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_16_UNCONNECTED : STD_LOGIC;
415 
 
416 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_15_UNCONNECTED : STD_LOGIC;
417 
 
418 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_14_UNCONNECTED : STD_LOGIC;
419 
 
420 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_13_UNCONNECTED : STD_LOGIC;
421 
 
422 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_12_UNCONNECTED : STD_LOGIC;
423 
 
424 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_11_UNCONNECTED : STD_LOGIC;
425 
 
426 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_10_UNCONNECTED : STD_LOGIC;
427 
 
428 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_9_UNCONNECTED : STD_LOGIC;
429 
 
430 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_8_UNCONNECTED : STD_LOGIC;
431 
 
432 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_7_UNCONNECTED : STD_LOGIC;
433 
 
434 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_6_UNCONNECTED : STD_LOGIC;
435 
 
436 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_5_UNCONNECTED : STD_LOGIC;
437 
 
438 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_4_UNCONNECTED : STD_LOGIC;
439 
 
440 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_3_UNCONNECTED : STD_LOGIC;
441 
 
442 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_2_UNCONNECTED : STD_LOGIC;
443 
 
444 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_1_UNCONNECTED : STD_LOGIC;
445 
 
446 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_0_UNCONNECTED : STD_LOGIC;
447 
 
448 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_3_UNCONNECTED : STD_LOGIC;
449 
 
450 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_2_UNCONNECTED : STD_LOGIC;
451 
 
452 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_1_UNCONNECTED : STD_LOGIC;
453 
 
454 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_0_UNCONNECTED : STD_LOGIC;
455 
 
456 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_7_UNCONNECTED : STD_LOGIC;
457 
 
458 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_6_UNCONNECTED : STD_LOGIC;
459 
 
460 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_5_UNCONNECTED : STD_LOGIC;
461 
 
462 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_4_UNCONNECTED : STD_LOGIC;
463 
 
464 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_3_UNCONNECTED : STD_LOGIC;
465 
 
466 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_2_UNCONNECTED : STD_LOGIC;
467 
 
468 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_1_UNCONNECTED : STD_LOGIC;
469 
 
470 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_0_UNCONNECTED : STD_LOGIC;
471 
 
472 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_8_UNCONNECTED : STD_LOGIC;
473 
 
474 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_7_UNCONNECTED : STD_LOGIC;
475 
 
476 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_6_UNCONNECTED : STD_LOGIC;
477 
 
478 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_5_UNCONNECTED : STD_LOGIC;
479 
 
480 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_4_UNCONNECTED : STD_LOGIC;
481 
 
482 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_3_UNCONNECTED : STD_LOGIC;
483 
 
484 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_2_UNCONNECTED : STD_LOGIC;
485 
 
486 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_1_UNCONNECTED : STD_LOGIC;
487 
 
488 
  signal NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_0_UNCONNECTED : STD_LOGIC;
489 
 
490 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin : STD_LOGIC_VECTOR ( 9 downto 0 );
491 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin : STD_LOGIC_VECTOR ( 9 downto 0 );
492 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg : STD_LOGIC_VECTOR ( 2 downto 0 );
493 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg : STD_LOGIC_VECTOR ( 1 downto 0 );
494 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1 : STD_LOGIC_VECTOR ( 9 downto 0 );
495 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2 : STD_LOGIC_VECTOR ( 9 downto 2 );
496 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count : STD_LOGIC_VECTOR ( 9 downto 1 );
497 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count : STD_LOGIC_VECTOR ( 9 downto 1 );
498 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1 : STD_LOGIC_VECTOR ( 9 downto 0 );
499 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet : STD_LOGIC_VECTOR ( 3 downto 0 );
500 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1 : STD_LOGIC_VECTOR ( 4 downto 0 );
501 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet : STD_LOGIC_VECTOR ( 3 downto 0 );
502 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1 : STD_LOGIC_VECTOR ( 4 downto 0 );
503 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet : STD_LOGIC_VECTOR ( 3 downto 0 );
504 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1 : STD_LOGIC_VECTOR ( 4 downto 0 );
505 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet : STD_LOGIC_VECTOR ( 3 downto 0 );
506 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1 : STD_LOGIC_VECTOR ( 4 downto 0 );
507 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad : STD_LOGIC_VECTOR ( 0 downto 0 );
508 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad : STD_LOGIC_VECTOR ( 10 downto 3 );
509 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_rd_pntr_inv_pad : STD_LOGIC_VECTOR ( 1 downto 1 );
510 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad : STD_LOGIC_VECTOR ( 10 downto 9 );
511 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc : STD_LOGIC_VECTOR ( 9 downto 0 );
512 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last : STD_LOGIC_VECTOR ( 9 downto 0 );
513 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg : STD_LOGIC_VECTOR ( 9 downto 0 );
514 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc : STD_LOGIC_VECTOR ( 9 downto 0 );
515 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last : STD_LOGIC_VECTOR ( 9 downto 0 );
516 
  signal U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg : STD_LOGIC_VECTOR ( 9 downto 0 );
517 
begin
518 
  full <= U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_i_24;
519 
  empty <= U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_i_28;
520 
  prog_full <= NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i;
521 
  prog_empty <= NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i;
522 
  XST_VCC : VCC
523 
    port map (
524 
      P => N0
525 
    );
526 
  XST_GND : GND
527 
    port map (
528 
      G => N1
529 
    );
530 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_i : FDP
531 
    generic map(
532 
      INIT => '1'
533 
    )
534 
    port map (
535 
      C => rd_clk,
536 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0_comp1_OR_6_o,
537 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
538 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_i_28
539 
    );
540 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i : FDP
541 
    generic map(
542 
      INIT => '1'
543 
    )
544 
    port map (
545 
      C => rd_clk,
546 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0_comp1_OR_6_o,
547 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
548 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27
549 
    );
550 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_i : FDP
551 
    generic map(
552 
      INIT => '1'
553 
    )
554 
    port map (
555 
      C => wr_clk,
556 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1_GND_411_o_MUX_26_o,
557 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2_101,
558 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_i_24
559 
    );
560 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_fb_i : FDP
561 
    generic map(
562 
      INIT => '1'
563 
    )
564 
    port map (
565 
      C => wr_clk,
566 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1_GND_411_o_MUX_26_o,
567 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2_101,
568 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_fb_i_235
569 
    );
570 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_RST_FULL_GEN : FDC
571 
    generic map(
572 
      INIT => '0'
573 
    )
574 
    port map (
575 
      C => wr_clk,
576 
      CLR => rst,
577 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d3_247,
578 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_RST_FULL_GEN_102
579 
    );
580 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d2 : FD
581 
    generic map(
582 
      INIT => '0'
583 
    )
584 
    port map (
585 
      C => rd_clk,
586 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d1_243,
587 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d2_242
588 
    );
589 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d2 : FD
590 
    generic map(
591 
      INIT => '0'
592 
    )
593 
    port map (
594 
      C => wr_clk,
595 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d1_246,
596 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d2_245
597 
    );
598 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d3 : FDP
599 
    generic map(
600 
      INIT => '1'
601 
    )
602 
    port map (
603 
      C => wr_clk,
604 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2_101,
605 
      PRE => rst,
606 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d3_247
607 
    );
608 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d1 : FD
609 
    generic map(
610 
      INIT => '0'
611 
    )
612 
    port map (
613 
      C => rd_clk,
614 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_241,
615 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d1_243
616 
    );
617 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d1 : FD
618 
    generic map(
619 
      INIT => '0'
620 
    )
621 
    port map (
622 
      C => wr_clk,
623 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_244,
624 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d1_246
625 
    );
626 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2 : FDP
627 
    generic map(
628 
      INIT => '1'
629 
    )
630 
    port map (
631 
      C => wr_clk,
632 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d1_248,
633 
      PRE => rst,
634 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2_101
635 
    );
636 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg_2 : FDP
637 
    generic map(
638 
      INIT => '1'
639 
    )
640 
    port map (
641 
      C => rd_clk,
642 
      D => N1,
643 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_comb,
644 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2)
645 
    );
646 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg_1 : FDP
647 
    generic map(
648 
      INIT => '1'
649 
    )
650 
    port map (
651 
      C => rd_clk,
652 
      D => N1,
653 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_comb,
654 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1)
655 
    );
656 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg_0 : FDP
657 
    generic map(
658 
      INIT => '1'
659 
    )
660 
    port map (
661 
      C => rd_clk,
662 
      D => N1,
663 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_comb,
664 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(0)
665 
    );
666 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg : FDPE
667 
    port map (
668 
      C => rd_clk,
669 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d1_243,
670 
      D => N1,
671 
      PRE => rst,
672 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_241
673 
    );
674 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg_1 : FDP
675 
    generic map(
676 
      INIT => '1'
677 
    )
678 
    port map (
679 
      C => wr_clk,
680 
      D => N1,
681 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_comb,
682 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1)
683 
    );
684 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg_0 : FDP
685 
    generic map(
686 
      INIT => '1'
687 
    )
688 
    port map (
689 
      C => wr_clk,
690 
      D => N1,
691 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_comb,
692 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0)
693 
    );
694 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d1 : FDP
695 
    generic map(
696 
      INIT => '1'
697 
    )
698 
    port map (
699 
      C => wr_clk,
700 
      D => N1,
701 
      PRE => rst,
702 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d1_248
703 
    );
704 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_gm_4_gms_ms : MUXCY
705 
    port map (
706 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(3),
707 
      DI => N1,
708 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(4),
709 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1
710 
    );
711 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_gm_3_gms_ms : MUXCY
712 
    port map (
713 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(2),
714 
      DI => N1,
715 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(3),
716 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(3)
717 
    );
718 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_gm_2_gms_ms : MUXCY
719 
    port map (
720 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(1),
721 
      DI => N1,
722 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(2),
723 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(2)
724 
    );
725 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_gm_1_gms_ms : MUXCY
726 
    port map (
727 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(0),
728 
      DI => N1,
729 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(1),
730 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(1)
731 
    );
732 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_gm_0_gm1_m1 : MUXCY
733 
    port map (
734 
      CI => N0,
735 
      DI => N1,
736 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(0),
737 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_gmux_carrynet(0)
738 
    );
739 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_gm_4_gms_ms : MUXCY
740 
    port map (
741 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(3),
742 
      DI => N1,
743 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(4),
744 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp2
745 
    );
746 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_gm_3_gms_ms : MUXCY
747 
    port map (
748 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(2),
749 
      DI => N1,
750 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(3),
751 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(3)
752 
    );
753 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_gm_2_gms_ms : MUXCY
754 
    port map (
755 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(1),
756 
      DI => N1,
757 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(2),
758 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(2)
759 
    );
760 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_gm_1_gms_ms : MUXCY
761 
    port map (
762 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(0),
763 
      DI => N1,
764 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(1),
765 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(1)
766 
    );
767 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_gm_0_gm1_m1 : MUXCY
768 
    port map (
769 
      CI => N0,
770 
      DI => N1,
771 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(0),
772 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_gmux_carrynet(0)
773 
    );
774 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_gm_4_gms_ms : MUXCY
775 
    port map (
776 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(3),
777 
      DI => N1,
778 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(4),
779 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0
780 
    );
781 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_gm_3_gms_ms : MUXCY
782 
    port map (
783 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(2),
784 
      DI => N1,
785 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(3),
786 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(3)
787 
    );
788 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_gm_2_gms_ms : MUXCY
789 
    port map (
790 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(1),
791 
      DI => N1,
792 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(2),
793 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(2)
794 
    );
795 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_gm_1_gms_ms : MUXCY
796 
    port map (
797 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(0),
798 
      DI => N1,
799 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(1),
800 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(1)
801 
    );
802 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_gm_0_gm1_m1 : MUXCY
803 
    port map (
804 
      CI => N0,
805 
      DI => N1,
806 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(0),
807 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_gmux_carrynet(0)
808 
    );
809 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_gm_4_gms_ms : MUXCY
810 
    port map (
811 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(3),
812 
      DI => N1,
813 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(4),
814 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp1
815 
    );
816 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_gm_3_gms_ms : MUXCY
817 
    port map (
818 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(2),
819 
      DI => N1,
820 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(3),
821 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(3)
822 
    );
823 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_gm_2_gms_ms : MUXCY
824 
    port map (
825 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(1),
826 
      DI => N1,
827 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(2),
828 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(2)
829 
    );
830 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_gm_1_gms_ms : MUXCY
831 
    port map (
832 
      CI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(0),
833 
      DI => N1,
834 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(1),
835 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(1)
836 
    );
837 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_gm_0_gm1_m1 : MUXCY
838 
    port map (
839 
      CI => N0,
840 
      DI => N1,
841 
      S => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(0),
842 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_gmux_carrynet(0)
843 
    );
844 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_10_Q :
845 
XORCY
846 
    port map (
847 
      CI =>
848 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_9_Q_286
849 
,
850 
      LI =>
851 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_10_Q_285
852 
,
853 
      O =>
854 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_10_Q
855 
    );
856 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_9_Q :
857 
XORCY
858 
    port map (
859 
      CI =>
860 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_8_Q_288
861 
,
862 
      LI =>
863 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_9_Q_287
864 
,
865 
      O =>
866 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_9_Q
867 
    );
868 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_9_Q :
869 
MUXCY
870 
    port map (
871 
      CI =>
872 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_8_Q_288
873 
,
874 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(8),
875 
      S =>
876 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_9_Q_287
877 
,
878 
      O =>
879 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_9_Q_286
880 
 
881 
    );
882 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_8_Q :
883 
XORCY
884 
    port map (
885 
      CI =>
886 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_7_Q_290
887 
,
888 
      LI =>
889 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_8_Q_289
890 
,
891 
      O =>
892 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_8_Q
893 
    );
894 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_8_Q :
895 
MUXCY
896 
    port map (
897 
      CI =>
898 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_7_Q_290
899 
,
900 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(7),
901 
      S =>
902 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_8_Q_289
903 
,
904 
      O =>
905 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_8_Q_288
906 
 
907 
    );
908 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_7_Q :
909 
XORCY
910 
    port map (
911 
      CI =>
912 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_6_Q_292
913 
,
914 
      LI =>
915 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_7_Q_291
916 
,
917 
      O =>
918 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_7_Q
919 
    );
920 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_7_Q :
921 
MUXCY
922 
    port map (
923 
      CI =>
924 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_6_Q_292
925 
,
926 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(6),
927 
      S =>
928 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_7_Q_291
929 
,
930 
      O =>
931 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_7_Q_290
932 
 
933 
    );
934 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_6_Q :
935 
XORCY
936 
    port map (
937 
      CI =>
938 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_5_Q_294
939 
,
940 
      LI =>
941 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_6_Q_293
942 
,
943 
      O =>
944 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_6_Q
945 
    );
946 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_6_Q :
947 
MUXCY
948 
    port map (
949 
      CI =>
950 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_5_Q_294
951 
,
952 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(5),
953 
      S =>
954 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_6_Q_293
955 
,
956 
      O =>
957 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_6_Q_292
958 
 
959 
    );
960 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_5_Q :
961 
XORCY
962 
    port map (
963 
      CI =>
964 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_4_Q_296
965 
,
966 
      LI =>
967 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_5_Q_295
968 
,
969 
      O =>
970 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_5_Q
971 
    );
972 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_5_Q :
973 
MUXCY
974 
    port map (
975 
      CI =>
976 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_4_Q_296
977 
,
978 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(4),
979 
      S =>
980 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_5_Q_295
981 
,
982 
      O =>
983 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_5_Q_294
984 
 
985 
    );
986 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_4_Q :
987 
XORCY
988 
    port map (
989 
      CI =>
990 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_3_Q_298
991 
,
992 
      LI =>
993 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_4_Q_297
994 
,
995 
      O =>
996 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_4_Q
997 
    );
998 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_4_Q :
999 
MUXCY
1000 
    port map (
1001 
      CI =>
1002 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_3_Q_298
1003 
,
1004 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(3),
1005 
      S =>
1006 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_4_Q_297
1007 
,
1008 
      O =>
1009 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_4_Q_296
1010 
 
1011 
    );
1012 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_xor_3_Q :
1013 
XORCY
1014 
    port map (
1015 
      CI =>
1016 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_2_Q_300
1017 
,
1018 
      LI =>
1019 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_3_Q_299
1020 
,
1021 
      O =>
1022 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_3_Q
1023 
    );
1024 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_3_Q :
1025 
MUXCY
1026 
    port map (
1027 
      CI =>
1028 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_2_Q_300
1029 
,
1030 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(2),
1031 
      S =>
1032 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_3_Q_299
1033 
,
1034 
      O =>
1035 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_3_Q_298
1036 
 
1037 
    );
1038 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_2_Q :
1039 
MUXCY
1040 
    port map (
1041 
      CI =>
1042 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_1_Q_302
1043 
,
1044 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(1),
1045 
      S =>
1046 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_2_Q_301
1047 
,
1048 
      O =>
1049 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_2_Q_300
1050 
 
1051 
    );
1052 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_1_Q :
1053 
MUXCY
1054 
    port map (
1055 
      CI =>
1056 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_0_Q_304
1057 
,
1058 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(0),
1059 
      S =>
1060 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_1_Q_303
1061 
,
1062 
      O =>
1063 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_1_Q_302
1064 
 
1065 
    );
1066 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_0_Q :
1067 
MUXCY
1068 
    port map (
1069 
      CI => N1,
1070 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad(0),
1071 
      S => N1,
1072 
      O =>
1073 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_cy_0_Q_304
1074 
 
1075 
    );
1076 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_10 : FDC
1077 
    port map (
1078 
      C => rd_clk,
1079 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1080 
      D =>
1081 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_10_Q,
1082 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(10)
1083 
    );
1084 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_9 : FDC
1085 
    port map (
1086 
      C => rd_clk,
1087 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1088 
      D =>
1089 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_9_Q,
1090 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(9)
1091 
    );
1092 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_8 : FDC
1093 
    port map (
1094 
      C => rd_clk,
1095 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1096 
      D =>
1097 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_8_Q,
1098 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(8)
1099 
    );
1100 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_7 : FDC
1101 
    port map (
1102 
      C => rd_clk,
1103 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1104 
      D =>
1105 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_7_Q,
1106 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(7)
1107 
    );
1108 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_6 : FDC
1109 
    port map (
1110 
      C => rd_clk,
1111 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1112 
      D =>
1113 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_6_Q,
1114 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(6)
1115 
    );
1116 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_5 : FDC
1117 
    port map (
1118 
      C => rd_clk,
1119 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1120 
      D =>
1121 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_5_Q,
1122 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(5)
1123 
    );
1124 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_4 : FDC
1125 
    port map (
1126 
      C => rd_clk,
1127 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1128 
      D =>
1129 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_4_Q,
1130 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(4)
1131 
    );
1132 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad_3 : FDC
1133 
    port map (
1134 
      C => rd_clk,
1135 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1136 
      D =>
1137 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_3_Q,
1138 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(3)
1139 
    );
1140 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_9 : FDCE
1141 
    generic map(
1142 
      INIT => '0'
1143 
    )
1144 
    port map (
1145 
      C => rd_clk,
1146 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1147 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1148 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(9),
1149 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9)
1150 
    );
1151 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_8 : FDCE
1152 
    generic map(
1153 
      INIT => '0'
1154 
    )
1155 
    port map (
1156 
      C => rd_clk,
1157 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1158 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1159 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(8),
1160 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8)
1161 
    );
1162 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_7 : FDCE
1163 
    generic map(
1164 
      INIT => '0'
1165 
    )
1166 
    port map (
1167 
      C => rd_clk,
1168 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1169 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1170 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(7),
1171 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7)
1172 
    );
1173 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_6 : FDCE
1174 
    generic map(
1175 
      INIT => '0'
1176 
    )
1177 
    port map (
1178 
      C => rd_clk,
1179 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1180 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1181 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
1182 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6)
1183 
    );
1184 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_5 : FDCE
1185 
    generic map(
1186 
      INIT => '0'
1187 
    )
1188 
    port map (
1189 
      C => rd_clk,
1190 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1191 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1192 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
1193 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5)
1194 
    );
1195 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_4 : FDCE
1196 
    generic map(
1197 
      INIT => '0'
1198 
    )
1199 
    port map (
1200 
      C => rd_clk,
1201 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1202 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1203 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
1204 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4)
1205 
    );
1206 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_3 : FDCE
1207 
    generic map(
1208 
      INIT => '0'
1209 
    )
1210 
    port map (
1211 
      C => rd_clk,
1212 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1213 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1214 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
1215 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3)
1216 
    );
1217 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_2 : FDCE
1218 
    generic map(
1219 
      INIT => '0'
1220 
    )
1221 
    port map (
1222 
      C => rd_clk,
1223 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1224 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1225 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
1226 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2)
1227 
    );
1228 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_1 : FDCE
1229 
    generic map(
1230 
      INIT => '0'
1231 
    )
1232 
    port map (
1233 
      C => rd_clk,
1234 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1235 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1236 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
1237 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1)
1238 
    );
1239 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1_0 : FDCE
1240 
    generic map(
1241 
      INIT => '0'
1242 
    )
1243 
    port map (
1244 
      C => rd_clk,
1245 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1246 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1247 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_rd_pntr_inv_pad(1),
1248 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0)
1249 
    );
1250 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9 : FDCE
1251 
    generic map(
1252 
      INIT => '0'
1253 
    )
1254 
    port map (
1255 
      C => rd_clk,
1256 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1257 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1258 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_9_Q,
1259 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(9)
1260 
    );
1261 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_8 : FDCE
1262 
    generic map(
1263 
      INIT => '0'
1264 
    )
1265 
    port map (
1266 
      C => rd_clk,
1267 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1268 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1269 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_8_Q,
1270 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(8)
1271 
    );
1272 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_7 : FDCE
1273 
    generic map(
1274 
      INIT => '0'
1275 
    )
1276 
    port map (
1277 
      C => rd_clk,
1278 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1279 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1280 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_7_Q,
1281 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(7)
1282 
    );
1283 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_6 : FDCE
1284 
    generic map(
1285 
      INIT => '0'
1286 
    )
1287 
    port map (
1288 
      C => rd_clk,
1289 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1290 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1291 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_6_Q,
1292 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6)
1293 
    );
1294 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_5 : FDCE
1295 
    generic map(
1296 
      INIT => '0'
1297 
    )
1298 
    port map (
1299 
      C => rd_clk,
1300 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1301 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1302 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_5_Q,
1303 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5)
1304 
    );
1305 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_4 : FDCE
1306 
    generic map(
1307 
      INIT => '0'
1308 
    )
1309 
    port map (
1310 
      C => rd_clk,
1311 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1312 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1313 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_4_Q,
1314 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4)
1315 
    );
1316 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_3 : FDCE
1317 
    generic map(
1318 
      INIT => '0'
1319 
    )
1320 
    port map (
1321 
      C => rd_clk,
1322 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1323 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1324 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_3_Q,
1325 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3)
1326 
    );
1327 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_2 : FDCE
1328 
    generic map(
1329 
      INIT => '0'
1330 
    )
1331 
    port map (
1332 
      C => rd_clk,
1333 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1334 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1335 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_2_Q,
1336 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2)
1337 
    );
1338 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_1 : FDCE
1339 
    generic map(
1340 
      INIT => '0'
1341 
    )
1342 
    port map (
1343 
      C => rd_clk,
1344 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en,
1345 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
1346 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_1_Q,
1347 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1)
1348 
    );
1349 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_xor_10_Q :
1350 
XORCY
1351 
    port map (
1352 
      CI =>
1353 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_9_Q_336
1354 
,
1355 
      LI =>
1356 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_10_Q_335
1357 
,
1358 
      O =>
1359 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_10_Q
1360 
    );
1361 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_xor_9_Q :
1362 
XORCY
1363 
    port map (
1364 
      CI =>
1365 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_8_Q_338
1366 
,
1367 
      LI =>
1368 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_9_Q_337
1369 
,
1370 
      O =>
1371 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_9_Q
1372 
    );
1373 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_9_Q :
1374 
MUXCY
1375 
    port map (
1376 
      CI =>
1377 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_8_Q_338
1378 
,
1379 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(8),
1380 
      S =>
1381 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_9_Q_337
1382 
,
1383 
      O =>
1384 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_9_Q_336
1385 
 
1386 
    );
1387 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_8_Q :
1388 
MUXCY
1389 
    port map (
1390 
      CI =>
1391 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_7_Q_340
1392 
,
1393 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(7),
1394 
      S =>
1395 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_8_Q_339
1396 
,
1397 
      O =>
1398 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_8_Q_338
1399 
 
1400 
    );
1401 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_7_Q :
1402 
MUXCY
1403 
    port map (
1404 
      CI =>
1405 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_6_Q_342
1406 
,
1407 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(6),
1408 
      S =>
1409 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_7_Q_341
1410 
,
1411 
      O =>
1412 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_7_Q_340
1413 
 
1414 
    );
1415 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_6_Q :
1416 
MUXCY
1417 
    port map (
1418 
      CI =>
1419 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_5_Q_344
1420 
,
1421 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(5),
1422 
      S =>
1423 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_6_Q_343
1424 
,
1425 
      O =>
1426 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_6_Q_342
1427 
 
1428 
    );
1429 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_5_Q :
1430 
MUXCY
1431 
    port map (
1432 
      CI =>
1433 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_4_Q_346
1434 
,
1435 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(4),
1436 
      S =>
1437 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_5_Q_345
1438 
,
1439 
      O =>
1440 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_5_Q_344
1441 
 
1442 
    );
1443 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_4_Q :
1444 
MUXCY
1445 
    port map (
1446 
      CI =>
1447 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_3_Q_348
1448 
,
1449 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(3),
1450 
      S =>
1451 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_4_Q_347
1452 
,
1453 
      O =>
1454 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_4_Q_346
1455 
 
1456 
    );
1457 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_3_Q :
1458 
MUXCY
1459 
    port map (
1460 
      CI =>
1461 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_2_Q_350
1462 
,
1463 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(2),
1464 
      S =>
1465 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_3_Q_349
1466 
,
1467 
      O =>
1468 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_3_Q_348
1469 
 
1470 
    );
1471 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_2_Q :
1472 
MUXCY
1473 
    port map (
1474 
      CI =>
1475 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_1_Q_352
1476 
,
1477 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(1),
1478 
      S =>
1479 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_2_Q_351
1480 
,
1481 
      O =>
1482 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_2_Q_350
1483 
 
1484 
    );
1485 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_1_Q :
1486 
MUXCY
1487 
    port map (
1488 
      CI =>
1489 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_0_Q_354
1490 
,
1491 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
1492 
      S =>
1493 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_1_Q_353
1494 
,
1495 
      O =>
1496 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_1_Q_352
1497 
 
1498 
    );
1499 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_0_Q :
1500 
MUXCY
1501 
    port map (
1502 
      CI => N1,
1503 
      DI => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1504 
      S => N1,
1505 
      O =>
1506 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_cy_0_Q_354
1507 
 
1508 
    );
1509 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad_10 : FDC
1510 
    port map (
1511 
      C => wr_clk,
1512 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1513 
      D =>
1514 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_10_Q,
1515 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad(10)
1516 
    );
1517 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad_9 : FDC
1518 
    port map (
1519 
      C => wr_clk,
1520 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1521 
      D =>
1522 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_9_Q,
1523 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad(9)
1524 
    );
1525 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_9 : FDCE
1526 
    generic map(
1527 
      INIT => '0'
1528 
    )
1529 
    port map (
1530 
      C => wr_clk,
1531 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1532 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1533 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(9),
1534 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(9)
1535 
    );
1536 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_8 : FDCE
1537 
    generic map(
1538 
      INIT => '0'
1539 
    )
1540 
    port map (
1541 
      C => wr_clk,
1542 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1543 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1544 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(8),
1545 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(8)
1546 
    );
1547 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_7 : FDCE
1548 
    generic map(
1549 
      INIT => '0'
1550 
    )
1551 
    port map (
1552 
      C => wr_clk,
1553 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1554 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1555 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(7),
1556 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(7)
1557 
    );
1558 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_6 : FDCE
1559 
    generic map(
1560 
      INIT => '0'
1561 
    )
1562 
    port map (
1563 
      C => wr_clk,
1564 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1565 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1566 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(6),
1567 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(6)
1568 
    );
1569 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_5 : FDCE
1570 
    generic map(
1571 
      INIT => '0'
1572 
    )
1573 
    port map (
1574 
      C => wr_clk,
1575 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1576 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1577 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(5),
1578 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(5)
1579 
    );
1580 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_4 : FDCE
1581 
    generic map(
1582 
      INIT => '0'
1583 
    )
1584 
    port map (
1585 
      C => wr_clk,
1586 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1587 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1588 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(4),
1589 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(4)
1590 
    );
1591 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_3 : FDCE
1592 
    generic map(
1593 
      INIT => '0'
1594 
    )
1595 
    port map (
1596 
      C => wr_clk,
1597 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1598 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1599 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(3),
1600 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(3)
1601 
    );
1602 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2_2 : FDCE
1603 
    generic map(
1604 
      INIT => '0'
1605 
    )
1606 
    port map (
1607 
      C => wr_clk,
1608 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1609 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1610 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(2),
1611 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(2)
1612 
    );
1613 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_9 : FDCE
1614 
    generic map(
1615 
      INIT => '0'
1616 
    )
1617 
    port map (
1618 
      C => wr_clk,
1619 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1620 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1621 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(9),
1622 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(9)
1623 
    );
1624 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_8 : FDCE
1625 
    generic map(
1626 
      INIT => '0'
1627 
    )
1628 
    port map (
1629 
      C => wr_clk,
1630 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1631 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1632 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(8),
1633 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(8)
1634 
    );
1635 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_7 : FDCE
1636 
    generic map(
1637 
      INIT => '0'
1638 
    )
1639 
    port map (
1640 
      C => wr_clk,
1641 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1642 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1643 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(7),
1644 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(7)
1645 
    );
1646 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_6 : FDCE
1647 
    generic map(
1648 
      INIT => '0'
1649 
    )
1650 
    port map (
1651 
      C => wr_clk,
1652 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1653 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1654 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6),
1655 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(6)
1656 
    );
1657 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_5 : FDCE
1658 
    generic map(
1659 
      INIT => '0'
1660 
    )
1661 
    port map (
1662 
      C => wr_clk,
1663 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1664 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1665 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
1666 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(5)
1667 
    );
1668 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_4 : FDCE
1669 
    generic map(
1670 
      INIT => '0'
1671 
    )
1672 
    port map (
1673 
      C => wr_clk,
1674 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1675 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1676 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
1677 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(4)
1678 
    );
1679 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_3 : FDCE
1680 
    generic map(
1681 
      INIT => '0'
1682 
    )
1683 
    port map (
1684 
      C => wr_clk,
1685 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1686 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1687 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
1688 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(3)
1689 
    );
1690 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_2 : FDCE
1691 
    generic map(
1692 
      INIT => '0'
1693 
    )
1694 
    port map (
1695 
      C => wr_clk,
1696 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1697 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1698 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
1699 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(2)
1700 
    );
1701 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_1 : FDCE
1702 
    generic map(
1703 
      INIT => '0'
1704 
    )
1705 
    port map (
1706 
      C => wr_clk,
1707 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1708 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1709 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
1710 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(1)
1711 
    );
1712 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1_0 : FDPE
1713 
    generic map(
1714 
      INIT => '1'
1715 
    )
1716 
    port map (
1717 
      C => wr_clk,
1718 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1719 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus1_0_inv,
1720 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1721 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0)
1722 
    );
1723 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9 : FDCE
1724 
    generic map(
1725 
      INIT => '0'
1726 
    )
1727 
    port map (
1728 
      C => wr_clk,
1729 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1730 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1731 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_9_Q_368,
1732 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(9)
1733 
    );
1734 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_8 : FDCE
1735 
    generic map(
1736 
      INIT => '0'
1737 
    )
1738 
    port map (
1739 
      C => wr_clk,
1740 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1741 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1742 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_8_Q_367,
1743 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(8)
1744 
    );
1745 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_7 : FDCE
1746 
    generic map(
1747 
      INIT => '0'
1748 
    )
1749 
    port map (
1750 
      C => wr_clk,
1751 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1752 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1753 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_7_Q,
1754 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(7)
1755 
    );
1756 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_6 : FDCE
1757 
    generic map(
1758 
      INIT => '0'
1759 
    )
1760 
    port map (
1761 
      C => wr_clk,
1762 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1763 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1764 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_6_Q,
1765 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6)
1766 
    );
1767 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_5 : FDCE
1768 
    generic map(
1769 
      INIT => '0'
1770 
    )
1771 
    port map (
1772 
      C => wr_clk,
1773 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1774 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1775 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_5_Q,
1776 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5)
1777 
    );
1778 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_4 : FDCE
1779 
    generic map(
1780 
      INIT => '0'
1781 
    )
1782 
    port map (
1783 
      C => wr_clk,
1784 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1785 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1786 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_4_Q,
1787 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4)
1788 
    );
1789 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_3 : FDCE
1790 
    generic map(
1791 
      INIT => '0'
1792 
    )
1793 
    port map (
1794 
      C => wr_clk,
1795 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1796 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1797 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_Q,
1798 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3)
1799 
    );
1800 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_2 : FDCE
1801 
    generic map(
1802 
      INIT => '0'
1803 
    )
1804 
    port map (
1805 
      C => wr_clk,
1806 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1807 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1808 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_2_Q,
1809 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2)
1810 
    );
1811 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_1 : FDPE
1812 
    generic map(
1813 
      INIT => '1'
1814 
    )
1815 
    port map (
1816 
      C => wr_clk,
1817 
      CE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
1818 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_1_Q,
1819 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(1),
1820 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1)
1821 
    );
1822 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_9 : FDC
1823 
    generic map(
1824 
      INIT => '0'
1825 
    )
1826 
    port map (
1827 
      C => rd_clk,
1828 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1829 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
1830 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(9)
1831 
    );
1832 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_8 : FDC
1833 
    generic map(
1834 
      INIT => '0'
1835 
    )
1836 
    port map (
1837 
      C => rd_clk,
1838 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1839 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_4_o,
1840 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(8)
1841 
    );
1842 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_7 : FDC
1843 
    generic map(
1844 
      INIT => '0'
1845 
    )
1846 
    port map (
1847 
      C => rd_clk,
1848 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1849 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_5_o,
1850 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(7)
1851 
    );
1852 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_6 : FDC
1853 
    generic map(
1854 
      INIT => '0'
1855 
    )
1856 
    port map (
1857 
      C => rd_clk,
1858 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1859 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_6_o,
1860 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(6)
1861 
    );
1862 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_5 : FDC
1863 
    generic map(
1864 
      INIT => '0'
1865 
    )
1866 
    port map (
1867 
      C => rd_clk,
1868 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1869 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_7_o,
1870 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(5)
1871 
    );
1872 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_4 : FDC
1873 
    generic map(
1874 
      INIT => '0'
1875 
    )
1876 
    port map (
1877 
      C => rd_clk,
1878 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1879 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_8_o,
1880 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(4)
1881 
    );
1882 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_3 : FDC
1883 
    generic map(
1884 
      INIT => '0'
1885 
    )
1886 
    port map (
1887 
      C => rd_clk,
1888 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1889 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_9_o,
1890 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(3)
1891 
    );
1892 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_2 : FDC
1893 
    generic map(
1894 
      INIT => '0'
1895 
    )
1896 
    port map (
1897 
      C => rd_clk,
1898 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1899 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_10_o,
1900 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(2)
1901 
    );
1902 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_1 : FDC
1903 
    generic map(
1904 
      INIT => '0'
1905 
    )
1906 
    port map (
1907 
      C => rd_clk,
1908 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1909 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_11_o,
1910 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(1)
1911 
    );
1912 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin_0 : FDC
1913 
    generic map(
1914 
      INIT => '0'
1915 
    )
1916 
    port map (
1917 
      C => rd_clk,
1918 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
1919 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_12_o,
1920 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(0)
1921 
    );
1922 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_9 : FDC
1923 
    generic map(
1924 
      INIT => '0'
1925 
    )
1926 
    port map (
1927 
      C => wr_clk,
1928 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1929 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
1930 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(9)
1931 
    );
1932 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_8 : FDC
1933 
    generic map(
1934 
      INIT => '0'
1935 
    )
1936 
    port map (
1937 
      C => wr_clk,
1938 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1939 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_17_o,
1940 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(8)
1941 
    );
1942 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_7 : FDC
1943 
    generic map(
1944 
      INIT => '0'
1945 
    )
1946 
    port map (
1947 
      C => wr_clk,
1948 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1949 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_18_o,
1950 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(7)
1951 
    );
1952 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_6 : FDC
1953 
    generic map(
1954 
      INIT => '0'
1955 
    )
1956 
    port map (
1957 
      C => wr_clk,
1958 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1959 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_19_o,
1960 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(6)
1961 
    );
1962 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_5 : FDC
1963 
    generic map(
1964 
      INIT => '0'
1965 
    )
1966 
    port map (
1967 
      C => wr_clk,
1968 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1969 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_20_o,
1970 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(5)
1971 
    );
1972 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_4 : FDC
1973 
    generic map(
1974 
      INIT => '0'
1975 
    )
1976 
    port map (
1977 
      C => wr_clk,
1978 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1979 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_21_o,
1980 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(4)
1981 
    );
1982 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_3 : FDC
1983 
    generic map(
1984 
      INIT => '0'
1985 
    )
1986 
    port map (
1987 
      C => wr_clk,
1988 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1989 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_22_o,
1990 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(3)
1991 
    );
1992 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_2 : FDC
1993 
    generic map(
1994 
      INIT => '0'
1995 
    )
1996 
    port map (
1997 
      C => wr_clk,
1998 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
1999 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_23_o,
2000 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(2)
2001 
    );
2002 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_1 : FDC
2003 
    generic map(
2004 
      INIT => '0'
2005 
    )
2006 
    port map (
2007 
      C => wr_clk,
2008 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2009 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_24_o,
2010 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(1)
2011 
    );
2012 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin_0 : FDC
2013 
    generic map(
2014 
      INIT => '0'
2015 
    )
2016 
    port map (
2017 
      C => wr_clk,
2018 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2019 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_25_o,
2020 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(0)
2021 
    );
2022 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9 : FDC
2023 
    generic map(
2024 
      INIT => '0'
2025 
    )
2026 
    port map (
2027 
      C => rd_clk,
2028 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2029 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(9),
2030 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9)
2031 
    );
2032 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_8 : FDC
2033 
    generic map(
2034 
      INIT => '0'
2035 
    )
2036 
    port map (
2037 
      C => rd_clk,
2038 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2039 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(8),
2040 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8)
2041 
    );
2042 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_7 : FDC
2043 
    generic map(
2044 
      INIT => '0'
2045 
    )
2046 
    port map (
2047 
      C => rd_clk,
2048 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2049 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(7),
2050 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7)
2051 
    );
2052 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_6 : FDC
2053 
    generic map(
2054 
      INIT => '0'
2055 
    )
2056 
    port map (
2057 
      C => rd_clk,
2058 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2059 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(6),
2060 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6)
2061 
    );
2062 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_5 : FDC
2063 
    generic map(
2064 
      INIT => '0'
2065 
    )
2066 
    port map (
2067 
      C => rd_clk,
2068 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2069 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(5),
2070 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5)
2071 
    );
2072 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_4 : FDC
2073 
    generic map(
2074 
      INIT => '0'
2075 
    )
2076 
    port map (
2077 
      C => rd_clk,
2078 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2079 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(4),
2080 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(4)
2081 
    );
2082 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_3 : FDC
2083 
    generic map(
2084 
      INIT => '0'
2085 
    )
2086 
    port map (
2087 
      C => rd_clk,
2088 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2089 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(3),
2090 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(3)
2091 
    );
2092 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_2 : FDC
2093 
    generic map(
2094 
      INIT => '0'
2095 
    )
2096 
    port map (
2097 
      C => rd_clk,
2098 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2099 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(2),
2100 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(2)
2101 
    );
2102 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_1 : FDC
2103 
    generic map(
2104 
      INIT => '0'
2105 
    )
2106 
    port map (
2107 
      C => rd_clk,
2108 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2109 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(1),
2110 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(1)
2111 
    );
2112 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_0 : FDC
2113 
    generic map(
2114 
      INIT => '0'
2115 
    )
2116 
    port map (
2117 
      C => rd_clk,
2118 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2119 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(0),
2120 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(0)
2121 
    );
2122 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9 : FDC
2123 
    generic map(
2124 
      INIT => '0'
2125 
    )
2126 
    port map (
2127 
      C => wr_clk,
2128 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2129 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(9),
2130 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9)
2131 
    );
2132 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_8 : FDC
2133 
    generic map(
2134 
      INIT => '0'
2135 
    )
2136 
    port map (
2137 
      C => wr_clk,
2138 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2139 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(8),
2140 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8)
2141 
    );
2142 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_7 : FDC
2143 
    generic map(
2144 
      INIT => '0'
2145 
    )
2146 
    port map (
2147 
      C => wr_clk,
2148 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2149 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(7),
2150 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7)
2151 
    );
2152 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_6 : FDC
2153 
    generic map(
2154 
      INIT => '0'
2155 
    )
2156 
    port map (
2157 
      C => wr_clk,
2158 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2159 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(6),
2160 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6)
2161 
    );
2162 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_5 : FDC
2163 
    generic map(
2164 
      INIT => '0'
2165 
    )
2166 
    port map (
2167 
      C => wr_clk,
2168 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2169 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(5),
2170 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5)
2171 
    );
2172 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_4 : FDC
2173 
    generic map(
2174 
      INIT => '0'
2175 
    )
2176 
    port map (
2177 
      C => wr_clk,
2178 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2179 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(4),
2180 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(4)
2181 
    );
2182 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_3 : FDC
2183 
    generic map(
2184 
      INIT => '0'
2185 
    )
2186 
    port map (
2187 
      C => wr_clk,
2188 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2189 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(3),
2190 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(3)
2191 
    );
2192 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_2 : FDC
2193 
    generic map(
2194 
      INIT => '0'
2195 
    )
2196 
    port map (
2197 
      C => wr_clk,
2198 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2199 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(2),
2200 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(2)
2201 
    );
2202 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_1 : FDC
2203 
    generic map(
2204 
      INIT => '0'
2205 
    )
2206 
    port map (
2207 
      C => wr_clk,
2208 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2209 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(1),
2210 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(1)
2211 
    );
2212 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_0 : FDC
2213 
    generic map(
2214 
      INIT => '0'
2215 
    )
2216 
    port map (
2217 
      C => wr_clk,
2218 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2219 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(0),
2220 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(0)
2221 
    );
2222 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_9 : FDC
2223 
    generic map(
2224 
      INIT => '0'
2225 
    )
2226 
    port map (
2227 
      C => rd_clk,
2228 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2229 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(9),
2230 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(9)
2231 
    );
2232 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_8 : FDC
2233 
    generic map(
2234 
      INIT => '0'
2235 
    )
2236 
    port map (
2237 
      C => rd_clk,
2238 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2239 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(8),
2240 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(8)
2241 
    );
2242 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_7 : FDC
2243 
    generic map(
2244 
      INIT => '0'
2245 
    )
2246 
    port map (
2247 
      C => rd_clk,
2248 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2249 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(7),
2250 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(7)
2251 
    );
2252 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_6 : FDC
2253 
    generic map(
2254 
      INIT => '0'
2255 
    )
2256 
    port map (
2257 
      C => rd_clk,
2258 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2259 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(6),
2260 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(6)
2261 
    );
2262 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_5 : FDC
2263 
    generic map(
2264 
      INIT => '0'
2265 
    )
2266 
    port map (
2267 
      C => rd_clk,
2268 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2269 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(5),
2270 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(5)
2271 
    );
2272 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_4 : FDC
2273 
    generic map(
2274 
      INIT => '0'
2275 
    )
2276 
    port map (
2277 
      C => rd_clk,
2278 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2279 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(4),
2280 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(4)
2281 
    );
2282 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_3 : FDC
2283 
    generic map(
2284 
      INIT => '0'
2285 
    )
2286 
    port map (
2287 
      C => rd_clk,
2288 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2289 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(3),
2290 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(3)
2291 
    );
2292 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_2 : FDC
2293 
    generic map(
2294 
      INIT => '0'
2295 
    )
2296 
    port map (
2297 
      C => rd_clk,
2298 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2299 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(2),
2300 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(2)
2301 
    );
2302 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_1 : FDC
2303 
    generic map(
2304 
      INIT => '0'
2305 
    )
2306 
    port map (
2307 
      C => rd_clk,
2308 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2309 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(1),
2310 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(1)
2311 
    );
2312 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_0 : FDC
2313 
    generic map(
2314 
      INIT => '0'
2315 
    )
2316 
    port map (
2317 
      C => rd_clk,
2318 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2319 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(0),
2320 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg(0)
2321 
    );
2322 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_9 : FDC
2323 
    generic map(
2324 
      INIT => '0'
2325 
    )
2326 
    port map (
2327 
      C => wr_clk,
2328 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2329 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(9),
2330 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(9)
2331 
    );
2332 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_8 : FDC
2333 
    generic map(
2334 
      INIT => '0'
2335 
    )
2336 
    port map (
2337 
      C => wr_clk,
2338 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2339 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(8),
2340 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(8)
2341 
    );
2342 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_7 : FDC
2343 
    generic map(
2344 
      INIT => '0'
2345 
    )
2346 
    port map (
2347 
      C => wr_clk,
2348 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2349 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(7),
2350 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(7)
2351 
    );
2352 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_6 : FDC
2353 
    generic map(
2354 
      INIT => '0'
2355 
    )
2356 
    port map (
2357 
      C => wr_clk,
2358 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2359 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(6),
2360 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(6)
2361 
    );
2362 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_5 : FDC
2363 
    generic map(
2364 
      INIT => '0'
2365 
    )
2366 
    port map (
2367 
      C => wr_clk,
2368 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2369 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(5),
2370 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(5)
2371 
    );
2372 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_4 : FDC
2373 
    generic map(
2374 
      INIT => '0'
2375 
    )
2376 
    port map (
2377 
      C => wr_clk,
2378 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2379 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(4),
2380 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(4)
2381 
    );
2382 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_3 : FDC
2383 
    generic map(
2384 
      INIT => '0'
2385 
    )
2386 
    port map (
2387 
      C => wr_clk,
2388 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2389 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(3),
2390 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(3)
2391 
    );
2392 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_2 : FDC
2393 
    generic map(
2394 
      INIT => '0'
2395 
    )
2396 
    port map (
2397 
      C => wr_clk,
2398 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2399 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(2),
2400 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(2)
2401 
    );
2402 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_1 : FDC
2403 
    generic map(
2404 
      INIT => '0'
2405 
    )
2406 
    port map (
2407 
      C => wr_clk,
2408 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2409 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(1),
2410 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(1)
2411 
    );
2412 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_0 : FDC
2413 
    generic map(
2414 
      INIT => '0'
2415 
    )
2416 
    port map (
2417 
      C => wr_clk,
2418 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2419 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(0),
2420 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg(0)
2421 
    );
2422 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_9 : FDC
2423 
    generic map(
2424 
      INIT => '0'
2425 
    )
2426 
    port map (
2427 
      C => rd_clk,
2428 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2429 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9),
2430 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(9)
2431 
    );
2432 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_8 : FDC
2433 
    generic map(
2434 
      INIT => '0'
2435 
    )
2436 
    port map (
2437 
      C => rd_clk,
2438 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2439 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_8_RD_PNTR_9_XOR_55_o,
2440 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(8)
2441 
    );
2442 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_7 : FDC
2443 
    generic map(
2444 
      INIT => '0'
2445 
    )
2446 
    port map (
2447 
      C => rd_clk,
2448 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2449 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_7_RD_PNTR_8_XOR_56_o,
2450 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(7)
2451 
    );
2452 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_6 : FDC
2453 
    generic map(
2454 
      INIT => '0'
2455 
    )
2456 
    port map (
2457 
      C => rd_clk,
2458 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2459 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_6_RD_PNTR_7_XOR_57_o,
2460 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(6)
2461 
    );
2462 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_5 : FDC
2463 
    generic map(
2464 
      INIT => '0'
2465 
    )
2466 
    port map (
2467 
      C => rd_clk,
2468 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2469 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_5_RD_PNTR_6_XOR_58_o,
2470 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(5)
2471 
    );
2472 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_4 : FDC
2473 
    generic map(
2474 
      INIT => '0'
2475 
    )
2476 
    port map (
2477 
      C => rd_clk,
2478 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2479 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_4_RD_PNTR_5_XOR_59_o,
2480 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(4)
2481 
    );
2482 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_3 : FDC
2483 
    generic map(
2484 
      INIT => '0'
2485 
    )
2486 
    port map (
2487 
      C => rd_clk,
2488 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2489 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_3_RD_PNTR_4_XOR_60_o,
2490 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(3)
2491 
    );
2492 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_2 : FDC
2493 
    generic map(
2494 
      INIT => '0'
2495 
    )
2496 
    port map (
2497 
      C => rd_clk,
2498 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2499 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_2_RD_PNTR_3_XOR_61_o,
2500 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(2)
2501 
    );
2502 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_1 : FDC
2503 
    generic map(
2504 
      INIT => '0'
2505 
    )
2506 
    port map (
2507 
      C => rd_clk,
2508 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2509 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_1_RD_PNTR_2_XOR_62_o,
2510 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(1)
2511 
    );
2512 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_0 : FDC
2513 
    generic map(
2514 
      INIT => '0'
2515 
    )
2516 
    port map (
2517 
      C => rd_clk,
2518 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(1),
2519 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_0_RD_PNTR_1_XOR_63_o,
2520 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc(0)
2521 
    );
2522 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_9 : FDC
2523 
    generic map(
2524 
      INIT => '0'
2525 
    )
2526 
    port map (
2527 
      C => wr_clk,
2528 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2529 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(9),
2530 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(9)
2531 
    );
2532 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_8 : FDC
2533 
    generic map(
2534 
      INIT => '0'
2535 
    )
2536 
    port map (
2537 
      C => wr_clk,
2538 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2539 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_8_WR_PNTR_9_XOR_1_o,
2540 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(8)
2541 
    );
2542 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_7 : FDC
2543 
    generic map(
2544 
      INIT => '0'
2545 
    )
2546 
    port map (
2547 
      C => wr_clk,
2548 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2549 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_7_WR_PNTR_8_XOR_2_o,
2550 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(7)
2551 
    );
2552 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_6 : FDC
2553 
    generic map(
2554 
      INIT => '0'
2555 
    )
2556 
    port map (
2557 
      C => wr_clk,
2558 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2559 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_6_WR_PNTR_7_XOR_3_o,
2560 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(6)
2561 
    );
2562 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_5 : FDC
2563 
    generic map(
2564 
      INIT => '0'
2565 
    )
2566 
    port map (
2567 
      C => wr_clk,
2568 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2569 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_5_WR_PNTR_6_XOR_4_o,
2570 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(5)
2571 
    );
2572 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_4 : FDC
2573 
    generic map(
2574 
      INIT => '0'
2575 
    )
2576 
    port map (
2577 
      C => wr_clk,
2578 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2579 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_4_WR_PNTR_5_XOR_5_o,
2580 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(4)
2581 
    );
2582 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_3 : FDC
2583 
    generic map(
2584 
      INIT => '0'
2585 
    )
2586 
    port map (
2587 
      C => wr_clk,
2588 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2589 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_3_WR_PNTR_4_XOR_6_o,
2590 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(3)
2591 
    );
2592 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_2 : FDC
2593 
    generic map(
2594 
      INIT => '0'
2595 
    )
2596 
    port map (
2597 
      C => wr_clk,
2598 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2599 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_2_WR_PNTR_3_XOR_7_o,
2600 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(2)
2601 
    );
2602 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_1 : FDC
2603 
    generic map(
2604 
      INIT => '0'
2605 
    )
2606 
    port map (
2607 
      C => wr_clk,
2608 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2609 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_1_WR_PNTR_2_XOR_8_o,
2610 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(1)
2611 
    );
2612 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_0 : FDC
2613 
    generic map(
2614 
      INIT => '0'
2615 
    )
2616 
    port map (
2617 
      C => wr_clk,
2618 
      CLR => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_wr_rst_reg(0),
2619 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_0_WR_PNTR_1_XOR_9_o,
2620 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc(0)
2621 
    );
2622 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_ram_rd_en_i1 : LUT2
2623 
    generic map(
2624 
      INIT => X"2"
2625 
    )
2626 
    port map (
2627 
      I0 => rd_en,
2628 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27,
2629 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_rd_en
2630 
    );
2631 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_ram_wr_en_i1 : LUT2
2632 
    generic map(
2633 
      INIT => X"2"
2634 
    )
2635 
    port map (
2636 
      I0 => wr_en,
2637 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_fb_i_235,
2638 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en
2639 
    );
2640 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_tmp_ram_rd_en1 : LUT3
2641 
    generic map(
2642 
      INIT => X"CE"
2643 
    )
2644 
    port map (
2645 
      I0 => rd_en,
2646 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(0),
2647 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27,
2648 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_tmp_ram_rd_en
2649 
    );
2650 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0_comp1_OR_6_o1 : LUT4
2651 
    generic map(
2652 
      INIT => X"F2F0"
2653 
    )
2654 
    port map (
2655 
      I0 => rd_en,
2656 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27,
2657 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0,
2658 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp1,
2659 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_comp0_comp1_OR_6_o
2660 
    );
2661 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_Mmux_comp1_GND_411_o_MUX_26_o11 : LUT5
2662 
    generic map(
2663 
      INIT => X"33023300"
2664 
    )
2665 
    port map (
2666 
      I0 => wr_en,
2667 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_RST_FULL_GEN_102,
2668 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_fb_i_235,
2669 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1,
2670 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp2,
2671 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_comp1_GND_411_o_MUX_26_o
2672 
    );
2673 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_comb1 : LUT2
2674 
    generic map(
2675 
      INIT => X"2"
2676 
    )
2677 
    port map (
2678 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_241,
2679 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_asreg_d2_242,
2680 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_rd_rst_comb
2681 
    );
2682 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_comb1 : LUT2
2683 
    generic map(
2684 
      INIT => X"2"
2685 
    )
2686 
    port map (
2687 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_244,
2688 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d2_245,
2689 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_comb
2690 
    );
2691 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1_4_1 : LUT4
2692 
    generic map(
2693 
      INIT => X"9009"
2694 
    )
2695 
    port map (
2696 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(9),
2697 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(9),
2698 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(8),
2699 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(8),
2700 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(4)
2701 
    );
2702 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1_3_1 : LUT4
2703 
    generic map(
2704 
      INIT => X"9009"
2705 
    )
2706 
    port map (
2707 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(7),
2708 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(7),
2709 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(6),
2710 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(6),
2711 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(3)
2712 
    );
2713 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1_2_1 : LUT4
2714 
    generic map(
2715 
      INIT => X"9009"
2716 
    )
2717 
    port map (
2718 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(5),
2719 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(5),
2720 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(4),
2721 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(4),
2722 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(2)
2723 
    );
2724 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1_1_1 : LUT4
2725 
    generic map(
2726 
      INIT => X"9009"
2727 
    )
2728 
    port map (
2729 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(3),
2730 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(3),
2731 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(2),
2732 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(2),
2733 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(1)
2734 
    );
2735 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1_0_1 : LUT4
2736 
    generic map(
2737 
      INIT => X"9009"
2738 
    )
2739 
    port map (
2740 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(1),
2741 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(1),
2742 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(0),
2743 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
2744 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c1_v1(0)
2745 
    );
2746 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1_4_1 : LUT4
2747 
    generic map(
2748 
      INIT => X"9009"
2749 
    )
2750 
    port map (
2751 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(9),
2752 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(9),
2753 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(8),
2754 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(8),
2755 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(4)
2756 
    );
2757 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1_3_1 : LUT4
2758 
    generic map(
2759 
      INIT => X"9009"
2760 
    )
2761 
    port map (
2762 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(7),
2763 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(7),
2764 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(6),
2765 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6),
2766 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(3)
2767 
    );
2768 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1_2_1 : LUT4
2769 
    generic map(
2770 
      INIT => X"9009"
2771 
    )
2772 
    port map (
2773 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(5),
2774 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
2775 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(4),
2776 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
2777 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(2)
2778 
    );
2779 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1_1_1 : LUT4
2780 
    generic map(
2781 
      INIT => X"9009"
2782 
    )
2783 
    port map (
2784 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(3),
2785 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
2786 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(2),
2787 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
2788 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(1)
2789 
    );
2790 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1_4_1 : LUT4
2791 
    generic map(
2792 
      INIT => X"9009"
2793 
    )
2794 
    port map (
2795 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9),
2796 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(9),
2797 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8),
2798 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(8),
2799 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(4)
2800 
    );
2801 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1_3_1 : LUT4
2802 
    generic map(
2803 
      INIT => X"9009"
2804 
    )
2805 
    port map (
2806 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7),
2807 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(7),
2808 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6),
2809 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(6),
2810 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(3)
2811 
    );
2812 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1_2_1 : LUT4
2813 
    generic map(
2814 
      INIT => X"9009"
2815 
    )
2816 
    port map (
2817 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5),
2818 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(5),
2819 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4),
2820 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(4),
2821 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(2)
2822 
    );
2823 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1_1_1 : LUT4
2824 
    generic map(
2825 
      INIT => X"9009"
2826 
    )
2827 
    port map (
2828 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3),
2829 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(3),
2830 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2),
2831 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(2),
2832 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(1)
2833 
    );
2834 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1_0_1 : LUT4
2835 
    generic map(
2836 
      INIT => X"9009"
2837 
    )
2838 
    port map (
2839 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1),
2840 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(1),
2841 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
2842 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(0),
2843 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c0_v1(0)
2844 
    );
2845 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1_4_1 : LUT4
2846 
    generic map(
2847 
      INIT => X"9009"
2848 
    )
2849 
    port map (
2850 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(9),
2851 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(9),
2852 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(8),
2853 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(8),
2854 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(4)
2855 
    );
2856 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1_3_1 : LUT4
2857 
    generic map(
2858 
      INIT => X"9009"
2859 
    )
2860 
    port map (
2861 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(7),
2862 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(7),
2863 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
2864 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(6),
2865 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(3)
2866 
    );
2867 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1_2_1 : LUT4
2868 
    generic map(
2869 
      INIT => X"8241"
2870 
    )
2871 
    port map (
2872 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(4),
2873 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(5),
2874 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
2875 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
2876 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(2)
2877 
    );
2878 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1_1_1 : LUT4
2879 
    generic map(
2880 
      INIT => X"8421"
2881 
    )
2882 
    port map (
2883 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(2),
2884 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(3),
2885 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
2886 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
2887 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(1)
2888 
    );
2889 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT811 : LUT5
2890 
    generic map(
2891 
      INIT => X"FFFF7FFF"
2892 
    )
2893 
    port map (
2894 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
2895 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
2896 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
2897 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
2898 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41,
2899 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT81_324
2900 
    );
2901 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT1031 : LUT5
2902 
    generic map(
2903 
      INIT => X"00008000"
2904 
    )
2905 
    port map (
2906 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
2907 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
2908 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
2909 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
2910 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41,
2911 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT103
2912 
    );
2913 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT71 : LUT5
2914 
    generic map(
2915 
      INIT => X"AAAA6AAA"
2916 
    )
2917 
    port map (
2918 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
2919 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
2920 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
2921 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
2922 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41,
2923 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_6_Q
2924 
    );
2925 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT101 : LUT5
2926 
    generic map(
2927 
      INIT => X"EAAA6A2A"
2928 
    )
2929 
    port map (
2930 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(9),
2931 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(8),
2932 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(7),
2933 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT103,
2934 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT81_324,
2935 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_9_Q
2936 
    );
2937 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_6_1 : LUT5
2938 
    generic map(
2939 
      INIT => X"AAAA6AAA"
2940 
    )
2941 
    port map (
2942 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6),
2943 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
2944 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
2945 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
2946 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_bdd0,
2947 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_6_Q
2948 
    );
2949 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_7_1 : LUT6
2950 
    generic map(
2951 
      INIT => X"CCCCCCCC6CCCCCCC"
2952 
    )
2953 
    port map (
2954 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
2955 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(7),
2956 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
2957 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6),
2958 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
2959 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_bdd0,
2960 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_7_Q
2961 
    );
2962 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_17_o1 : LUT2
2963 
    generic map(
2964 
      INIT => X"6"
2965 
    )
2966 
    port map (
2967 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
2968 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
2969 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_17_o
2970 
    );
2971 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_18_o1 : LUT3
2972 
    generic map(
2973 
      INIT => X"96"
2974 
    )
2975 
    port map (
2976 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
2977 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
2978 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
2979 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_18_o
2980 
    );
2981 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_4_o1 : LUT2
2982 
    generic map(
2983 
      INIT => X"6"
2984 
    )
2985 
    port map (
2986 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
2987 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
2988 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_4_o
2989 
    );
2990 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_5_o1 : LUT3
2991 
    generic map(
2992 
      INIT => X"96"
2993 
    )
2994 
    port map (
2995 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
2996 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
2997 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
2998 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_5_o
2999 
    );
3000 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_8_WR_PNTR_9_XOR_1_o_xo_0_1 : LUT2
3001 
    generic map(
3002 
      INIT => X"6"
3003 
    )
3004 
    port map (
3005 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(8),
3006 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(9),
3007 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_8_WR_PNTR_9_XOR_1_o
3008 
    );
3009 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_7_WR_PNTR_8_XOR_2_o_xo_0_1 : LUT2
3010 
    generic map(
3011 
      INIT => X"6"
3012 
    )
3013 
    port map (
3014 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(7),
3015 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(8),
3016 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_7_WR_PNTR_8_XOR_2_o
3017 
    );
3018 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_6_WR_PNTR_7_XOR_3_o_xo_0_1 : LUT2
3019 
    generic map(
3020 
      INIT => X"6"
3021 
    )
3022 
    port map (
3023 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(6),
3024 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(7),
3025 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_6_WR_PNTR_7_XOR_3_o
3026 
    );
3027 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_5_WR_PNTR_6_XOR_4_o_xo_0_1 : LUT2
3028 
    generic map(
3029 
      INIT => X"6"
3030 
    )
3031 
    port map (
3032 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(5),
3033 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(6),
3034 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_5_WR_PNTR_6_XOR_4_o
3035 
    );
3036 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_4_WR_PNTR_5_XOR_5_o_xo_0_1 : LUT2
3037 
    generic map(
3038 
      INIT => X"6"
3039 
    )
3040 
    port map (
3041 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(4),
3042 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(5),
3043 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_4_WR_PNTR_5_XOR_5_o
3044 
    );
3045 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_3_WR_PNTR_4_XOR_6_o_xo_0_1 : LUT2
3046 
    generic map(
3047 
      INIT => X"6"
3048 
    )
3049 
    port map (
3050 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(3),
3051 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(4),
3052 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_3_WR_PNTR_4_XOR_6_o
3053 
    );
3054 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_2_WR_PNTR_3_XOR_7_o_xo_0_1 : LUT2
3055 
    generic map(
3056 
      INIT => X"6"
3057 
    )
3058 
    port map (
3059 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(2),
3060 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(3),
3061 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_2_WR_PNTR_3_XOR_7_o
3062 
    );
3063 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_8_RD_PNTR_9_XOR_55_o_xo_0_1 : LUT2
3064 
    generic map(
3065 
      INIT => X"6"
3066 
    )
3067 
    port map (
3068 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8),
3069 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9),
3070 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_8_RD_PNTR_9_XOR_55_o
3071 
    );
3072 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_7_RD_PNTR_8_XOR_56_o_xo_0_1 : LUT2
3073 
    generic map(
3074 
      INIT => X"6"
3075 
    )
3076 
    port map (
3077 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7),
3078 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8),
3079 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_7_RD_PNTR_8_XOR_56_o
3080 
    );
3081 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_6_RD_PNTR_7_XOR_57_o_xo_0_1 : LUT2
3082 
    generic map(
3083 
      INIT => X"6"
3084 
    )
3085 
    port map (
3086 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6),
3087 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7),
3088 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_6_RD_PNTR_7_XOR_57_o
3089 
    );
3090 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_5_RD_PNTR_6_XOR_58_o_xo_0_1 : LUT2
3091 
    generic map(
3092 
      INIT => X"6"
3093 
    )
3094 
    port map (
3095 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5),
3096 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6),
3097 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_5_RD_PNTR_6_XOR_58_o
3098 
    );
3099 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_4_RD_PNTR_5_XOR_59_o_xo_0_1 : LUT2
3100 
    generic map(
3101 
      INIT => X"6"
3102 
    )
3103 
    port map (
3104 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4),
3105 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5),
3106 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_4_RD_PNTR_5_XOR_59_o
3107 
    );
3108 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_3_RD_PNTR_4_XOR_60_o_xo_0_1 : LUT2
3109 
    generic map(
3110 
      INIT => X"6"
3111 
    )
3112 
    port map (
3113 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3),
3114 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4),
3115 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_3_RD_PNTR_4_XOR_60_o
3116 
    );
3117 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_2_RD_PNTR_3_XOR_61_o_xo_0_1 : LUT2
3118 
    generic map(
3119 
      INIT => X"6"
3120 
    )
3121 
    port map (
3122 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2),
3123 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3),
3124 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_2_RD_PNTR_3_XOR_61_o
3125 
    );
3126 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_1_RD_PNTR_2_XOR_62_o_xo_0_1 : LUT2
3127 
    generic map(
3128 
      INIT => X"6"
3129 
    )
3130 
    port map (
3131 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1),
3132 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2),
3133 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_1_RD_PNTR_2_XOR_62_o
3134 
    );
3135 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_RD_PNTR_0_RD_PNTR_1_XOR_63_o_xo_0_1 : LUT2
3136 
    generic map(
3137 
      INIT => X"6"
3138 
    )
3139 
    port map (
3140 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3141 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1),
3142 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_RD_PNTR_0_RD_PNTR_1_XOR_63_o
3143 
    );
3144 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_191_xo_0_1 : LUT4
3145 
    generic map(
3146 
      INIT => X"6996"
3147 
    )
3148 
    port map (
3149 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6),
3150 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
3151 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
3152 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
3153 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_19_o
3154 
    );
3155 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_201_xo_0_1 : LUT5
3156 
    generic map(
3157 
      INIT => X"96696996"
3158 
    )
3159 
    port map (
3160 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5),
3161 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6),
3162 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
3163 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
3164 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
3165 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_20_o
3166 
    );
3167 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_211_xo_0_1 : LUT6
3168 
    generic map(
3169 
      INIT => X"6996966996696996"
3170 
    )
3171 
    port map (
3172 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(4),
3173 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5),
3174 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6),
3175 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
3176 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
3177 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
3178 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_21_o
3179 
    );
3180 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_61_xo_0_1 : LUT4
3181 
    generic map(
3182 
      INIT => X"6996"
3183 
    )
3184 
    port map (
3185 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6),
3186 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
3187 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
3188 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
3189 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_6_o
3190 
    );
3191 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_71_xo_0_1 : LUT5
3192 
    generic map(
3193 
      INIT => X"96696996"
3194 
    )
3195 
    port map (
3196 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5),
3197 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6),
3198 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
3199 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
3200 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
3201 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_7_o
3202 
    );
3203 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_81_xo_0_1 : LUT6
3204 
    generic map(
3205 
      INIT => X"6996966996696996"
3206 
    )
3207 
    port map (
3208 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(4),
3209 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5),
3210 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6),
3211 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
3212 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
3213 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
3214 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_8_o
3215 
    );
3216 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_251_xo_0_SW0 : LUT5
3217 
    generic map(
3218 
      INIT => X"69969669"
3219 
    )
3220 
    port map (
3221 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(0),
3222 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
3223 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
3224 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
3225 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6),
3226 
      O => N6
3227 
    );
3228 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_251_xo_0_Q : LUT6
3229 
    generic map(
3230 
      INIT => X"9669699669969669"
3231 
    )
3232 
    port map (
3233 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(3),
3234 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(2),
3235 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5),
3236 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(4),
3237 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(1),
3238 
      I5 => N6,
3239 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_25_o
3240 
    );
3241 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_121_xo_0_SW0 : LUT5
3242 
    generic map(
3243 
      INIT => X"69969669"
3244 
    )
3245 
    port map (
3246 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(0),
3247 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
3248 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
3249 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
3250 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6),
3251 
      O => N8
3252 
    );
3253 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_121_xo_0_Q : LUT6
3254 
    generic map(
3255 
      INIT => X"9669699669969669"
3256 
    )
3257 
    port map (
3258 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(3),
3259 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(2),
3260 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5),
3261 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(4),
3262 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(1),
3263 
      I5 => N8,
3264 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_12_o
3265 
    );
3266 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_221_xo_0_SW0 : LUT2
3267 
    generic map(
3268 
      INIT => X"6"
3269 
    )
3270 
    port map (
3271 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
3272 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6),
3273 
      O => N10
3274 
    );
3275 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_221_xo_0_Q : LUT6
3276 
    generic map(
3277 
      INIT => X"6996966996696996"
3278 
    )
3279 
    port map (
3280 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(3),
3281 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5),
3282 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(4),
3283 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
3284 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
3285 
      I5 => N10,
3286 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_22_o
3287 
    );
3288 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_231_xo_0_SW0 : LUT3
3289 
    generic map(
3290 
      INIT => X"69"
3291 
    )
3292 
    port map (
3293 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(8),
3294 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(7),
3295 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(6),
3296 
      O => N12
3297 
    );
3298 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_231_xo_0_Q : LUT6
3299 
    generic map(
3300 
      INIT => X"9669699669969669"
3301 
    )
3302 
    port map (
3303 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(3),
3304 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(2),
3305 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5),
3306 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(4),
3307 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(9),
3308 
      I5 => N12,
3309 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_23_o
3310 
    );
3311 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_241_xo_0_Q : LUT6
3312 
    generic map(
3313 
      INIT => X"6996966996696996"
3314 
    )
3315 
    port map (
3316 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(3),
3317 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(2),
3318 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(5),
3319 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(4),
3320 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last(1),
3321 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_19_o,
3322 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_gc_asreg_last_9_reduce_xor_24_o
3323 
    );
3324 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_91_xo_0_SW0 : LUT2
3325 
    generic map(
3326 
      INIT => X"6"
3327 
    )
3328 
    port map (
3329 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
3330 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6),
3331 
      O => N16
3332 
    );
3333 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_91_xo_0_Q : LUT6
3334 
    generic map(
3335 
      INIT => X"6996966996696996"
3336 
    )
3337 
    port map (
3338 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(3),
3339 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5),
3340 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(4),
3341 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
3342 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
3343 
      I5 => N16,
3344 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_9_o
3345 
    );
3346 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_101_xo_0_SW0 : LUT3
3347 
    generic map(
3348 
      INIT => X"69"
3349 
    )
3350 
    port map (
3351 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(8),
3352 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(7),
3353 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(6),
3354 
      O => N18
3355 
    );
3356 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_101_xo_0_Q : LUT6
3357 
    generic map(
3358 
      INIT => X"9669699669969669"
3359 
    )
3360 
    port map (
3361 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(3),
3362 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(2),
3363 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5),
3364 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(4),
3365 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(9),
3366 
      I5 => N18,
3367 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_10_o
3368 
    );
3369 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_111_xo_0_Q : LUT6
3370 
    generic map(
3371 
      INIT => X"6996966996696996"
3372 
    )
3373 
    port map (
3374 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(3),
3375 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(2),
3376 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(5),
3377 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(4),
3378 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last(1),
3379 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_6_o,
3380 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_gc_asreg_last_9_reduce_xor_11_o
3381 
    );
3382 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_rstpot : LUT3
3383 
    generic map(
3384 
      INIT => X"D8"
3385 
    )
3386 
    port map (
3387 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_d1_246,
3388 
      I1 => N1,
3389 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_244,
3390 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_rstpot_473
3391 
    );
3392 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg : FDP
3393 
    port map (
3394 
      C => wr_clk,
3395 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_rstpot_473,
3396 
      PRE => rst,
3397 
      Q => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_wr_rst_asreg_244
3398 
    );
3399 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i : FDP
3400 
    generic map(
3401 
      INIT => '1'
3402 
    )
3403 
    port map (
3404 
      C => rd_clk,
3405 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i_rstpot_474,
3406 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(2),
3407 
      Q => NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i
3408 
    );
3409 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i : FDP
3410 
    generic map(
3411 
      INIT => '1'
3412 
    )
3413 
    port map (
3414 
      C => wr_clk,
3415 
      D => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i_rstpot_475,
3416 
      PRE => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_grstd1_grst_full_rst_d2_101,
3417 
      Q => NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i
3418 
    );
3419 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1_0_1 : LUT4
3420 
    generic map(
3421 
      INIT => X"0990"
3422 
    )
3423 
    port map (
3424 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(1),
3425 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3426 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(0),
3427 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3428 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_c2_v1(0)
3429 
    );
3430 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1_0_1 : LUT4
3431 
    generic map(
3432 
      INIT => X"4182"
3433 
    )
3434 
    port map (
3435 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(0),
3436 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(1),
3437 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3438 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3439 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_c1_v1(0)
3440 
    );
3441 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT81 : LUT6
3442 
    generic map(
3443 
      INIT => X"CCCCCCCC6CCCCCCC"
3444 
    )
3445 
    port map (
3446 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
3447 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(7),
3448 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
3449 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
3450 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
3451 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41,
3452 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_7_Q
3453 
    );
3454 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT411 : LUT3
3455 
    generic map(
3456 
      INIT => X"F7"
3457 
    )
3458 
    port map (
3459 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3460 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
3461 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3462 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41
3463 
    );
3464 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_1_Q :
3465 
LUT2
3466 
    generic map(
3467 
      INIT => X"9"
3468 
    )
3469 
    port map (
3470 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3471 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(0),
3472 
      O =>
3473 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_1_Q_353
3474 
 
3475 
    );
3476 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_2_Q :
3477 
LUT2
3478 
    generic map(
3479 
      INIT => X"9"
3480 
    )
3481 
    port map (
3482 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(1),
3483 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1),
3484 
      O =>
3485 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_2_Q_301
3486 
 
3487 
    );
3488 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_2_Q :
3489 
LUT2
3490 
    generic map(
3491 
      INIT => X"9"
3492 
    )
3493 
    port map (
3494 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(1),
3495 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(1),
3496 
      O =>
3497 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_2_Q_351
3498 
 
3499 
    );
3500 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_3_Q :
3501 
LUT2
3502 
    generic map(
3503 
      INIT => X"9"
3504 
    )
3505 
    port map (
3506 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(2),
3507 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2),
3508 
      O =>
3509 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_3_Q_299
3510 
 
3511 
    );
3512 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_3_Q :
3513 
LUT2
3514 
    generic map(
3515 
      INIT => X"9"
3516 
    )
3517 
    port map (
3518 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(2),
3519 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(2),
3520 
      O =>
3521 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_3_Q_349
3522 
 
3523 
    );
3524 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_4_Q :
3525 
LUT2
3526 
    generic map(
3527 
      INIT => X"9"
3528 
    )
3529 
    port map (
3530 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(3),
3531 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3),
3532 
      O =>
3533 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_4_Q_297
3534 
 
3535 
    );
3536 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_4_Q :
3537 
LUT2
3538 
    generic map(
3539 
      INIT => X"9"
3540 
    )
3541 
    port map (
3542 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(3),
3543 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(3),
3544 
      O =>
3545 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_4_Q_347
3546 
 
3547 
    );
3548 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_5_Q :
3549 
LUT2
3550 
    generic map(
3551 
      INIT => X"9"
3552 
    )
3553 
    port map (
3554 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(4),
3555 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4),
3556 
      O =>
3557 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_5_Q_295
3558 
 
3559 
    );
3560 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_5_Q :
3561 
LUT2
3562 
    generic map(
3563 
      INIT => X"9"
3564 
    )
3565 
    port map (
3566 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(4),
3567 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(4),
3568 
      O =>
3569 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_5_Q_345
3570 
 
3571 
    );
3572 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_1_Q :
3573 
LUT2
3574 
    generic map(
3575 
      INIT => X"9"
3576 
    )
3577 
    port map (
3578 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(0),
3579 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3580 
      O =>
3581 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_1_Q_303
3582 
 
3583 
    );
3584 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad_0_1 : LUT2
3585 
    generic map(
3586 
      INIT => X"D"
3587 
    )
3588 
    port map (
3589 
      I0 => rd_en,
3590 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27,
3591 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_adjusted_wr_pntr_rd_pad(0)
3592 
    );
3593 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i_rstpot : LUT5
3594 
    generic map(
3595 
      INIT => X"54441000"
3596 
    )
3597 
    port map (
3598 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_RST_FULL_GEN_102,
3599 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_wsts_ram_full_fb_i_235,
3600 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad(10),
3601 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_diff_pntr_pad(9),
3602 
      I4 => NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i,
3603 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_prog_full_i_rstpot_475
3604 
    );
3605 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_6_Q :
3606 
LUT2
3607 
    generic map(
3608 
      INIT => X"9"
3609 
    )
3610 
    port map (
3611 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(5),
3612 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5),
3613 
      O =>
3614 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_6_Q_293
3615 
 
3616 
    );
3617 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_6_Q :
3618 
LUT2
3619 
    generic map(
3620 
      INIT => X"9"
3621 
    )
3622 
    port map (
3623 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(5),
3624 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(5),
3625 
      O =>
3626 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_6_Q_343
3627 
 
3628 
    );
3629 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_7_Q :
3630 
LUT2
3631 
    generic map(
3632 
      INIT => X"9"
3633 
    )
3634 
    port map (
3635 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(6),
3636 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6),
3637 
      O =>
3638 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_7_Q_291
3639 
 
3640 
    );
3641 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_7_Q :
3642 
LUT2
3643 
    generic map(
3644 
      INIT => X"9"
3645 
    )
3646 
    port map (
3647 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(6),
3648 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(6),
3649 
      O =>
3650 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_7_Q_341
3651 
 
3652 
    );
3653 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_8_Q :
3654 
LUT2
3655 
    generic map(
3656 
      INIT => X"9"
3657 
    )
3658 
    port map (
3659 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(7),
3660 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7),
3661 
      O =>
3662 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_8_Q_289
3663 
 
3664 
    );
3665 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_8_Q :
3666 
LUT2
3667 
    generic map(
3668 
      INIT => X"9"
3669 
    )
3670 
    port map (
3671 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(7),
3672 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(7),
3673 
      O =>
3674 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_8_Q_339
3675 
 
3676 
    );
3677 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_9_Q :
3678 
LUT2
3679 
    generic map(
3680 
      INIT => X"9"
3681 
    )
3682 
    port map (
3683 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(8),
3684 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8),
3685 
      O =>
3686 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_9_Q_287
3687 
 
3688 
    );
3689 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_9_Q :
3690 
LUT2
3691 
    generic map(
3692 
      INIT => X"9"
3693 
    )
3694 
    port map (
3695 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(8),
3696 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(8),
3697 
      O =>
3698 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_9_Q_337
3699 
 
3700 
    );
3701 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_10_Q :
3702 
LUT2
3703 
    generic map(
3704 
      INIT => X"9"
3705 
    )
3706 
    port map (
3707 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_wr_pntr_bin(9),
3708 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9),
3709 
      O =>
3710 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_Madd_adjusted_wr_pntr_rd_pad_10_rd_pntr_inv_pad_10_add_3_OUT_lut_10_Q_285
3711 
 
3712 
    );
3713 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_10_Q :
3714 
LUT2
3715 
    generic map(
3716 
      INIT => X"9"
3717 
    )
3718 
    port map (
3719 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(9),
3720 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_rd_pntr_bin(9),
3721 
      O =>
3722 
U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_gwas_gpf_wrpf_Madd_wr_pntr_plus1_pad_10_adjusted_rd_pntr_wr_inv_pad_10_add_3_OUT_lut_10_Q_335
3723 
 
3724 
    );
3725 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_0_WR_PNTR_1_XOR_9_o_xo_0_1 : LUT2
3726 
    generic map(
3727 
      INIT => X"6"
3728 
    )
3729 
    port map (
3730 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3731 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3732 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_0_WR_PNTR_1_XOR_9_o
3733 
    );
3734 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT61 : LUT6
3735 
    generic map(
3736 
      INIT => X"CCCCCCCC6CCCCCCC"
3737 
    )
3738 
    port map (
3739 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
3740 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
3741 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
3742 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3743 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
3744 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3745 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_5_Q
3746 
    );
3747 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT42 : LUT4
3748 
    generic map(
3749 
      INIT => X"AA6A"
3750 
    )
3751 
    port map (
3752 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
3753 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3754 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
3755 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3756 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_3_Q
3757 
    );
3758 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT51 : LUT5
3759 
    generic map(
3760 
      INIT => X"AAAA6AAA"
3761 
    )
3762 
    port map (
3763 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
3764 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
3765 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3766 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
3767 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3768 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_4_Q
3769 
    );
3770 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT21 : LUT2
3771 
    generic map(
3772 
      INIT => X"9"
3773 
    )
3774 
    port map (
3775 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3776 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3777 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_1_Q
3778 
    );
3779 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT31 : LUT3
3780 
    generic map(
3781 
      INIT => X"A6"
3782 
    )
3783 
    port map (
3784 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(2),
3785 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(1),
3786 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3787 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_2_Q
3788 
    );
3789 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_Mmux_gic0_gc0_count_9_GND_409_o_mux_2_OUT31 : LUT3
3790 
    generic map(
3791 
      INIT => X"A6"
3792 
    )
3793 
    port map (
3794 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3795 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3796 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3797 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_2_Q
3798 
    );
3799 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_Mmux_gic0_gc0_count_9_GND_409_o_mux_2_OUT21 : LUT2
3800 
    generic map(
3801 
      INIT => X"9"
3802 
    )
3803 
    port map (
3804 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3805 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3806 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_1_Q
3807 
    );
3808 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_Mxor_WR_PNTR_1_WR_PNTR_2_XOR_8_o_xo_0_1 : LUT2
3809 
    generic map(
3810 
      INIT => X"9"
3811 
    )
3812 
    port map (
3813 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3814 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(2),
3815 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gcx_clkx_WR_PNTR_1_WR_PNTR_2_XOR_8_o
3816 
    );
3817 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i_rstpot_SW1 : LUT5
3818 
    generic map(
3819 
      INIT => X"FFFFFFFE"
3820 
    )
3821 
    port map (
3822 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(5),
3823 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(6),
3824 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(7),
3825 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(8),
3826 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(9),
3827 
      O => N24
3828 
    );
3829 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i_rstpot : LUT6
3830 
    generic map(
3831 
      INIT => X"AAAAAAAB00000001"
3832 
    )
3833 
    port map (
3834 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_rsts_ram_empty_fb_i_27,
3835 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(10),
3836 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(3),
3837 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_diff_pntr_pad(4),
3838 
      I4 => N24,
3839 
      I5 => NlwRenamedSig_OI_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i,
3840 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_prog_empty_i_rstpot_474
3841 
    );
3842 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_11 : LUT3
3843 
    generic map(
3844 
      INIT => X"F7"
3845 
    )
3846 
    port map (
3847 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3848 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3849 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3850 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_bdd0
3851 
    );
3852 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_2 : LUT4
3853 
    generic map(
3854 
      INIT => X"AA6A"
3855 
    )
3856 
    port map (
3857 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
3858 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3859 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3860 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3861 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_3_Q
3862 
    );
3863 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_4_1 : LUT5
3864 
    generic map(
3865 
      INIT => X"AAAA6AAA"
3866 
    )
3867 
    port map (
3868 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
3869 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3870 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
3871 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3872 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3873 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_4_Q
3874 
    );
3875 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_5_1 : LUT6
3876 
    generic map(
3877 
      INIT => X"CCCCCCCC6CCCCCCC"
3878 
    )
3879 
    port map (
3880 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3881 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
3882 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
3883 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
3884 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3885 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3886 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_5_Q
3887 
    );
3888 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_9_SW1 : LUT5
3889 
    generic map(
3890 
      INIT => X"BFFFFFFF"
3891 
    )
3892 
    port map (
3893 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3894 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3895 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
3896 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
3897 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
3898 
      O => N26
3899 
    );
3900 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_9_Q : LUT6
3901 
    generic map(
3902 
      INIT => X"CCCCCCCC6CCCCCCC"
3903 
    )
3904 
    port map (
3905 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6),
3906 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(9),
3907 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(7),
3908 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(8),
3909 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3910 
      I5 => N26,
3911 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_9_Q_368
3912 
    );
3913 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_8_SW1 : LUT4
3914 
    generic map(
3915 
      INIT => X"0080"
3916 
    )
3917 
    port map (
3918 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(5),
3919 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(6),
3920 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(7),
3921 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3922 
      O => N28
3923 
    );
3924 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_8_Q : LUT6
3925 
    generic map(
3926 
      INIT => X"6AAAAAAAAAAAAAAA"
3927 
    )
3928 
    port map (
3929 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(8),
3930 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3931 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(2),
3932 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(3),
3933 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(4),
3934 
      I5 => N28,
3935 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_9_GND_409_o_mux_2_OUT_8_Q_367
3936 
    );
3937 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT91_F : LUT6
3938 
    generic map(
3939 
      INIT => X"6AAAAAAAAAAAAAAA"
3940 
    )
3941 
    port map (
3942 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(8),
3943 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(6),
3944 
      I2 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(3),
3945 
      I3 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(4),
3946 
      I4 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(5),
3947 
      I5 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(7),
3948 
      O => N30
3949 
    );
3950 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_rd_pntr_inv_pad_10_1_0_1_INV_0 : INV
3951 
    port map (
3952 
      I => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
3953 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_gras_gpe_rdpe_rd_pntr_inv_pad(1)
3954 
    );
3955 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus1_0_inv1_INV_0 : INV
3956 
    port map (
3957 
      I => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d1(0),
3958 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus1_0_inv
3959 
    );
3960 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus2_1_inv1_INV_0 : INV
3961 
    port map (
3962 
      I => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count(1),
3963 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus2_1_inv
3964 
    );
3965 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT911 : LUT3
3966 
    generic map(
3967 
      INIT => X"D8"
3968 
    )
3969 
    port map (
3970 
      I0 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_Mmux_gc0_count_9_GND_396_o_mux_2_OUT41,
3971 
      I1 => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count(8),
3972 
      I2 => N30,
3973 
      O => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_9_GND_396_o_mux_2_OUT_8_Q
3974 
    );
3975 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram :
3976 
RAMB36E1
3977 
    generic map(
3978 
      DOA_REG => 0,
3979 
      DOB_REG => 0,
3980 
      EN_ECC_READ => FALSE,
3981 
      EN_ECC_WRITE => FALSE,
3982 
      INITP_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
3983 
      INITP_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
3984 
      INITP_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
3985 
      INITP_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
3986 
      INITP_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
3987 
      INITP_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
3988 
      INITP_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
3989 
      INITP_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
3990 
      INITP_08 => X"0000000000000000000000000000000000000000000000000000000000000000",
3991 
      INITP_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
3992 
      INITP_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
3993 
      INITP_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
3994 
      INITP_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
3995 
      INITP_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
3996 
      INITP_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
3997 
      INITP_0F => X"0000000000000000000000000000000000000000000000000000000000000000",
3998 
      INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
3999 
      INIT_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
4000 
      INIT_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
4001 
      INIT_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
4002 
      INIT_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
4003 
      INIT_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
4004 
      INIT_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
4005 
      INIT_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
4006 
      INIT_08 => X"0000000000000000000000000000000000000000000000000000000000000000",
4007 
      INIT_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
4008 
      INIT_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
4009 
      INIT_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
4010 
      INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
4011 
      INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
4012 
      INIT_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
4013 
      INIT_0F => X"0000000000000000000000000000000000000000000000000000000000000000",
4014 
      INIT_10 => X"0000000000000000000000000000000000000000000000000000000000000000",
4015 
      INIT_11 => X"0000000000000000000000000000000000000000000000000000000000000000",
4016 
      INIT_12 => X"0000000000000000000000000000000000000000000000000000000000000000",
4017 
      INIT_13 => X"0000000000000000000000000000000000000000000000000000000000000000",
4018 
      INIT_14 => X"0000000000000000000000000000000000000000000000000000000000000000",
4019 
      INIT_15 => X"0000000000000000000000000000000000000000000000000000000000000000",
4020 
      INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000",
4021 
      INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000",
4022 
      INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000",
4023 
      INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000",
4024 
      INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000",
4025 
      INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000",
4026 
      INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000",
4027 
      INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000",
4028 
      INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000",
4029 
      INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000",
4030 
      INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000",
4031 
      INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000",
4032 
      INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000",
4033 
      INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000",
4034 
      INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000",
4035 
      INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000",
4036 
      INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000",
4037 
      INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000",
4038 
      INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000",
4039 
      INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000",
4040 
      INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000",
4041 
      INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000",
4042 
      INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000",
4043 
      INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000",
4044 
      INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000",
4045 
      INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000",
4046 
      INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
4047 
      INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
4048 
      INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
4049 
      INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
4050 
      INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
4051 
      INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
4052 
      INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
4053 
      INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
4054 
      INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
4055 
      INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
4056 
      INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
4057 
      INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
4058 
      INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
4059 
      INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
4060 
      INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
4061 
      INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000",
4062 
      INIT_40 => X"0000000000000000000000000000000000000000000000000000000000000000",
4063 
      INIT_41 => X"0000000000000000000000000000000000000000000000000000000000000000",
4064 
      INIT_42 => X"0000000000000000000000000000000000000000000000000000000000000000",
4065 
      INIT_43 => X"0000000000000000000000000000000000000000000000000000000000000000",
4066 
      INIT_44 => X"0000000000000000000000000000000000000000000000000000000000000000",
4067 
      INIT_45 => X"0000000000000000000000000000000000000000000000000000000000000000",
4068 
      INIT_46 => X"0000000000000000000000000000000000000000000000000000000000000000",
4069 
      INIT_47 => X"0000000000000000000000000000000000000000000000000000000000000000",
4070 
      INIT_48 => X"0000000000000000000000000000000000000000000000000000000000000000",
4071 
      INIT_49 => X"0000000000000000000000000000000000000000000000000000000000000000",
4072 
      INIT_4A => X"0000000000000000000000000000000000000000000000000000000000000000",
4073 
      INIT_4B => X"0000000000000000000000000000000000000000000000000000000000000000",
4074 
      INIT_4C => X"0000000000000000000000000000000000000000000000000000000000000000",
4075 
      INIT_4D => X"0000000000000000000000000000000000000000000000000000000000000000",
4076 
      INIT_4E => X"0000000000000000000000000000000000000000000000000000000000000000",
4077 
      INIT_4F => X"0000000000000000000000000000000000000000000000000000000000000000",
4078 
      INIT_50 => X"0000000000000000000000000000000000000000000000000000000000000000",
4079 
      INIT_51 => X"0000000000000000000000000000000000000000000000000000000000000000",
4080 
      INIT_52 => X"0000000000000000000000000000000000000000000000000000000000000000",
4081 
      INIT_53 => X"0000000000000000000000000000000000000000000000000000000000000000",
4082 
      INIT_54 => X"0000000000000000000000000000000000000000000000000000000000000000",
4083 
      INIT_55 => X"0000000000000000000000000000000000000000000000000000000000000000",
4084 
      INIT_56 => X"0000000000000000000000000000000000000000000000000000000000000000",
4085 
      INIT_57 => X"0000000000000000000000000000000000000000000000000000000000000000",
4086 
      INIT_58 => X"0000000000000000000000000000000000000000000000000000000000000000",
4087 
      INIT_59 => X"0000000000000000000000000000000000000000000000000000000000000000",
4088 
      INIT_5A => X"0000000000000000000000000000000000000000000000000000000000000000",
4089 
      INIT_5B => X"0000000000000000000000000000000000000000000000000000000000000000",
4090 
      INIT_5C => X"0000000000000000000000000000000000000000000000000000000000000000",
4091 
      INIT_5D => X"0000000000000000000000000000000000000000000000000000000000000000",
4092 
      INIT_5E => X"0000000000000000000000000000000000000000000000000000000000000000",
4093 
      INIT_5F => X"0000000000000000000000000000000000000000000000000000000000000000",
4094 
      INIT_60 => X"0000000000000000000000000000000000000000000000000000000000000000",
4095 
      INIT_61 => X"0000000000000000000000000000000000000000000000000000000000000000",
4096 
      INIT_62 => X"0000000000000000000000000000000000000000000000000000000000000000",
4097 
      INIT_63 => X"0000000000000000000000000000000000000000000000000000000000000000",
4098 
      INIT_64 => X"0000000000000000000000000000000000000000000000000000000000000000",
4099 
      INIT_65 => X"0000000000000000000000000000000000000000000000000000000000000000",
4100 
      INIT_66 => X"0000000000000000000000000000000000000000000000000000000000000000",
4101 
      INIT_67 => X"0000000000000000000000000000000000000000000000000000000000000000",
4102 
      INIT_68 => X"0000000000000000000000000000000000000000000000000000000000000000",
4103 
      INIT_69 => X"0000000000000000000000000000000000000000000000000000000000000000",
4104 
      INIT_6A => X"0000000000000000000000000000000000000000000000000000000000000000",
4105 
      INIT_6B => X"0000000000000000000000000000000000000000000000000000000000000000",
4106 
      INIT_6C => X"0000000000000000000000000000000000000000000000000000000000000000",
4107 
      INIT_6D => X"0000000000000000000000000000000000000000000000000000000000000000",
4108 
      INIT_6E => X"0000000000000000000000000000000000000000000000000000000000000000",
4109 
      INIT_6F => X"0000000000000000000000000000000000000000000000000000000000000000",
4110 
      INIT_70 => X"0000000000000000000000000000000000000000000000000000000000000000",
4111 
      INIT_71 => X"0000000000000000000000000000000000000000000000000000000000000000",
4112 
      INIT_72 => X"0000000000000000000000000000000000000000000000000000000000000000",
4113 
      INIT_73 => X"0000000000000000000000000000000000000000000000000000000000000000",
4114 
      INIT_74 => X"0000000000000000000000000000000000000000000000000000000000000000",
4115 
      INIT_75 => X"0000000000000000000000000000000000000000000000000000000000000000",
4116 
      INIT_76 => X"0000000000000000000000000000000000000000000000000000000000000000",
4117 
      INIT_77 => X"0000000000000000000000000000000000000000000000000000000000000000",
4118 
      INIT_78 => X"0000000000000000000000000000000000000000000000000000000000000000",
4119 
      INIT_79 => X"0000000000000000000000000000000000000000000000000000000000000000",
4120 
      INIT_7A => X"0000000000000000000000000000000000000000000000000000000000000000",
4121 
      INIT_7B => X"0000000000000000000000000000000000000000000000000000000000000000",
4122 
      INIT_7C => X"0000000000000000000000000000000000000000000000000000000000000000",
4123 
      INIT_7D => X"0000000000000000000000000000000000000000000000000000000000000000",
4124 
      INIT_7E => X"0000000000000000000000000000000000000000000000000000000000000000",
4125 
      INIT_7F => X"0000000000000000000000000000000000000000000000000000000000000000",
4126 
      INIT_A => X"000000000",
4127 
      INIT_B => X"000000000",
4128 
      INIT_FILE => "NONE",
4129 
      RAM_EXTENSION_A => "NONE",
4130 
      RAM_EXTENSION_B => "NONE",
4131 
      RAM_MODE => "TDP",
4132 
      RDADDR_COLLISION_HWCONFIG => "DELAYED_WRITE",
4133 
      READ_WIDTH_A => 36,
4134 
      READ_WIDTH_B => 36,
4135 
      RSTREG_PRIORITY_A => "REGCE",
4136 
      RSTREG_PRIORITY_B => "REGCE",
4137 
      SIM_COLLISION_CHECK => "ALL",
4138 
      SIM_DEVICE => "VIRTEX6",
4139 
      SRVAL_A => X"000000000",
4140 
      SRVAL_B => X"000000000",
4141 
      WRITE_MODE_A => "WRITE_FIRST",
4142 
      WRITE_MODE_B => "WRITE_FIRST",
4143 
      WRITE_WIDTH_A => 36,
4144 
      WRITE_WIDTH_B => 36
4145 
    )
4146 
    port map (
4147 
      CASCADEINA => N1,
4148 
      CASCADEINB => N1,
4149 
      CASCADEOUTA =>
4150 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTA_UNCONNECTED
4151 
,
4152 
      CASCADEOUTB =>
4153 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTB_UNCONNECTED
4154 
,
4155 
      CLKARDCLK => wr_clk,
4156 
      CLKBWRCLK => rd_clk,
4157 
      DBITERR =>
4158 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DBITERR_UNCONNECTED
4159 
,
4160 
      ENARDEN => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4161 
      ENBWREN => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_tmp_ram_rd_en,
4162 
      INJECTDBITERR => N1,
4163 
      INJECTSBITERR => N1,
4164 
      REGCEAREGCE => N1,
4165 
      REGCEB => N1,
4166 
      RSTRAMARSTRAM => N1,
4167 
      RSTRAMB => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(0),
4168 
      RSTREGARSTREG => N1,
4169 
      RSTREGB => N1,
4170 
      SBITERR =>
4171 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_SBITERR_UNCONNECTED
4172 
,
4173 
      ADDRARDADDR(15) => N0,
4174 
      ADDRARDADDR(14) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(9),
4175 
      ADDRARDADDR(13) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(8),
4176 
      ADDRARDADDR(12) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(7),
4177 
      ADDRARDADDR(11) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(6),
4178 
      ADDRARDADDR(10) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(5),
4179 
      ADDRARDADDR(9) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(4),
4180 
      ADDRARDADDR(8) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(3),
4181 
      ADDRARDADDR(7) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(2),
4182 
      ADDRARDADDR(6) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus2_1_inv,
4183 
      ADDRARDADDR(5) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus1_0_inv,
4184 
      ADDRARDADDR(4) => N1,
4185 
      ADDRARDADDR(3) => N1,
4186 
      ADDRARDADDR(2) => N1,
4187 
      ADDRARDADDR(1) => N1,
4188 
      ADDRARDADDR(0) => N1,
4189 
      ADDRBWRADDR(15) => N0,
4190 
      ADDRBWRADDR(14) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9),
4191 
      ADDRBWRADDR(13) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8),
4192 
      ADDRBWRADDR(12) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7),
4193 
      ADDRBWRADDR(11) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6),
4194 
      ADDRBWRADDR(10) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5),
4195 
      ADDRBWRADDR(9) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4),
4196 
      ADDRBWRADDR(8) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3),
4197 
      ADDRBWRADDR(7) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2),
4198 
      ADDRBWRADDR(6) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1),
4199 
      ADDRBWRADDR(5) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
4200 
      ADDRBWRADDR(4) => N1,
4201 
      ADDRBWRADDR(3) => N1,
4202 
      ADDRBWRADDR(2) => N1,
4203 
      ADDRBWRADDR(1) => N1,
4204 
      ADDRBWRADDR(0) => N1,
4205 
      DIADI(31) => din(34),
4206 
      DIADI(30) => din(33),
4207 
      DIADI(29) => din(32),
4208 
      DIADI(28) => din(31),
4209 
      DIADI(27) => din(30),
4210 
      DIADI(26) => din(29),
4211 
      DIADI(25) => din(28),
4212 
      DIADI(24) => din(27),
4213 
      DIADI(23) => din(25),
4214 
      DIADI(22) => din(24),
4215 
      DIADI(21) => din(23),
4216 
      DIADI(20) => din(22),
4217 
      DIADI(19) => din(21),
4218 
      DIADI(18) => din(20),
4219 
      DIADI(17) => din(19),
4220 
      DIADI(16) => din(18),
4221 
      DIADI(15) => din(16),
4222 
      DIADI(14) => din(15),
4223 
      DIADI(13) => din(14),
4224 
      DIADI(12) => din(13),
4225 
      DIADI(11) => din(12),
4226 
      DIADI(10) => din(11),
4227 
      DIADI(9) => din(10),
4228 
      DIADI(8) => din(9),
4229 
      DIADI(7) => din(7),
4230 
      DIADI(6) => din(6),
4231 
      DIADI(5) => din(5),
4232 
      DIADI(4) => din(4),
4233 
      DIADI(3) => din(3),
4234 
      DIADI(2) => din(2),
4235 
      DIADI(1) => din(1),
4236 
      DIADI(0) => din(0),
4237 
      DIBDI(31) => N1,
4238 
      DIBDI(30) => N1,
4239 
      DIBDI(29) => N1,
4240 
      DIBDI(28) => N1,
4241 
      DIBDI(27) => N1,
4242 
      DIBDI(26) => N1,
4243 
      DIBDI(25) => N1,
4244 
      DIBDI(24) => N1,
4245 
      DIBDI(23) => N1,
4246 
      DIBDI(22) => N1,
4247 
      DIBDI(21) => N1,
4248 
      DIBDI(20) => N1,
4249 
      DIBDI(19) => N1,
4250 
      DIBDI(18) => N1,
4251 
      DIBDI(17) => N1,
4252 
      DIBDI(16) => N1,
4253 
      DIBDI(15) => N1,
4254 
      DIBDI(14) => N1,
4255 
      DIBDI(13) => N1,
4256 
      DIBDI(12) => N1,
4257 
      DIBDI(11) => N1,
4258 
      DIBDI(10) => N1,
4259 
      DIBDI(9) => N1,
4260 
      DIBDI(8) => N1,
4261 
      DIBDI(7) => N1,
4262 
      DIBDI(6) => N1,
4263 
      DIBDI(5) => N1,
4264 
      DIBDI(4) => N1,
4265 
      DIBDI(3) => N1,
4266 
      DIBDI(2) => N1,
4267 
      DIBDI(1) => N1,
4268 
      DIBDI(0) => N1,
4269 
      DIPADIP(3) => din(35),
4270 
      DIPADIP(2) => din(26),
4271 
      DIPADIP(1) => din(17),
4272 
      DIPADIP(0) => din(8),
4273 
      DIPBDIP(3) => N1,
4274 
      DIPBDIP(2) => N1,
4275 
      DIPBDIP(1) => N1,
4276 
      DIPBDIP(0) => N1,
4277 
      DOADO(31) =>
4278 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_31_UNCONNECTED
4279 
,
4280 
      DOADO(30) =>
4281 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_30_UNCONNECTED
4282 
,
4283 
      DOADO(29) =>
4284 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_29_UNCONNECTED
4285 
,
4286 
      DOADO(28) =>
4287 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_28_UNCONNECTED
4288 
,
4289 
      DOADO(27) =>
4290 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_27_UNCONNECTED
4291 
,
4292 
      DOADO(26) =>
4293 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_26_UNCONNECTED
4294 
,
4295 
      DOADO(25) =>
4296 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_25_UNCONNECTED
4297 
,
4298 
      DOADO(24) =>
4299 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_24_UNCONNECTED
4300 
,
4301 
      DOADO(23) =>
4302 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_23_UNCONNECTED
4303 
,
4304 
      DOADO(22) =>
4305 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_22_UNCONNECTED
4306 
,
4307 
      DOADO(21) =>
4308 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_21_UNCONNECTED
4309 
,
4310 
      DOADO(20) =>
4311 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_20_UNCONNECTED
4312 
,
4313 
      DOADO(19) =>
4314 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_19_UNCONNECTED
4315 
,
4316 
      DOADO(18) =>
4317 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_18_UNCONNECTED
4318 
,
4319 
      DOADO(17) =>
4320 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_17_UNCONNECTED
4321 
,
4322 
      DOADO(16) =>
4323 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_16_UNCONNECTED
4324 
,
4325 
      DOADO(15) =>
4326 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_15_UNCONNECTED
4327 
,
4328 
      DOADO(14) =>
4329 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_14_UNCONNECTED
4330 
,
4331 
      DOADO(13) =>
4332 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_13_UNCONNECTED
4333 
,
4334 
      DOADO(12) =>
4335 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_12_UNCONNECTED
4336 
,
4337 
      DOADO(11) =>
4338 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_11_UNCONNECTED
4339 
,
4340 
      DOADO(10) =>
4341 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_10_UNCONNECTED
4342 
,
4343 
      DOADO(9) =>
4344 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_9_UNCONNECTED
4345 
,
4346 
      DOADO(8) =>
4347 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_8_UNCONNECTED
4348 
,
4349 
      DOADO(7) =>
4350 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_7_UNCONNECTED
4351 
,
4352 
      DOADO(6) =>
4353 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_6_UNCONNECTED
4354 
,
4355 
      DOADO(5) =>
4356 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_5_UNCONNECTED
4357 
,
4358 
      DOADO(4) =>
4359 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_4_UNCONNECTED
4360 
,
4361 
      DOADO(3) =>
4362 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_3_UNCONNECTED
4363 
,
4364 
      DOADO(2) =>
4365 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_2_UNCONNECTED
4366 
,
4367 
      DOADO(1) =>
4368 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_1_UNCONNECTED
4369 
,
4370 
      DOADO(0) =>
4371 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_0_UNCONNECTED
4372 
,
4373 
      DOBDO(31) => dout(34),
4374 
      DOBDO(30) => dout(33),
4375 
      DOBDO(29) => dout(32),
4376 
      DOBDO(28) => dout(31),
4377 
      DOBDO(27) => dout(30),
4378 
      DOBDO(26) => dout(29),
4379 
      DOBDO(25) => dout(28),
4380 
      DOBDO(24) => dout(27),
4381 
      DOBDO(23) => dout(25),
4382 
      DOBDO(22) => dout(24),
4383 
      DOBDO(21) => dout(23),
4384 
      DOBDO(20) => dout(22),
4385 
      DOBDO(19) => dout(21),
4386 
      DOBDO(18) => dout(20),
4387 
      DOBDO(17) => dout(19),
4388 
      DOBDO(16) => dout(18),
4389 
      DOBDO(15) => dout(16),
4390 
      DOBDO(14) => dout(15),
4391 
      DOBDO(13) => dout(14),
4392 
      DOBDO(12) => dout(13),
4393 
      DOBDO(11) => dout(12),
4394 
      DOBDO(10) => dout(11),
4395 
      DOBDO(9) => dout(10),
4396 
      DOBDO(8) => dout(9),
4397 
      DOBDO(7) => dout(7),
4398 
      DOBDO(6) => dout(6),
4399 
      DOBDO(5) => dout(5),
4400 
      DOBDO(4) => dout(4),
4401 
      DOBDO(3) => dout(3),
4402 
      DOBDO(2) => dout(2),
4403 
      DOBDO(1) => dout(1),
4404 
      DOBDO(0) => dout(0),
4405 
      DOPADOP(3) =>
4406 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_3_UNCONNECTED
4407 
,
4408 
      DOPADOP(2) =>
4409 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_2_UNCONNECTED
4410 
,
4411 
      DOPADOP(1) =>
4412 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_1_UNCONNECTED
4413 
,
4414 
      DOPADOP(0) =>
4415 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_0_UNCONNECTED
4416 
,
4417 
      DOPBDOP(3) => dout(35),
4418 
      DOPBDOP(2) => dout(26),
4419 
      DOPBDOP(1) => dout(17),
4420 
      DOPBDOP(0) => dout(8),
4421 
      ECCPARITY(7) =>
4422 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_7_UNCONNECTED
4423 
,
4424 
      ECCPARITY(6) =>
4425 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_6_UNCONNECTED
4426 
,
4427 
      ECCPARITY(5) =>
4428 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_5_UNCONNECTED
4429 
,
4430 
      ECCPARITY(4) =>
4431 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_4_UNCONNECTED
4432 
,
4433 
      ECCPARITY(3) =>
4434 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_3_UNCONNECTED
4435 
,
4436 
      ECCPARITY(2) =>
4437 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_2_UNCONNECTED
4438 
,
4439 
      ECCPARITY(1) =>
4440 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_1_UNCONNECTED
4441 
,
4442 
      ECCPARITY(0) =>
4443 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_0_UNCONNECTED
4444 
,
4445 
      RDADDRECC(8) =>
4446 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_8_UNCONNECTED
4447 
,
4448 
      RDADDRECC(7) =>
4449 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_7_UNCONNECTED
4450 
,
4451 
      RDADDRECC(6) =>
4452 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_6_UNCONNECTED
4453 
,
4454 
      RDADDRECC(5) =>
4455 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_5_UNCONNECTED
4456 
,
4457 
      RDADDRECC(4) =>
4458 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_4_UNCONNECTED
4459 
,
4460 
      RDADDRECC(3) =>
4461 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_3_UNCONNECTED
4462 
,
4463 
      RDADDRECC(2) =>
4464 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_2_UNCONNECTED
4465 
,
4466 
      RDADDRECC(1) =>
4467 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_1_UNCONNECTED
4468 
,
4469 
      RDADDRECC(0) =>
4470 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_0_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_0_UNCONNECTED
4471 
,
4472 
      WEA(3) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4473 
      WEA(2) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4474 
      WEA(1) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4475 
      WEA(0) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4476 
      WEBWE(7) => N1,
4477 
      WEBWE(6) => N1,
4478 
      WEBWE(5) => N1,
4479 
      WEBWE(4) => N1,
4480 
      WEBWE(3) => N1,
4481 
      WEBWE(2) => N1,
4482 
      WEBWE(1) => N1,
4483 
      WEBWE(0) => N1
4484 
    );
4485 
  U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram :
4486 
RAMB36E1
4487 
    generic map(
4488 
      DOA_REG => 0,
4489 
      DOB_REG => 0,
4490 
      EN_ECC_READ => FALSE,
4491 
      EN_ECC_WRITE => FALSE,
4492 
      INITP_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
4493 
      INITP_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
4494 
      INITP_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
4495 
      INITP_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
4496 
      INITP_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
4497 
      INITP_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
4498 
      INITP_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
4499 
      INITP_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
4500 
      INITP_08 => X"0000000000000000000000000000000000000000000000000000000000000000",
4501 
      INITP_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
4502 
      INITP_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
4503 
      INITP_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
4504 
      INITP_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
4505 
      INITP_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
4506 
      INITP_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
4507 
      INITP_0F => X"0000000000000000000000000000000000000000000000000000000000000000",
4508 
      INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
4509 
      INIT_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
4510 
      INIT_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
4511 
      INIT_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
4512 
      INIT_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
4513 
      INIT_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
4514 
      INIT_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
4515 
      INIT_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
4516 
      INIT_08 => X"0000000000000000000000000000000000000000000000000000000000000000",
4517 
      INIT_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
4518 
      INIT_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
4519 
      INIT_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
4520 
      INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
4521 
      INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
4522 
      INIT_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
4523 
      INIT_0F => X"0000000000000000000000000000000000000000000000000000000000000000",
4524 
      INIT_10 => X"0000000000000000000000000000000000000000000000000000000000000000",
4525 
      INIT_11 => X"0000000000000000000000000000000000000000000000000000000000000000",
4526 
      INIT_12 => X"0000000000000000000000000000000000000000000000000000000000000000",
4527 
      INIT_13 => X"0000000000000000000000000000000000000000000000000000000000000000",
4528 
      INIT_14 => X"0000000000000000000000000000000000000000000000000000000000000000",
4529 
      INIT_15 => X"0000000000000000000000000000000000000000000000000000000000000000",
4530 
      INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000",
4531 
      INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000",
4532 
      INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000",
4533 
      INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000",
4534 
      INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000",
4535 
      INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000",
4536 
      INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000",
4537 
      INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000",
4538 
      INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000",
4539 
      INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000",
4540 
      INIT_20 => X"0000000000000000000000000000000000000000000000000000000000000000",
4541 
      INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000",
4542 
      INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000",
4543 
      INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000",
4544 
      INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000",
4545 
      INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000",
4546 
      INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000",
4547 
      INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000",
4548 
      INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000",
4549 
      INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000",
4550 
      INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000",
4551 
      INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000",
4552 
      INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000",
4553 
      INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000",
4554 
      INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000",
4555 
      INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000",
4556 
      INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
4557 
      INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
4558 
      INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
4559 
      INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
4560 
      INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
4561 
      INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
4562 
      INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
4563 
      INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
4564 
      INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
4565 
      INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
4566 
      INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
4567 
      INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
4568 
      INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
4569 
      INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
4570 
      INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
4571 
      INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000",
4572 
      INIT_40 => X"0000000000000000000000000000000000000000000000000000000000000000",
4573 
      INIT_41 => X"0000000000000000000000000000000000000000000000000000000000000000",
4574 
      INIT_42 => X"0000000000000000000000000000000000000000000000000000000000000000",
4575 
      INIT_43 => X"0000000000000000000000000000000000000000000000000000000000000000",
4576 
      INIT_44 => X"0000000000000000000000000000000000000000000000000000000000000000",
4577 
      INIT_45 => X"0000000000000000000000000000000000000000000000000000000000000000",
4578 
      INIT_46 => X"0000000000000000000000000000000000000000000000000000000000000000",
4579 
      INIT_47 => X"0000000000000000000000000000000000000000000000000000000000000000",
4580 
      INIT_48 => X"0000000000000000000000000000000000000000000000000000000000000000",
4581 
      INIT_49 => X"0000000000000000000000000000000000000000000000000000000000000000",
4582 
      INIT_4A => X"0000000000000000000000000000000000000000000000000000000000000000",
4583 
      INIT_4B => X"0000000000000000000000000000000000000000000000000000000000000000",
4584 
      INIT_4C => X"0000000000000000000000000000000000000000000000000000000000000000",
4585 
      INIT_4D => X"0000000000000000000000000000000000000000000000000000000000000000",
4586 
      INIT_4E => X"0000000000000000000000000000000000000000000000000000000000000000",
4587 
      INIT_4F => X"0000000000000000000000000000000000000000000000000000000000000000",
4588 
      INIT_50 => X"0000000000000000000000000000000000000000000000000000000000000000",
4589 
      INIT_51 => X"0000000000000000000000000000000000000000000000000000000000000000",
4590 
      INIT_52 => X"0000000000000000000000000000000000000000000000000000000000000000",
4591 
      INIT_53 => X"0000000000000000000000000000000000000000000000000000000000000000",
4592 
      INIT_54 => X"0000000000000000000000000000000000000000000000000000000000000000",
4593 
      INIT_55 => X"0000000000000000000000000000000000000000000000000000000000000000",
4594 
      INIT_56 => X"0000000000000000000000000000000000000000000000000000000000000000",
4595 
      INIT_57 => X"0000000000000000000000000000000000000000000000000000000000000000",
4596 
      INIT_58 => X"0000000000000000000000000000000000000000000000000000000000000000",
4597 
      INIT_59 => X"0000000000000000000000000000000000000000000000000000000000000000",
4598 
      INIT_5A => X"0000000000000000000000000000000000000000000000000000000000000000",
4599 
      INIT_5B => X"0000000000000000000000000000000000000000000000000000000000000000",
4600 
      INIT_5C => X"0000000000000000000000000000000000000000000000000000000000000000",
4601 
      INIT_5D => X"0000000000000000000000000000000000000000000000000000000000000000",
4602 
      INIT_5E => X"0000000000000000000000000000000000000000000000000000000000000000",
4603 
      INIT_5F => X"0000000000000000000000000000000000000000000000000000000000000000",
4604 
      INIT_60 => X"0000000000000000000000000000000000000000000000000000000000000000",
4605 
      INIT_61 => X"0000000000000000000000000000000000000000000000000000000000000000",
4606 
      INIT_62 => X"0000000000000000000000000000000000000000000000000000000000000000",
4607 
      INIT_63 => X"0000000000000000000000000000000000000000000000000000000000000000",
4608 
      INIT_64 => X"0000000000000000000000000000000000000000000000000000000000000000",
4609 
      INIT_65 => X"0000000000000000000000000000000000000000000000000000000000000000",
4610 
      INIT_66 => X"0000000000000000000000000000000000000000000000000000000000000000",
4611 
      INIT_67 => X"0000000000000000000000000000000000000000000000000000000000000000",
4612 
      INIT_68 => X"0000000000000000000000000000000000000000000000000000000000000000",
4613 
      INIT_69 => X"0000000000000000000000000000000000000000000000000000000000000000",
4614 
      INIT_6A => X"0000000000000000000000000000000000000000000000000000000000000000",
4615 
      INIT_6B => X"0000000000000000000000000000000000000000000000000000000000000000",
4616 
      INIT_6C => X"0000000000000000000000000000000000000000000000000000000000000000",
4617 
      INIT_6D => X"0000000000000000000000000000000000000000000000000000000000000000",
4618 
      INIT_6E => X"0000000000000000000000000000000000000000000000000000000000000000",
4619 
      INIT_6F => X"0000000000000000000000000000000000000000000000000000000000000000",
4620 
      INIT_70 => X"0000000000000000000000000000000000000000000000000000000000000000",
4621 
      INIT_71 => X"0000000000000000000000000000000000000000000000000000000000000000",
4622 
      INIT_72 => X"0000000000000000000000000000000000000000000000000000000000000000",
4623 
      INIT_73 => X"0000000000000000000000000000000000000000000000000000000000000000",
4624 
      INIT_74 => X"0000000000000000000000000000000000000000000000000000000000000000",
4625 
      INIT_75 => X"0000000000000000000000000000000000000000000000000000000000000000",
4626 
      INIT_76 => X"0000000000000000000000000000000000000000000000000000000000000000",
4627 
      INIT_77 => X"0000000000000000000000000000000000000000000000000000000000000000",
4628 
      INIT_78 => X"0000000000000000000000000000000000000000000000000000000000000000",
4629 
      INIT_79 => X"0000000000000000000000000000000000000000000000000000000000000000",
4630 
      INIT_7A => X"0000000000000000000000000000000000000000000000000000000000000000",
4631 
      INIT_7B => X"0000000000000000000000000000000000000000000000000000000000000000",
4632 
      INIT_7C => X"0000000000000000000000000000000000000000000000000000000000000000",
4633 
      INIT_7D => X"0000000000000000000000000000000000000000000000000000000000000000",
4634 
      INIT_7E => X"0000000000000000000000000000000000000000000000000000000000000000",
4635 
      INIT_7F => X"0000000000000000000000000000000000000000000000000000000000000000",
4636 
      INIT_A => X"000000000",
4637 
      INIT_B => X"000000000",
4638 
      INIT_FILE => "NONE",
4639 
      RAM_EXTENSION_A => "NONE",
4640 
      RAM_EXTENSION_B => "NONE",
4641 
      RAM_MODE => "TDP",
4642 
      RDADDR_COLLISION_HWCONFIG => "DELAYED_WRITE",
4643 
      READ_WIDTH_A => 36,
4644 
      READ_WIDTH_B => 36,
4645 
      RSTREG_PRIORITY_A => "REGCE",
4646 
      RSTREG_PRIORITY_B => "REGCE",
4647 
      SIM_COLLISION_CHECK => "ALL",
4648 
      SIM_DEVICE => "VIRTEX6",
4649 
      SRVAL_A => X"000000000",
4650 
      SRVAL_B => X"000000000",
4651 
      WRITE_MODE_A => "WRITE_FIRST",
4652 
      WRITE_MODE_B => "WRITE_FIRST",
4653 
      WRITE_WIDTH_A => 36,
4654 
      WRITE_WIDTH_B => 36
4655 
    )
4656 
    port map (
4657 
      CASCADEINA => N1,
4658 
      CASCADEINB => N1,
4659 
      CASCADEOUTA =>
4660 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTA_UNCONNECTED
4661 
,
4662 
      CASCADEOUTB =>
4663 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_CASCADEOUTB_UNCONNECTED
4664 
,
4665 
      CLKARDCLK => wr_clk,
4666 
      CLKBWRCLK => rd_clk,
4667 
      DBITERR =>
4668 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DBITERR_UNCONNECTED
4669 
,
4670 
      ENARDEN => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4671 
      ENBWREN => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_tmp_ram_rd_en,
4672 
      INJECTDBITERR => N1,
4673 
      INJECTSBITERR => N1,
4674 
      REGCEAREGCE => N1,
4675 
      REGCEB => N1,
4676 
      RSTRAMARSTRAM => N1,
4677 
      RSTRAMB => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_rstblk_ngwrdrst_grst_rd_rst_reg(0),
4678 
      RSTREGARSTREG => N1,
4679 
      RSTREGB => N1,
4680 
      SBITERR =>
4681 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_SBITERR_UNCONNECTED
4682 
,
4683 
      ADDRARDADDR(15) => N0,
4684 
      ADDRARDADDR(14) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(9),
4685 
      ADDRARDADDR(13) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(8),
4686 
      ADDRARDADDR(12) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(7),
4687 
      ADDRARDADDR(11) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(6),
4688 
      ADDRARDADDR(10) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(5),
4689 
      ADDRARDADDR(9) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(4),
4690 
      ADDRARDADDR(8) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(3),
4691 
      ADDRARDADDR(7) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wpntr_gic0_gc0_count_d2(2),
4692 
      ADDRARDADDR(6) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus2_1_inv,
4693 
      ADDRARDADDR(5) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_wr_wr_pntr_plus1_0_inv,
4694 
      ADDRARDADDR(4) => N1,
4695 
      ADDRARDADDR(3) => N1,
4696 
      ADDRARDADDR(2) => N1,
4697 
      ADDRARDADDR(1) => N1,
4698 
      ADDRARDADDR(0) => N1,
4699 
      ADDRBWRADDR(15) => N0,
4700 
      ADDRBWRADDR(14) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(9),
4701 
      ADDRBWRADDR(13) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(8),
4702 
      ADDRBWRADDR(12) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(7),
4703 
      ADDRBWRADDR(11) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(6),
4704 
      ADDRBWRADDR(10) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(5),
4705 
      ADDRBWRADDR(9) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(4),
4706 
      ADDRBWRADDR(8) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(3),
4707 
      ADDRBWRADDR(7) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(2),
4708 
      ADDRBWRADDR(6) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(1),
4709 
      ADDRBWRADDR(5) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_gl0_rd_rpntr_gc0_count_d1(0),
4710 
      ADDRBWRADDR(4) => N1,
4711 
      ADDRBWRADDR(3) => N1,
4712 
      ADDRBWRADDR(2) => N1,
4713 
      ADDRBWRADDR(1) => N1,
4714 
      ADDRBWRADDR(0) => N1,
4715 
      DIADI(31) => din(70),
4716 
      DIADI(30) => din(69),
4717 
      DIADI(29) => din(68),
4718 
      DIADI(28) => din(67),
4719 
      DIADI(27) => din(66),
4720 
      DIADI(26) => din(65),
4721 
      DIADI(25) => din(64),
4722 
      DIADI(24) => din(63),
4723 
      DIADI(23) => din(61),
4724 
      DIADI(22) => din(60),
4725 
      DIADI(21) => din(59),
4726 
      DIADI(20) => din(58),
4727 
      DIADI(19) => din(57),
4728 
      DIADI(18) => din(56),
4729 
      DIADI(17) => din(55),
4730 
      DIADI(16) => din(54),
4731 
      DIADI(15) => din(52),
4732 
      DIADI(14) => din(51),
4733 
      DIADI(13) => din(50),
4734 
      DIADI(12) => din(49),
4735 
      DIADI(11) => din(48),
4736 
      DIADI(10) => din(47),
4737 
      DIADI(9) => din(46),
4738 
      DIADI(8) => din(45),
4739 
      DIADI(7) => din(43),
4740 
      DIADI(6) => din(42),
4741 
      DIADI(5) => din(41),
4742 
      DIADI(4) => din(40),
4743 
      DIADI(3) => din(39),
4744 
      DIADI(2) => din(38),
4745 
      DIADI(1) => din(37),
4746 
      DIADI(0) => din(36),
4747 
      DIBDI(31) => N1,
4748 
      DIBDI(30) => N1,
4749 
      DIBDI(29) => N1,
4750 
      DIBDI(28) => N1,
4751 
      DIBDI(27) => N1,
4752 
      DIBDI(26) => N1,
4753 
      DIBDI(25) => N1,
4754 
      DIBDI(24) => N1,
4755 
      DIBDI(23) => N1,
4756 
      DIBDI(22) => N1,
4757 
      DIBDI(21) => N1,
4758 
      DIBDI(20) => N1,
4759 
      DIBDI(19) => N1,
4760 
      DIBDI(18) => N1,
4761 
      DIBDI(17) => N1,
4762 
      DIBDI(16) => N1,
4763 
      DIBDI(15) => N1,
4764 
      DIBDI(14) => N1,
4765 
      DIBDI(13) => N1,
4766 
      DIBDI(12) => N1,
4767 
      DIBDI(11) => N1,
4768 
      DIBDI(10) => N1,
4769 
      DIBDI(9) => N1,
4770 
      DIBDI(8) => N1,
4771 
      DIBDI(7) => N1,
4772 
      DIBDI(6) => N1,
4773 
      DIBDI(5) => N1,
4774 
      DIBDI(4) => N1,
4775 
      DIBDI(3) => N1,
4776 
      DIBDI(2) => N1,
4777 
      DIBDI(1) => N1,
4778 
      DIBDI(0) => N1,
4779 
      DIPADIP(3) => din(71),
4780 
      DIPADIP(2) => din(62),
4781 
      DIPADIP(1) => din(53),
4782 
      DIPADIP(0) => din(44),
4783 
      DIPBDIP(3) => N1,
4784 
      DIPBDIP(2) => N1,
4785 
      DIPBDIP(1) => N1,
4786 
      DIPBDIP(0) => N1,
4787 
      DOADO(31) =>
4788 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_31_UNCONNECTED
4789 
,
4790 
      DOADO(30) =>
4791 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_30_UNCONNECTED
4792 
,
4793 
      DOADO(29) =>
4794 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_29_UNCONNECTED
4795 
,
4796 
      DOADO(28) =>
4797 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_28_UNCONNECTED
4798 
,
4799 
      DOADO(27) =>
4800 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_27_UNCONNECTED
4801 
,
4802 
      DOADO(26) =>
4803 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_26_UNCONNECTED
4804 
,
4805 
      DOADO(25) =>
4806 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_25_UNCONNECTED
4807 
,
4808 
      DOADO(24) =>
4809 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_24_UNCONNECTED
4810 
,
4811 
      DOADO(23) =>
4812 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_23_UNCONNECTED
4813 
,
4814 
      DOADO(22) =>
4815 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_22_UNCONNECTED
4816 
,
4817 
      DOADO(21) =>
4818 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_21_UNCONNECTED
4819 
,
4820 
      DOADO(20) =>
4821 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_20_UNCONNECTED
4822 
,
4823 
      DOADO(19) =>
4824 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_19_UNCONNECTED
4825 
,
4826 
      DOADO(18) =>
4827 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_18_UNCONNECTED
4828 
,
4829 
      DOADO(17) =>
4830 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_17_UNCONNECTED
4831 
,
4832 
      DOADO(16) =>
4833 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_16_UNCONNECTED
4834 
,
4835 
      DOADO(15) =>
4836 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_15_UNCONNECTED
4837 
,
4838 
      DOADO(14) =>
4839 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_14_UNCONNECTED
4840 
,
4841 
      DOADO(13) =>
4842 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_13_UNCONNECTED
4843 
,
4844 
      DOADO(12) =>
4845 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_12_UNCONNECTED
4846 
,
4847 
      DOADO(11) =>
4848 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_11_UNCONNECTED
4849 
,
4850 
      DOADO(10) =>
4851 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_10_UNCONNECTED
4852 
,
4853 
      DOADO(9) =>
4854 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_9_UNCONNECTED
4855 
,
4856 
      DOADO(8) =>
4857 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_8_UNCONNECTED
4858 
,
4859 
      DOADO(7) =>
4860 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_7_UNCONNECTED
4861 
,
4862 
      DOADO(6) =>
4863 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_6_UNCONNECTED
4864 
,
4865 
      DOADO(5) =>
4866 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_5_UNCONNECTED
4867 
,
4868 
      DOADO(4) =>
4869 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_4_UNCONNECTED
4870 
,
4871 
      DOADO(3) =>
4872 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_3_UNCONNECTED
4873 
,
4874 
      DOADO(2) =>
4875 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_2_UNCONNECTED
4876 
,
4877 
      DOADO(1) =>
4878 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_1_UNCONNECTED
4879 
,
4880 
      DOADO(0) =>
4881 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOADO_0_UNCONNECTED
4882 
,
4883 
      DOBDO(31) => dout(70),
4884 
      DOBDO(30) => dout(69),
4885 
      DOBDO(29) => dout(68),
4886 
      DOBDO(28) => dout(67),
4887 
      DOBDO(27) => dout(66),
4888 
      DOBDO(26) => dout(65),
4889 
      DOBDO(25) => dout(64),
4890 
      DOBDO(24) => dout(63),
4891 
      DOBDO(23) => dout(61),
4892 
      DOBDO(22) => dout(60),
4893 
      DOBDO(21) => dout(59),
4894 
      DOBDO(20) => dout(58),
4895 
      DOBDO(19) => dout(57),
4896 
      DOBDO(18) => dout(56),
4897 
      DOBDO(17) => dout(55),
4898 
      DOBDO(16) => dout(54),
4899 
      DOBDO(15) => dout(52),
4900 
      DOBDO(14) => dout(51),
4901 
      DOBDO(13) => dout(50),
4902 
      DOBDO(12) => dout(49),
4903 
      DOBDO(11) => dout(48),
4904 
      DOBDO(10) => dout(47),
4905 
      DOBDO(9) => dout(46),
4906 
      DOBDO(8) => dout(45),
4907 
      DOBDO(7) => dout(43),
4908 
      DOBDO(6) => dout(42),
4909 
      DOBDO(5) => dout(41),
4910 
      DOBDO(4) => dout(40),
4911 
      DOBDO(3) => dout(39),
4912 
      DOBDO(2) => dout(38),
4913 
      DOBDO(1) => dout(37),
4914 
      DOBDO(0) => dout(36),
4915 
      DOPADOP(3) =>
4916 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_3_UNCONNECTED
4917 
,
4918 
      DOPADOP(2) =>
4919 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_2_UNCONNECTED
4920 
,
4921 
      DOPADOP(1) =>
4922 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_1_UNCONNECTED
4923 
,
4924 
      DOPADOP(0) =>
4925 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_DOPADOP_0_UNCONNECTED
4926 
,
4927 
      DOPBDOP(3) => dout(71),
4928 
      DOPBDOP(2) => dout(62),
4929 
      DOPBDOP(1) => dout(53),
4930 
      DOPBDOP(0) => dout(44),
4931 
      ECCPARITY(7) =>
4932 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_7_UNCONNECTED
4933 
,
4934 
      ECCPARITY(6) =>
4935 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_6_UNCONNECTED
4936 
,
4937 
      ECCPARITY(5) =>
4938 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_5_UNCONNECTED
4939 
,
4940 
      ECCPARITY(4) =>
4941 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_4_UNCONNECTED
4942 
,
4943 
      ECCPARITY(3) =>
4944 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_3_UNCONNECTED
4945 
,
4946 
      ECCPARITY(2) =>
4947 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_2_UNCONNECTED
4948 
,
4949 
      ECCPARITY(1) =>
4950 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_1_UNCONNECTED
4951 
,
4952 
      ECCPARITY(0) =>
4953 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_ECCPARITY_0_UNCONNECTED
4954 
,
4955 
      RDADDRECC(8) =>
4956 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_8_UNCONNECTED
4957 
,
4958 
      RDADDRECC(7) =>
4959 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_7_UNCONNECTED
4960 
,
4961 
      RDADDRECC(6) =>
4962 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_6_UNCONNECTED
4963 
,
4964 
      RDADDRECC(5) =>
4965 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_5_UNCONNECTED
4966 
,
4967 
      RDADDRECC(4) =>
4968 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_4_UNCONNECTED
4969 
,
4970 
      RDADDRECC(3) =>
4971 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_3_UNCONNECTED
4972 
,
4973 
      RDADDRECC(2) =>
4974 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_2_UNCONNECTED
4975 
,
4976 
      RDADDRECC(1) =>
4977 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_1_UNCONNECTED
4978 
,
4979 
      RDADDRECC(0) =>
4980 
NLW_U0_xst_fifo_generator_gconvfifo_rf_grf_rf_gntv_or_sync_fifo_mem_gbm_gbmg_gbmga_ngecc_bmg_gnativebmg_native_blk_mem_gen_valid_cstr_ramloop_1_ram_r_v6_noinit_ram_SDP_SIMPLE_PRIM36_ram_RDADDRECC_0_UNCONNECTED
4981 
,
4982 
      WEA(3) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4983 
      WEA(2) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4984 
      WEA(1) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4985 
      WEA(0) => U0_xst_fifo_generator_gconvfifo_rf_grf_rf_ram_wr_en,
4986 
      WEBWE(7) => N1,
4987 
      WEBWE(6) => N1,
4988 
      WEBWE(5) => N1,
4989 
      WEBWE(4) => N1,
4990 
      WEBWE(3) => N1,
4991 
      WEBWE(2) => N1,
4992 
      WEBWE(1) => N1,
4993 
      WEBWE(0) => N1
4994 
    );
4995 
 
4996 
end STRUCTURE;
4997 
 
4998 
-- synthesis translate_on

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