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[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [ipcore_dir_ISE13.3/] [v6_pcie_v1_7_x4/] [simulation/] [tests/] [tests.vhd] - Blame information for rev 13

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1 13 barabba
-------------------------------------------------------------------------------
2
--
3
-- (c) Copyright 2009-2011 Xilinx, Inc. All rights reserved.
4
--
5
-- This file contains confidential and proprietary information
6
-- of Xilinx, Inc. and is protected under U.S. and
7
-- international copyright and other intellectual property
8
-- laws.
9
--
10
-- DISCLAIMER
11
-- This disclaimer is not a license and does not grant any
12
-- rights to the materials distributed herewith. Except as
13
-- otherwise provided in a valid license issued to you by
14
-- Xilinx, and to the maximum extent permitted by applicable
15
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
16
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
17
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
18
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
19
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
20
-- (2) Xilinx shall not be liable (whether in contract or tort,
21
-- including negligence, or under any other theory of
22
-- liability) for any loss or damage of any kind or nature
23
-- related to, arising under or in connection with these
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-- materials, including for any direct, or any indirect,
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-- special, incidental, or consequential loss or damage
26
-- (including loss of data, profits, goodwill, or any type of
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-- loss or damage suffered as a result of any action brought
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-- by a third party) even if such damage or loss was
29
-- reasonably foreseeable or Xilinx had been advised of the
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-- possibility of the same.
31
--
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-- CRITICAL APPLICATIONS
33
-- Xilinx products are not designed or intended to be fail-
34
-- safe, or for use in any application requiring fail-safe
35
-- performance, such as life-support or safety devices or
36
-- systems, Class III medical devices, nuclear facilities,
37
-- applications related to the deployment of airbags, or any
38
-- other applications that could lead to death, personal
39
-- injury, or severe property or environmental damage
40
-- (individually and collectively, "Critical
41
-- Applications"). Customer assumes the sole risk and
42
-- liability of any use of Xilinx products in Critical
43
-- Applications, subject only to applicable laws and
44
-- regulations governing limitations on product liability.
45
--
46
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
47
-- PART OF THIS FILE AT ALL TIMES.
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--
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-------------------------------------------------------------------------------
50
-- Project    : Virtex-6 Integrated Block for PCI Express
51
-- File       : tests.vhd
52
-- Version    : 1.7
53
---- Description:  Test program file.
54
----
55
----
56
--------------------------------------------------------------------------------
57
 
58
library ieee;
59
use ieee.std_logic_1164.all;
60
use ieee.std_logic_arith.all;
61
use ieee.std_logic_textio.all;
62
use ieee.numeric_std.all;
63
 
64
library std;
65
use std.textio.all;
66
use work.test_interface.all;
67
 
68
 
69
entity tests is
70
generic (
71
  test_selector : in string  := String'("sample_smoke_test0")
72
 );
73
port (
74
 
75
  trn_td                   : out std_logic_vector ((64 - 1) downto 0 );
76
  trn_trem_n               : out std_logic_vector ((8 - 1) downto 0 );
77
  trn_tsof_n               : out std_logic;
78
  trn_teof_n               : out std_logic;
79
  trn_terrfwd_n            : out std_logic;
80
  trn_tsrc_rdy_n           : out std_logic;
81
  trn_tsrc_dsc_n           : out std_logic;
82
  trn_clk                  : in std_logic;
83
  trn_reset_n              : in std_logic;
84
  trn_lnk_up_n             : in std_logic;
85
  trn_tdst_rdy_n           : in std_logic;
86
  trn_tdst_dsc_n           : in std_logic;
87
  trn_tbuf_av              : in std_logic_vector (5 downto 0);
88
  rx_tx_read_data          : in std_logic_vector(31 downto 0);
89
  rx_tx_read_data_valid    : in std_logic;
90
  tx_rx_read_data_valid    : out std_logic
91
 
92
);
93
 
94
end tests;
95
 
96
-- Package Declaration
97
 
98
architecture rtl of  tests is
99
 
100
begin
101
 
102
  trn_td <= trn_td_c;
103
  trn_trem_n <= trn_trem_n_c;
104
 
105
 
106
 
107
  TX_STIMULI : process
108
 
109
    begin
110
 
111
      pio_check_design := true; -- By default check to make sure that the core has been configured
112
                                                -- appropriately for the PIO Design (see user guide for details)
113
      NUMBER_OF_IO_BARS := 0;
114
      NUMBER_OF_MEM32_BARS := 0;
115
      NUMBER_OF_MEM64_BARS :=0;
116
 
117
      frame_store_tx_idx := 0;
118
      success := true;
119
 
120
      trn_tsof_n <= '1';
121
      trn_teof_n <= '1';
122
      trn_terrfwd_n <= '1';
123
      trn_tsrc_rdy_n <= '1';
124
      trn_tsrc_dsc_n <= '1';
125
      trn_td_c <= (others => '0');
126
      tx_rx_read_data_valid <= '0';
127
 
128
     writeNowToScreen(String'("CoreName = v6_pcie_v1_7_x4"));
129
 
130
----------------------------------------------------------------------------------------
131
-- Testname: smoke_test
132
----------------------------------------------------------------------------------------
133
 
134
    if (test_selector = String'("sample_smoke_test0")) then
135
 
136
      writeNowToScreen(String'("Running sample_smoke_test0"));
137
 
138
      write (LGlobal, String'("Expected Device/Vendor ID = 0x"));
139
      hwrite(LGlobal, DEV_VEN_ID);
140
      writeline (output, LGlobal);
141
 
142
      PROC_SYSTEM_INITIALIZATION(trn_reset_n, trn_lnk_up_n);
143
 
144
    --------------------------------------------------------------------------
145
    -- Read core configuration space via PCIe fabric interface
146
   --------------------------------------------------------------------------
147
 
148
      writeNowToScreen(String'("Reading from PCI/PCI-Express Configuration Register 0x00"));
149
 
150
 
151
      PROC_TX_TYPE0_CONFIGURATION_READ (
152
        X"00", X"000", X"F", trn_td_c, trn_tsof_n, trn_teof_n, trn_trem_n_c, trn_tsrc_rdy_n,
153
        trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
154
 
155
      PROC_WAIT_FOR_READ_DATA (tx_rx_read_data_valid, rx_tx_read_data_valid, rx_tx_read_data, trn_clk);
156
 
157
      if (P_READ_DATA = DEV_VEN_ID) then
158
 
159
        writeNowToScreen(String'("TEST PASSED. Completion Data = DEV_VEN_ID "));
160
 
161
      else
162
 
163
        success := false;
164
        writeNowToScreen(String'("TEST FAILED. Completion Data != DEV_VEN_ID "));
165
        write (LGlobal, String'("Data = 0x"));
166
        hwrite(LGlobal, P_READ_DATA);
167
        writeline (output, LGlobal);
168
 
169
      end if;
170
 
171
 
172
----------------------------------------------------------------------------------------
173
-- Testname: pio_write_readBack_test0
174
----------------------------------------------------------------------------------------
175
 
176
    elsif (test_selector = String'("pio_writeReadBack_test0")) then
177
 
178
      writeNowToScreen(String'("Running pio_writeReadBack_test0"));
179
 
180
      PROC_SYSTEM_INITIALIZATION(trn_reset_n, trn_lnk_up_n);
181
 
182
      PROC_BAR_INIT (tx_rx_read_data_valid, rx_tx_read_data_valid, rx_tx_read_data, trn_td_c,
183
        trn_tsof_n, trn_teof_n, trn_trem_n_c, trn_tsrc_rdy_n, trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
184
 
185
      PROC_TX_CLK_EAT(300, trn_clk);
186
 
187
      for i in 0 to 6 loop
188
 
189
        case BAR_ENABLED(i) is
190
 
191
          when 1 =>
192
 
193
-- Test PIO IO Space
194
 
195
            write (Lglobal, String'("Testing PIO IO Space BAR "));
196
            hwrite(Lglobal, std_logic_vector(to_unsigned(i, 4)));
197
            writeline (output, Lglobal);
198
 
199
            PROC_TX_IO_WRITE (
200
              X"00", BAR(i)(31 downto 0), X"F", X"DEADBEEF",
201
              trn_td_c, trn_tsof_n, trn_teof_n, trn_trem_n_c, trn_tsrc_rdy_n, trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
202
 
203
            P_READ_DATA := X"FFFFFFFF";
204
 
205
            PROC_TX_IO_READ (
206
              X"01", BAR(i)(31 downto 0), X"F",
207
              trn_td_c, trn_tsof_n, trn_teof_n, trn_trem_n_c, trn_tsrc_rdy_n, trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
208
 
209
            PROC_WAIT_FOR_READ_DATA (tx_rx_read_data_valid, rx_tx_read_data_valid, rx_tx_read_data, trn_clk);
210
 
211
            if (P_READ_DATA = X"DEADBEEF") then
212
 
213
              writeNowToScreen(String'("Test Passed. Completion Data = 0xDEADBEEF "));
214
 
215
            else
216
 
217
              success := false;
218
              writeNowToScreen(String'("Test Failed. Completion Data != 0xDEADBEEF. "));
219
              write (LGlobal, String'("Data = 0x"));
220
              hwrite(LGlobal, P_READ_DATA);
221
              writeline (output, LGlobal);
222
 
223
            end if;
224
 
225
            PROC_TX_CLK_EAT(100, trn_clk);
226
 
227
          when 2 =>
228
 
229
-- Test PIO Mem32 Space
230
            write (Lglobal, String'("Testing PIO Mem32 Space BAR "));
231
            hwrite(Lglobal, std_logic_vector(to_unsigned(i, 4)));
232
            writeline (output, Lglobal);
233
 
234
            DATA_STORE(0) := X"01";
235
            DATA_STORE(1) := X"02";
236
            DATA_STORE(2) := X"03";
237
            DATA_STORE(3) := X"04";
238
 
239
 
240
            PROC_TX_MEMORY_WRITE_32 (
241
              X"02", "000", "0000000001", BAR(i)(31 downto 0), X"0", X"F",'0',
242
              trn_td_c, trn_tsof_n, trn_teof_n , trn_trem_n_c, trn_tsrc_rdy_n, trn_terrfwd_n,
243
              trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
244
 
245
            P_READ_DATA := X"FFFFFFFF";
246
 
247
            PROC_TX_MEMORY_READ_32 (
248
              X"03", "000", "0000000001", BAR(i)(31 downto 0), X"0", X"F",
249
              trn_td_c, trn_tsof_n, trn_teof_n , trn_trem_n_c, trn_tsrc_rdy_n, trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
250
 
251
            PROC_WAIT_FOR_READ_DATA (tx_rx_read_data_valid, rx_tx_read_data_valid, rx_tx_read_data, trn_clk);
252
 
253
 
254
            if (P_READ_DATA = X"04030201") then
255
 
256
              writeNowToScreen(String'("Test Passed. Completion Data = 0x04030201"));
257
 
258
            else
259
 
260
              success := false;
261
              writeNowToScreen(String'("Test Failed. Completion Data != 0x04030201"));
262
              write (LGlobal, String'("Data = 0x"));
263
              hwrite(LGlobal, P_READ_DATA);
264
              writeline (output, LGlobal);
265
 
266
            end if;
267
 
268
            PROC_TX_CLK_EAT(100, trn_clk);
269
 
270
          when 3 =>
271
 
272
-- Test PIO Mem64 Space
273
 
274
            write (Lglobal, String'("Testing PIO Mem64 Space BAR "));
275
            hwrite(Lglobal, std_logic_vector(to_unsigned(i, 4)));
276
            writeline (output, Lglobal);
277
 
278
            DATA_STORE(0) := X"64";
279
            DATA_STORE(1) := X"63";
280
            DATA_STORE(2) := X"62";
281
            DATA_STORE(3) := X"61";
282
 
283
            PROC_TX_MEMORY_WRITE_64 (
284
              X"04", "000", "0000000001", BAR(i+1)(31 downto 0) & BAR(i)(31 downto 0), X"0", X"F",'0',
285
              trn_td_c, trn_tsof_n, trn_teof_n, trn_trem_n_c, trn_tsrc_rdy_n, trn_terrfwd_n,
286
              trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
287
 
288
            P_READ_DATA := X"FFFFFFFF";
289
 
290
            PROC_TX_MEMORY_READ_64 (
291
              X"05", "000", "0000000001", BAR(i+1)(31 downto 0) & BAR(i)(31 downto 0), X"0", X"F",
292
              trn_td_c, trn_tsof_n, trn_teof_n, trn_trem_n_c, trn_tsrc_rdy_n, trn_lnk_up_n, trn_tdst_rdy_n, trn_clk);
293
 
294
            PROC_WAIT_FOR_READ_DATA (tx_rx_read_data_valid, rx_tx_read_data_valid, rx_tx_read_data, trn_clk);
295
 
296
 
297
            if (P_READ_DATA = X"61626364") then
298
 
299
               writeNowToScreen(String'("Test Passed. Completion Data = 0x61626364"));
300
 
301
            else
302
 
303
              success := false;
304
              writeNowToScreen(String'("Test Failed. Completion Data != 0x61626364."));
305
              write (LGlobal, String'("Data = 0x"));
306
              hwrite(LGlobal, P_READ_DATA);
307
              writeline (output, LGlobal);
308
 
309
            end if;
310
 
311
            PROC_TX_CLK_EAT(100, trn_clk);
312
 
313
          when others    =>
314
 
315
        end case;
316
 
317
      end loop;
318
 
319
      PROC_TX_CLK_EAT(100, trn_clk);
320
 
321
    else
322
 
323
      writeNowToScreen(String'("ERROR: No test has been selected"));
324
      FINISH_FAILURE;
325
 
326
    end if;   -- test selection
327
 
328
    ----------------------------------------------------------------------------
329
    -- Direct Root Port to allow upstream traffic by enabling Mem, I/O and
330
    -- BusMstr in the command register
331
    ----------------------------------------------------------------------------
332
    PROC_READ_CFG_DW(conv_std_logic_vector(1, 10), cfg_rdwr_int);
333
    PROC_WRITE_CFG_DW(conv_std_logic_vector(1, 10), x"00000007", "1110", cfg_rdwr_int);
334
    PROC_READ_CFG_DW(conv_std_logic_vector(1, 10), cfg_rdwr_int);
335
 
336
    if (success = false) then
337
       FINISH_FAILURE;
338
    end if;
339
 
340
    FINISH;
341
 
342
    wait; -- added just in case previous FINISH calls are removed
343
 
344
  end process TX_STIMULI;
345
 
346
 
347
end; -- tests

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