URL https://opencores.org/ocsvn/plb2wbbridge/plb2wbbridge/trunk

Subversion Repositories plb2wbbridge

[/] [plb2wbbridge/] [trunk/] [systems/] [test_system_sim/] [wb_irqs/] [simulation/] [test_cases/] [irq_tests/] [transfers.bfl] - Blame information for rev 2

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 set_alias(PART         = 1)
 set_alias(SUBPART      = 2)
 set_alias(SUBSUBPART   = 3)
 
 
 
 ---------------------------------
 --  32-Bit Master              --
 
 set_device(path=/system_tb/dut/plb_bfm_master_32/plb_bfm_master_32/master,device_type=plb_master)
 configure(msize=00)
 
 
 mem_update(addr=00010000,data=80000000)
 mem_update(addr=0001000c,data=80000000)
 wait( level=PART )
 
 -- the first irq was rised
 read    ( addr=0001000c, size=0000, be=1111 )
 
 -- clear the bridge-irq
 write    ( addr=00010000, size=0000, be=1111 )
 
 -- there should be a second irq (rised directly after the first)
 mem_update(addr=0001000c,data=20000000)
 read    ( addr=0001000c, size=0000, be=1111 )
 
 -- clear the bridge-irq
 write    ( addr=00010000, size=0000, be=1111 )
 
 
 mem_update(addr=00010000,data=80000000)
 mem_update(addr=0001000c,data=40000000)
 wait( level=PART )
 read    ( addr=00010000, size=0000, be=1111 )
 read    ( addr=0001000c, size=0000, be=1111 )
 mem_update(addr=00010000,data=00000000)
 write    ( addr=00010000, size=0000, be=1111 )
 
 
 mem_update(addr=00010000,data=80000000)
 mem_update(addr=0001000c,data=20000000)
 wait( level=PART )
 read    ( addr=00010000, size=0000, be=1111 )
 read    ( addr=0001000c, size=0000, be=1111 )
 mem_update(addr=00010000,data=00000000)
 write    ( addr=00010000, size=0000, be=1111 )
 
 
 mem_update(addr=00010000,data=80000000)
 mem_update(addr=0001000c,data=10000000)
 wait( level=PART )
 read    ( addr=0001000c, size=0000, be=1111 )
 mem_update(addr=00010000,data=00000000)
 write    ( addr=00010000, size=0000, be=1111 )
 
 

Line No.	Rev	Author	Line
1	2	feddischso
2
3			`set_alias(PART = 1)`
4			`set_alias(SUBPART = 2)`
5			`set_alias(SUBSUBPART = 3)`
6
7
8
9			`---------------------------------`
10			`-- 32-Bit Master --`
11
12			`set_device(path=/system_tb/dut/plb_bfm_master_32/plb_bfm_master_32/master,device_type=plb_master)`
13			`configure(msize=00)`
14
15
16			`mem_update(addr=00010000,data=80000000)`
17			`mem_update(addr=0001000c,data=80000000)`
18			`wait( level=PART )`
19
20			`-- the first irq was rised`
21			`read ( addr=0001000c, size=0000, be=1111 )`
22
23			`-- clear the bridge-irq`
24			`write ( addr=00010000, size=0000, be=1111 )`
25
26			`-- there should be a second irq (rised directly after the first)`
27			`mem_update(addr=0001000c,data=20000000)`
28			`read ( addr=0001000c, size=0000, be=1111 )`
29
30			`-- clear the bridge-irq`
31			`write ( addr=00010000, size=0000, be=1111 )`
32
33
34			`mem_update(addr=00010000,data=80000000)`
35			`mem_update(addr=0001000c,data=40000000)`
36			`wait( level=PART )`
37			`read ( addr=00010000, size=0000, be=1111 )`
38			`read ( addr=0001000c, size=0000, be=1111 )`
39			`mem_update(addr=00010000,data=00000000)`
40			`write ( addr=00010000, size=0000, be=1111 )`
41
42
43			`mem_update(addr=00010000,data=80000000)`
44			`mem_update(addr=0001000c,data=20000000)`
45			`wait( level=PART )`
46			`read ( addr=00010000, size=0000, be=1111 )`
47			`read ( addr=0001000c, size=0000, be=1111 )`
48			`mem_update(addr=00010000,data=00000000)`
49			`write ( addr=00010000, size=0000, be=1111 )`
50
51
52			`mem_update(addr=00010000,data=80000000)`
53			`mem_update(addr=0001000c,data=10000000)`
54			`wait( level=PART )`
55			`read ( addr=0001000c, size=0000, be=1111 )`
56			`mem_update(addr=00010000,data=00000000)`
57			`write ( addr=00010000, size=0000, be=1111 )`
58
59

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Subversion Repositories plb2wbbridge

[/] [plb2wbbridge/] [trunk/] [systems/] [test_system_sim/] [wb_irqs/] [simulation/] [test_cases/] [irq_tests/] [transfers.bfl] - Blame information for rev 2