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[/] [psg16/] [trunk/] [rtl/] [verilog/] [PSGToneGenerator.v] - Blame information for rev 5

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1 4 robfinch
`timescale 1ns / 1ps
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// ============================================================================
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//        __
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//   \\__/ o\    (C) 2007-2017  Robert Finch, Waterloo
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch<remove>@finitron.ca
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//       ||
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//
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// PSGToneGenerator.v
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//
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// This source file is free software: you can redistribute it and/or modify 
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// it under the terms of the GNU Lesser General Public License as published 
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// by the Free Software Foundation, either version 3 of the License, or     
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// (at your option) any later version.                                      
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//                                                                          
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// This source file is distributed in the hope that it will be useful,      
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// but WITHOUT ANY WARRANTY; without even the implied warranty of           
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
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// GNU General Public License for more details.                             
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//                                                                          
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// You should have received a copy of the GNU General Public License        
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
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//                                                                          
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//=============================================================================
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module PSGToneGenerator(rst, clk, ack, test, vt, freq, pw, acc, prev_acc, wave, sync, ringmod, o);
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input rst;
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input clk;
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input ack;              // wave table input acknowledge
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input [11:0] wave;      // wave table data input
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input test;
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input [5:0] vt;         // voice type
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input [23:0] freq;
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input [23:0] pw;        // pulse width
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input sync;
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input ringmod;
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input  [31:0] prev_acc;  // from previous voice
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output [31:0] acc;            // 1.023MHz / 2^ 24 = 0.06Hz resolution
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output [11:0] o;
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reg [31:0] accd;    // cycle delayed accumulator
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integer n;
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reg [11:0] outputT;
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reg [11:0] outputW;
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reg [22:0] lfsr;
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wire synca = ~prev_acc[31]&acc[31]&sync;
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PSGHarmonicSynthesizer u2
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(
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    .rst(rst),
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    .clk(clk),
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    .test(test),
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    .sync(synca),
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    .freq({8'h00,freq}),
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    .o(acc)
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);
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// capture wave input
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always @(posedge clk)
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if (rst)
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    outputW <= 0;
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else if (ack)
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    outputW <= wave;
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// Noise generator
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always @(posedge clk)
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        if (acc[18] != acc[22])
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                lfsr <= {lfsr[21:0],~(lfsr[22]^lfsr[17])};
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// Triangle wave, ring modulation
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wire msb = ringmod ? acc[27]^prev_acc[27] : acc[27];
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always @(acc or msb)
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        outputT <= msb ? ~acc[26:15] : acc[26:15];
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// Other waveforms, ho-hum
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wire [11:0] outputP = {12{acc[27:16] < pw}};
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wire [11:0] outputS = vt[5] ? ~acc[27:16] : acc[27:16];
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wire [11:0] outputN = lfsr[11:0];
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wire [11:0] out;
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PSGNoteOutMux #(12) u4 (.s(vt), .a(outputT), .b(outputS), .c(outputP), .d(outputN), .e(outputW), .o(out) );
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assign o = out;
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endmodule
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