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/*----------------------------------------------------------------------------- * File: quad_decoder.c * Desc: Test suite for functional verification of the quadrature * decoder module. * Date: Initiated Oct. 2009 * Auth: Scott Nortman, Bridge Electronic Design LLC * * Current Version: v1.0.0 * * Revision History * * * When Who What * --------------------------------------------------------------------------- * 10/2009 S. Nortman Initial development started. * 7/2010 S. Nortman Added comments, clean code, release v1.0.0 * *----------------------------------------------------------------------------*/ #include #include #include #include #include "devices.h" #include "hardware.h" #include "quad_decoder.h" #ifndef ABS #define ABS( x ) ( (x < 0)?(0-x):(x) ) #endif /* Number of counts when performing random count test */ #define NUM_CNTS ( 1000 ) extern uint8_t quad_irq_flag; extern uint32_t quad_irq_qsr; static ioport_t *ioport; #define QUAD_IOPORT_ID WB_PRTIO_1 void quad_dcdr_test( uint32_t base_add ) { int32_t temp = 0; int32_t delta, count, a, error_count; volatile uint32_t *ptr = (volatile uint32_t *)base_add; uint8_t errFlag = FALSE; // Test QCR after reset; we expect 0 printf("\nTesting reset value of QCR register...\n"); temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER); if( temp != 0 ) printf("QCR register [ FAILED ], value is 0x%08X.\n", temp); else printf("QCR register [ PASSED ], value is 0x%08X.\n", temp); //Test QSR after reset; we expect a 0 printf("\nTesting reset value of QSR register...\n"); temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ); if( temp != 0 ) printf("QSR register [ FAILED ], value is 0x%08X.\n", temp); else printf("QSR register [ PASSED ], value is 0x%08X.\n", temp); //Test QRW want 0 printf("\nTesting reset value of QRW register...\n"); temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ); if( temp != 0 ) printf("QRW register [ FAILED ], value is 0x%08X.\n", temp); else printf("QRW register [ PASSED ], value is 0x%08X.\n", temp); printf("Writing all zeros...\n"); QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) = 0; QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) = 0; QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0; printf("\nTesting zero value of QCR register...\n"); temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER); if( temp != 0 ) printf("QCR register [ FAILED ], value is 0x%08X.\n", temp); else printf("QCR register [ PASSED ], value is 0x%08X.\n", temp); printf("\nTesting zero value of QSR register...\n"); temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ); if( temp != 0 ) printf("QSR register [ FAILED ], value is 0x%08X.\n", temp); else printf("QSR register [ PASSED ], value is 0x%08X.\n", temp); printf("\nTesting zero value of QRW register...\n"); //temp = QUAD_DCDR_QRW_REG( ptr ); temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ); if( temp != 0 ) printf("QRW register [ FAILED ], value is 0x%08X.\n", temp); else printf("QRW register [ PASSED ], value is 0x%08X.\n", temp); printf("\nWriting to bit locations in QCR register...\n"); printf("Writing 1 to bit 0...\n"); QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<>7 ){ printf("IRQ error, expected flag to be false...\n"); quad_irq_flag = 0; } else printf("IRQ flag FALSE, triggering error...\n"); //enable int QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<>7 ){ printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); } else printf("IRQ [ FAILED ], flag false...\n"); //clear int QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<>7 ){ printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); } else printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //gen underflow interrupt QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<>7 ){ printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); } else printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //clear int QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<>7 ){ printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); } else printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //gen over interrupt QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<>7 ){ printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); } else printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //clear int QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<>7 ){ printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); } else printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //test index input //set value manually QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~( (1<>7 ) printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); else printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //leave idx asserted, clear flag, bit should still be set QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<>7 ) printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); else printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); //Now disable index enable bit, clear the status register, and confirm that the IRQ // is deasserted. printf("Turn idx off...\n"); ioport_set_value( ioport, 0, 0x00 ); QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<>7 ) printf("IRQ [ FAILED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); else printf("IRQ [ PASSED ], QSR: 0x%02X.\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER)); printf("Preloading count 0x55555555...\n"); QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0x55555555; //Write to QRW QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<>QSR_CCME; printf("Checking QSR, pre testing...\n"); if( temp ) printf("CCME [ FAILED ], wanted 0, got %d\n", temp ); else printf("CCME [ PASSED ], wanted 0, got %d\n", temp ); printf("CCME=0, CMIE=0, Asserting QLAT\n"); QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<>QSR_CCME; printf("Checking QSR...\n"); if( temp ) printf("CCME [ FAILED ], wanted 0, got %d\n", temp ); else printf("CCME [ PASSED ], wanted 0, got %d\n", temp ); printf("Checking IRQ...\n"); temp = ioport_get_value( ioport, 0 ); if( (temp&(1<<7))>>7 ) printf("IRQ [ FAILED ], wanted 0, got 1\n"); else printf("IRQ [ PASSED ], wanted 0, got 0\n"); QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0xDEADDEAD; QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<>QSR_CCME; printf("Checking QSR...\n"); if( temp ) printf("CCME [ FAILED ], wanted 0, got %d\n", temp ); else printf("CCME [ PASSED ], wanted 0, got %d\n", temp ); printf("Quad Count =/= QRW, Checking IRQ...\n"); temp = ioport_get_value( ioport, 0 ); if( (temp&(1<<7))>>7 ) printf("IRQ [ FAILED ], wanted 0, got 1\n"); else printf("IRQ [ PASSED ], wanted 0, got 0\n"); QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<>QSR_CCME; printf("Quad Count == QRW, Checking QSR...\n"); if( temp ) printf("CCME [ PASSED ], wanted 1, got %d\n", temp ); else printf("CCME [ FAILED ], wanted 1, got %d\n", temp ); printf("Quad Count == QRW, Checking IRQ...\n"); temp = ioport_get_value( ioport, 0 ); if( (temp&(1<<7))>>7 ) printf("IRQ [ PASSED ], wanted 1, got 1\n"); else printf("IRQ [ FAILED ], wanted 0, got 0\n"); QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0x01234567; QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<>QSR_CCME; printf("Quad Count =/= QRW, cleared QSR, Checking QSR...\n"); if( temp ) printf("CCME [ FAILED ], wanted 0, got %d\n", temp ); else printf("CCME [ PASSED ], wanted 0, got %d\n", temp ); printf("Quad Count =/= QRW, cleared QSR, Checking IRQ...\n"); temp = ioport_get_value( ioport, 0 ); if( (temp&(1<<7))>>7 ) printf("IRQ [ FAILED ], wanted 0, got 1\n"); else printf("IRQ [ PASSED ], wanted 0, got 0\n"); #endif count = 0; error_count = 0; QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = count; QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1< ch A, port1 => ch b, port2 => index uint8_t quad_dcdr_sim( int32_t steps, int8_t error ) { uint32_t num_steps = ABS( steps ); int8_t direction = 0; uint32_t current_step = 0; uint32_t current_state = 0; //See if we want to create an intentional error if( error ){ current_state = ioport_get_value( ioport, 0 ); //Cause changes in both bits simultaneously for error ioport_set_value( ioport, 0, (current_state^0x03)&0x03 ); } else{ if (steps < 0) direction = -1; else direction = 1; for( current_step = 0; current_step < num_steps; current_step++) { //get current state current_state = ioport_get_value( ioport, 0 ); switch( current_state & 0x00000003 ){ case 0x00: if( direction == 1 ) ioport_set_value( ioport, 0, 0x01); else ioport_set_value( ioport, 0, 0x02); break; case 0x01: if( direction == 1 ) ioport_set_value( ioport, 0, 0x03); else ioport_set_value( ioport, 0, 0x00); break; case 0x03: if( direction == 1 ) ioport_set_value( ioport, 0, 0x02); else ioport_set_value( ioport, 0, 0x01); break; case 0x02: if( direction == 1 ) ioport_set_value( ioport, 0, 0x00); else ioport_set_value( ioport, 0, 0x03); break; } } } return( ioport_get_value( ioport, 0 ) & 0x03 ); }//end quad_dcdr_sim

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[/] [quad_decoder/] [trunk/] [c_src/] [quad_decoder.c] - Blame information for rev 4

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