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[/] [random_pulse_generator/] [trunk/] [random_pulse_generator.v] - Blame information for rev 2

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///////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// File: random_pulse_generator.v
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// File history:
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//      Version 1: 2015-03-24: Created
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//
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// Description: 
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//
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// Poisson process generator. 
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// Generate Poisson process with desired inversed rate (number of clocks per hit).
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// The rate is defined by parameter LN2_PERIOD. For example, the LN2_PERIOD=4 will generate 
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// in average one pulse per 16 clocks.
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// 
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// Author: Andrey Sukhanov
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//
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/////////////////////////////////////////////////////////////////////////////////////////////////// 
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`timescale 1ns/1ps
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//''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
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module pseudo_random(input  clk, ce, rst, output reg [31:0] q);
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// 32-bit uniform pseudo-random number generator, based on fibonacci LFSR
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// Other 32-bit uniform random generators can be used as well.
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wire feedback = q[31]^q[29]^q[28]^ q[27]^ q[23]^q[20]^ q[19]^q[17]^ q[15]^q[14]^q[12]^ q[11]^q[9]^ q[4]^ q[3]^q[2];
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//feedback term B89ADA1C, other terms can be found from this table
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// http://www.ece.cmu.edu/~koopman/lfsr/index.html
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always @(posedge clk or posedge rst)
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  if (rst)
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    q <= 32'haaaaaaaa;   // the start is more random with this initialization
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  else if (ce)
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    q <= {q[30:0], feedback} ;
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endmodule
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//,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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//''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
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module random_pulse_generator( input clk, ce, rst, output reg q);
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parameter LN2_PERIOD = 4; // 1 < LN2_PERIOD < 31
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// log2 of the inversed process rate , 
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parameter MASK = {LN2_PERIOD{1'b0}}; // any number with LN2_PERIOD bits can be used as a MASK
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wire [31:0] uniform_random;
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wire [LN2_PERIOD-1:0] sample;
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pseudo_random pseudo_random_gen(clk, ce, rst, uniform_random);
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assign sample = uniform_random[LN2_PERIOD-1:0]; // any subset of LN2_PERIOD bits can be used as a sample
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always @ (posedge clk)
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    if(ce) begin
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        if (sample == MASK) q <= 1'b1;
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        if (q) q <= 1'b0;
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    end
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endmodule
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//,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,

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