OpenCores
URL https://opencores.org/ocsvn/rtf8088/rtf8088/trunk

Subversion Repositories rtf8088

[/] [rtf8088/] [trunk/] [rtl/] [verilog/] [CALL.v] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 robfinch
//=============================================================================
2
//  CALL NEAR
3
//
4
//
5
//  2009-2012 Robert Finch
6
//  Stratford
7
//  robfinch<remove>@opencores.org
8
//
9
//
10
// This source file is free software: you can redistribute it and/or modify 
11
// it under the terms of the GNU Lesser General Public License as published 
12
// by the Free Software Foundation, either version 3 of the License, or     
13
// (at your option) any later version.                                      
14
//                                                                          
15
// This source file is distributed in the hope that it will be useful,      
16
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
17
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
18
// GNU General Public License for more details.                             
19
//                                                                          
20
// You should have received a copy of the GNU General Public License        
21
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
22
//
23
//
24
//=============================================================================
25
//
26
CALL:
27
        begin
28
                `INITIATE_STACK_WRITE
29
                lock_o <= 1'b1;
30
                dat_o <= ip[15:8];
31
                state <= CALL1;
32
        end
33
CALL1:
34
        if (ack_i) begin
35
                state <= CALL2;
36
                `PAUSE_STACK_WRITE
37
        end
38
CALL2:
39
        begin
40
                state <= CALL3;
41
                `INITIATE_STACK_WRITE
42
                dat_o <= ip[7:0];
43
        end
44
CALL3:
45
        if (ack_i) begin
46
                `TERMINATE_CYCLE
47
                lock_o <= 1'b0;
48
                ip <= ip + disp16;
49
                state <= IFETCH;
50
        end

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.