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[/] [scalable_arbiter/] [trunk/] [bench/] [verilog/] [tb_arbiter3.v] - Blame information for rev 12

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1 12 kendallc
/*
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 * Copyright (c) 2009, Kendall Correll
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 *
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 * Permission to use, copy, modify, and distribute this software for any
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 * purpose with or without fee is hereby granted, provided that the above
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 * copyright notice and this permission notice appear in all copies.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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 */
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`timescale 1ns / 1ps
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// This bench walks the demo through its sequence, but it does not verify outputs.
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`define WIDTH 16
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`define SELECT_WIDTH 4
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`define TURNAROUND 3
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`define TICK 10
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`define HALF_TICK 5
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module tb_arbiter3;
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reg clock;
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reg reset;
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reg next_test;
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reg next_step;
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wire [`SELECT_WIDTH-1:0] select;
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wire valid;
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integer test_i;
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`include "functions.v"
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//
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// UUT
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//
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demo #(
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        .width(`WIDTH),
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        .select_width(`SELECT_WIDTH)
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) demo (
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        .next_test(next_test),
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        .next_step(next_step),
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        .select(select),
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        .valid(valid),
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        .clock(clock),
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        .reset(reset)
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);
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//
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// clock
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//
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always @(clock)
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begin
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        #`HALF_TICK clock <= !clock;
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end
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//
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// test sequence
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//
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initial begin
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        clock = 1;
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        next_test = 0;
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        next_step = 0;
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        reset = 1;
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        #`TICK @(negedge clock) reset = 0;
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        // step through the stimulus sequence, 'req_enable' is always high, so
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        // reqs will be deasserted as soon as they are granted
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        while(1'b1)
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        begin
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                #`TICK next_test = 1;
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                #`TICK next_test = 0;
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                for(test_i = 0; test_i < `WIDTH; test_i = test_i + 1)
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                begin
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                        #(`TURNAROUND*`TICK) next_step = 1;
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                        #`TICK next_step = 0;
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                end
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        end
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end
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endmodule

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