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URL https://opencores.org/ocsvn/simple_agc/simple_agc/trunk

Subversion Repositories simple_agc

[/] [simple_agc/] [trunk/] [Makefile] - Blame information for rev 2

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Line No. Rev Author Line
1 2 tyer426
 
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SIMCOMPILER = iverilog
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SIMULATOR = vvp
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VIEWER = gtkwave
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SIMCOMPFLAGS = -v -o
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SIMFLAGS = -v
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SRCS = $(wildcard *.v)
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TBSRCS = $(filter %_tb.v, $(SRCS))
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MODSRCS = $(filter-out %_tb.v %_incl.v, $(SRCS))
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VVPS = $(patsubst %.v,%.vvp,$(TBSRCS))
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VCDS = $(patsubst %_tb.v,%_tb.vcd,$(TBSRCS))
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GTKCONF = $(patsubst %_tb.v,%_tb.gtkw,$(TBSRCS))
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all: disp
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sim: $(VCDS)
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$(VVPS): %.vvp: %.v $(MODSRCS)
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        $(SIMCOMPILER) $(SIMCOMPFLAGS) $(VVPS) $^
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$(VCDS): %_tb.vcd: %_tb.vvp
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        $(SIMULATOR) $(SIMFLAGS) $<
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disp: $(VCDS)
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        $(VIEWER) -O /dev/null $(VCDS) $(GTKCONF) &
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clean:
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        rm -f $(wildcard *.vvp) $(wildcard *.vcd)

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