OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [lattice.com/] [fpgas/] [ip/] [iceskate/] [rtl/] [xml/] [fpgas_iceskate_default.xml] - Blame information for rev 135

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 135 jt_eaton
2
30
31
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
32
xmlns:socgen="http://opencores.org"
33
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
34
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
35
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
36
lattice.com
37
fpgas
38
iceskate
39
default
40
 
41
42
 
43
 
44
45
  gen_verilog
46
  104.0
47
  none
48
  :*common:*
49
  tools/verilog/gen_verilog
50
    
51
    
52
      destination
53
      iceskate_default
54
    
55
  
56
57
 
58
59
 
60
 
61
 
62
 
63
 
64
 
65
 
66
 
67
 
68
 
69
 
70
71
 
72
 
73
 
74
 
75
 
76
 
77
 
78
 
79
 
80
  
81
 
82
 
83
 
84
 
85
 
86
 
87
 
88
 
89
 
90
 
91
 
92
 
93
    
94
     padring:*Simulation:*
95
     
96
     
97
                          ipxact:library="fpgas"
98
                          ipxact:name="iceskate"
99
                          ipxact:version="padring"/>
100
     
101
    
102
 
103
 
104
    
105
     verilog:*Simulation:*
106
     
107
     
108
                          ipxact:library="Testbench"
109
                          ipxact:name="toolflow"
110
                          ipxact:version="verilog"/>
111
     
112
    
113
 
114
 
115
 
116
    
117
    common:*common:*
118
    Verilog
119
    
120
    fs-common
121
    
122
 
123
 
124
 
125
 
126
 
127
    
128
    sim:*Simulation:*
129
    Verilog
130
    
131
    fs-sim
132
    
133
 
134
 
135
    
136
    syn:*Synthesis:*
137
    Verilog
138
    
139
    fs-sim
140
    
141
 
142
 
143
 
144
 
145
              
146
              doc:*Simulation:*
147
              
148
              
149
                                   ipxact:library="Testbench"
150
                                   ipxact:name="toolflow"
151
                                   ipxact:version="documentation"/>
152
              
153
              :*Documentation:*
154
              Verilog
155
              
156
 
157
 
158
 
159
 
160
 
161
 
162
 
163
 
164
 
165
 
166
 
167
 
168
 
169
170
 
171
 
172
 
173
 
174
  
175
 
176
 
177
 
178
    
179
      fs-sim
180
 
181
      
182
        
183
        ../verilog/copyright
184
        verilogSourceinclude
185
      
186
 
187
      
188
        
189
        ../verilog/common/iceskate_default
190
        verilogSourcemodule
191
      
192
 
193
      
194
        dest_dir
195
        ../views/sim/
196
        verilogSourcelibraryDir
197
      
198
 
199
    
200
 
201
 
202
 
203
 
204
    
205
      fs-syn
206
 
207
      
208
        
209
        ../verilog/copyright
210
        verilogSourceinclude
211
      
212
 
213
      
214
        
215
        ../verilog/common/iceskate_default
216
        verilogSourcemodule
217
      
218
 
219
      
220
        dest_dir
221
        ../views/syn/
222
        verilogSourcelibraryDir
223
      
224
 
225
    
226
 
227
 
228
 
229
 
230
 
231
    
232
      fs-lint
233
 
234
      
235
        dest_dir
236
        ../views/syn/
237
        verilogSourcelibraryDir
238
      
239
 
240
    
241
 
242
 
243
 
244
 
245
 
246
 
247
 
248
 
249
 
250
  
251
 
252
 
253
 
254
 
255
 
256
 
257
258
 
259
 
260
 
261
 
262
 
263
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.