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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [doc/] [sym/] [core_def.sym] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton 
v 20100214 1
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B 300 0  4200 2700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
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T 400 2850   5 10 1 1 0 0 1 1
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device=core_def
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T 400 3050 5 10 1 1 0 0 1 1
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refdes=U?
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T 400 3200    0 10 0 1 0 0 1 1
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vendor=opencores.org
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T 400 3200    0 10 0 1 0 0 1 1
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library=Mos6502
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T 400 3200    0 10 0 1 0 0 1 1
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component=core
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T 400 3200    0 10 0 1 0 0 1 1
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version=def
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P 300 200 0 200 10 1 1
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{
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T 400 200 5 10 1 1 0 1 1 1
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pinnumber=vec_int[7:0]
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T 400 200 5 10 0 1 0 1 1 1
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pinseq=1
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}
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P 300 400 0 400 10 1 1
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{
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T 400 400 5 10 1 1 0 1 1 1
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pinnumber=stk_pull_data[15:0]
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T 400 400 5 10 0 1 0 1 1 1
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pinseq=2
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}
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P 300 600 0 600 10 1 1
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{
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T 400 600 5 10 1 1 0 1 1 1
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pinnumber=rdata[15:0]
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T 400 600 5 10 0 1 0 1 1 1
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pinseq=3
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}
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P 300 800 0 800 10 1 1
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{
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T 400 800 5 10 1 1 0 1 1 1
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pinnumber=prog_data[15:0]
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T 400 800 5 10 0 1 0 1 1 1
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pinseq=4
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}
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P 300 1000 0 1000 10 1 1
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{
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T 400 1000 5 10 1 1 0 1 1 1
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pinnumber=pg0_data[7:0]
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T 400 1000 5 10 0 1 0 1 1 1
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pinseq=5
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}
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P 300 1200 0 1200 4 0 1
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{
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T 400 1200 5 10 1 1 0 1 1 1
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pinnumber=reset
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T 400 1200 5 10 0 1 0 1 1 1
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pinseq=6
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}
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P 300 1400 0 1400 4 0 1
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{
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T 400 1400 5 10 1 1 0 1 1 1
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pinnumber=nmi
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T 400 1400 5 10 0 1 0 1 1 1
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pinseq=7
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}
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P 300 1600 0 1600 4 0 1
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{
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T 400 1600 5 10 1 1 0 1 1 1
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pinnumber=enable
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T 400 1600 5 10 0 1 0 1 1 1
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pinseq=8
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}
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P 300 1800 0 1800 4 0 1
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{
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T 400 1800 5 10 1 1 0 1 1 1
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pinnumber=clk
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T 400 1800 5 10 0 1 0 1 1 1
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pinseq=9
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}
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P 4500 200 4800 200 10 1 1
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{
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T 4400 200 5  10 1 1 0 7 1 1
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pinnumber=wdata[7:0]
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T 4400 200 5  10 0 1 0 7 1 1
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pinseq=10
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}
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P 4500 400 4800 400 10 1 1
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{
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T 4400 400 5  10 1 1 0 7 1 1
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pinnumber=stk_push_data[15:0]
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T 4400 400 5  10 0 1 0 7 1 1
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pinseq=11
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}
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P 4500 600 4800 600 10 1 1
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{
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T 4400 600 5  10 1 1 0 7 1 1
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pinnumber=prog_counter[15:0]
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T 4400 600 5  10 0 1 0 7 1 1
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pinseq=12
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}
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P 4500 800 4800 800 10 1 1
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{
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T 4400 800 5  10 1 1 0 7 1 1
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pinnumber=pg0_add[7:0]
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T 4400 800 5  10 0 1 0 7 1 1
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pinseq=13
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}
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P 4500 1000 4800 1000 10 1 1
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{
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T 4400 1000 5  10 1 1 0 7 1 1
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pinnumber=alu_status[7:0]
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T 4400 1000 5  10 0 1 0 7 1 1
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pinseq=14
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}
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P 4500 1200 4800 1200 10 1 1
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{
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T 4400 1200 5  10 1 1 0 7 1 1
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pinnumber=addr[15:0]
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T 4400 1200 5  10 0 1 0 7 1 1
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pinseq=15
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}
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P 4500 1400 4800 1400 4 0 1
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{
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T 4400 1400 5  10 1 1 0 7 1 1
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pinnumber=wr
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T 4500 1400 5  10 0 1 0 7 1 1
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pinseq=16
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}
127 
P 4500 1600 4800 1600 4 0 1
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{
129 
T 4400 1600 5  10 1 1 0 7 1 1
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pinnumber=stk_push
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T 4500 1600 5  10 0 1 0 7 1 1
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pinseq=17
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}
134 
P 4500 1800 4800 1800 4 0 1
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{
136 
T 4400 1800 5  10 1 1 0 7 1 1
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pinnumber=stk_pull
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T 4500 1800 5  10 0 1 0 7 1 1
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pinseq=18
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}
141 
P 4500 2000 4800 2000 4 0 1
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{
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T 4400 2000 5  10 1 1 0 7 1 1
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pinnumber=rd
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T 4500 2000 5  10 0 1 0 7 1 1
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pinseq=19
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}
148 
P 4500 2200 4800 2200 4 0 1
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{
150 
T 4400 2200 5  10 1 1 0 7 1 1
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pinnumber=pg0_wr
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T 4500 2200 5  10 0 1 0 7 1 1
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pinseq=20
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}
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P 4500 2400 4800 2400 4 0 1
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{
157 
T 4400 2400 5  10 1 1 0 7 1 1
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pinnumber=pg0_rd
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T 4500 2400 5  10 0 1 0 7 1 1
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pinseq=21
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}

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