OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [doc/] [sym/] [adv_dbg_if_jsp.sym] - Blame information for rev 135

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 135 jt_eaton
v 20100214 1
2
B 300 0  4000 3900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
3
T 400 4050   5 10 1 1 0 0 1 1
4
device=adv_dbg_if_jsp
5
T 400 4250 5 10 1 1 0 0 1 1
6
refdes=U?
7
T 400 4400    0 10 0 1 0 0 1 1
8
vendor=opencores.org
9
T 400 4400    0 10 0 1 0 0 1 1
10
library=adv_debug_sys
11
T 400 4400    0 10 0 1 0 0 1 1
12
component=adv_dbg_if
13
T 400 4400    0 10 0 1 0 0 1 1
14
version=jsp
15
P 300 200 0 200 10 1 1
16
{
17
T 400 200 5 10 1 1 0 1 1 1
18
pinnumber=wb_jsp_sel_i[3:0]
19
T 400 200 5 10 0 1 0 1 1 1
20
pinseq=1
21
}
22
P 300 400 0 400 10 1 1
23
{
24
T 400 400 5 10 1 1 0 1 1 1
25
pinnumber=wb_jsp_dat_i[31:0]
26
T 400 400 5 10 0 1 0 1 1 1
27
pinseq=2
28
}
29
P 300 600 0 600 10 1 1
30
{
31
T 400 600 5 10 1 1 0 1 1 1
32
pinnumber=wb_jsp_cti_i[2:0]
33
T 400 600 5 10 0 1 0 1 1 1
34
pinseq=3
35
}
36
P 300 800 0 800 10 1 1
37
{
38
T 400 800 5 10 1 1 0 1 1 1
39
pinnumber=wb_jsp_bte_i[1:0]
40
T 400 800 5 10 0 1 0 1 1 1
41
pinseq=4
42
}
43
P 300 1000 0 1000 10 1 1
44
{
45
T 400 1000 5 10 1 1 0 1 1 1
46
pinnumber=wb_jsp_adr_i[31:0]
47
T 400 1000 5 10 0 1 0 1 1 1
48
pinseq=5
49
}
50
P 300 1200 0 1200 4 0 1
51
{
52
T 400 1200 5 10 1 1 0 1 1 1
53
pinnumber=wb_rst_i
54
T 400 1200 5 10 0 1 0 1 1 1
55
pinseq=6
56
}
57
P 300 1400 0 1400 4 0 1
58
{
59
T 400 1400 5 10 1 1 0 1 1 1
60
pinnumber=wb_jsp_we_i
61
T 400 1400 5 10 0 1 0 1 1 1
62
pinseq=7
63
}
64
P 300 1600 0 1600 4 0 1
65
{
66
T 400 1600 5 10 1 1 0 1 1 1
67
pinnumber=wb_jsp_stb_i
68
T 400 1600 5 10 0 1 0 1 1 1
69
pinseq=8
70
}
71
P 300 1800 0 1800 4 0 1
72
{
73
T 400 1800 5 10 1 1 0 1 1 1
74
pinnumber=wb_jsp_cyc_i
75
T 400 1800 5 10 0 1 0 1 1 1
76
pinseq=9
77
}
78
P 300 2000 0 2000 4 0 1
79
{
80
T 400 2000 5 10 1 1 0 1 1 1
81
pinnumber=wb_jsp_cab_i
82
T 400 2000 5 10 0 1 0 1 1 1
83
pinseq=10
84
}
85
P 300 2200 0 2200 4 0 1
86
{
87
T 400 2200 5 10 1 1 0 1 1 1
88
pinnumber=wb_clk_i
89
T 400 2200 5 10 0 1 0 1 1 1
90
pinseq=11
91
}
92
P 300 2400 0 2400 4 0 1
93
{
94
T 400 2400 5 10 1 1 0 1 1 1
95
pinnumber=update_dr_i
96
T 400 2400 5 10 0 1 0 1 1 1
97
pinseq=12
98
}
99
P 300 2600 0 2600 4 0 1
100
{
101
T 400 2600 5 10 1 1 0 1 1 1
102
pinnumber=tdi_i
103
T 400 2600 5 10 0 1 0 1 1 1
104
pinseq=13
105
}
106
P 300 2800 0 2800 4 0 1
107
{
108
T 400 2800 5 10 1 1 0 1 1 1
109
pinnumber=tck_i
110
T 400 2800 5 10 0 1 0 1 1 1
111
pinseq=14
112
}
113
P 300 3000 0 3000 4 0 1
114
{
115
T 400 3000 5 10 1 1 0 1 1 1
116
pinnumber=shift_dr_i
117
T 400 3000 5 10 0 1 0 1 1 1
118
pinseq=15
119
}
120
P 300 3200 0 3200 4 0 1
121
{
122
T 400 3200 5 10 1 1 0 1 1 1
123
pinnumber=rst_i
124
T 400 3200 5 10 0 1 0 1 1 1
125
pinseq=16
126
}
127
P 300 3400 0 3400 4 0 1
128
{
129
T 400 3400 5 10 1 1 0 1 1 1
130
pinnumber=debug_select_i
131
T 400 3400 5 10 0 1 0 1 1 1
132
pinseq=17
133
}
134
P 300 3600 0 3600 4 0 1
135
{
136
T 400 3600 5 10 1 1 0 1 1 1
137
pinnumber=capture_dr_i
138
T 400 3600 5 10 0 1 0 1 1 1
139
pinseq=18
140
}
141
P 4300 200 4600 200 10 1 1
142
{
143
T 4200 200 5  10 1 1 0 7 1 1
144
pinnumber=wb_jsp_dat_o[31:0]
145
T 4200 200 5  10 0 1 0 7 1 1
146
pinseq=19
147
}
148
P 4300 400 4600 400 10 1 1
149
{
150
T 4200 400 5  10 1 1 0 7 1 1
151
pinnumber=jsp_data_out[7:0]
152
T 4200 400 5  10 0 1 0 7 1 1
153
pinseq=20
154
}
155
P 4300 600 4600 600 4 0 1
156
{
157
T 4200 600 5  10 1 1 0 7 1 1
158
pinnumber=wb_jsp_err_o
159
T 4300 600 5  10 0 1 0 7 1 1
160
pinseq=21
161
}
162
P 4300 800 4600 800 4 0 1
163
{
164
T 4200 800 5  10 1 1 0 7 1 1
165
pinnumber=wb_jsp_ack_o
166
T 4300 800 5  10 0 1 0 7 1 1
167
pinseq=22
168
}
169
P 4300 1000 4600 1000 4 0 1
170
{
171
T 4200 1000 5  10 1 1 0 7 1 1
172
pinnumber=tdo_o
173
T 4300 1000 5  10 0 1 0 7 1 1
174
pinseq=23
175
}
176
P 4300 1200 4600 1200 4 0 1
177
{
178
T 4200 1200 5  10 1 1 0 7 1 1
179
pinnumber=int_o
180
T 4300 1200 5  10 0 1 0 7 1 1
181
pinseq=24
182
}
183
P 4300 1400 4600 1400 4 0 1
184
{
185
T 4200 1400 5  10 1 1 0 7 1 1
186
pinnumber=biu_wr_strobe
187
T 4300 1400 5  10 0 1 0 7 1 1
188
pinseq=25
189
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.