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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [doc/] [sym/] [io_pic_def.sym] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton 
v 20100214 1
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B 300 0  2500 2100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
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T 400 2250   5 10 1 1 0 0 1 1
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device=io_pic_def
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T 400 2450 5 10 1 1 0 0 1 1
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refdes=U?
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T 400 2600    0 10 0 1 0 0 1 1
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vendor=opencores.org
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T 400 2600    0 10 0 1 0 0 1 1
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library=io
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T 400 2600    0 10 0 1 0 0 1 1
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component=io_pic
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T 400 2600    0 10 0 1 0 0 1 1
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version=def
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P 300 200 0 200 10 1 1
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{
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T 400 200 5 10 1 1 0 1 1 1
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pinnumber=wdata[7:0]
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T 400 200 5 10 0 1 0 1 1 1
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pinseq=1
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}
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P 300 400 0 400 10 1 1
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{
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T 400 400 5 10 1 1 0 1 1 1
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pinnumber=int_in[7:0]
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T 400 400 5 10 0 1 0 1 1 1
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pinseq=2
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}
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P 300 600 0 600 10 1 1
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{
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T 400 600 5 10 1 1 0 1 1 1
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pinnumber=addr[3:0]
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T 400 600 5 10 0 1 0 1 1 1
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pinseq=3
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}
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P 300 800 0 800 4 0 1
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{
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T 400 800 5 10 1 1 0 1 1 1
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pinnumber=wr
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T 400 800 5 10 0 1 0 1 1 1
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pinseq=4
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}
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P 300 1000 0 1000 4 0 1
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{
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T 400 1000 5 10 1 1 0 1 1 1
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pinnumber=reset
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T 400 1000 5 10 0 1 0 1 1 1
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pinseq=5
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}
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P 300 1200 0 1200 4 0 1
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{
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T 400 1200 5 10 1 1 0 1 1 1
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pinnumber=rd
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T 400 1200 5 10 0 1 0 1 1 1
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pinseq=6
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}
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P 300 1400 0 1400 4 0 1
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{
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T 400 1400 5 10 1 1 0 1 1 1
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pinnumber=enable
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T 400 1400 5 10 0 1 0 1 1 1
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pinseq=7
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}
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P 300 1600 0 1600 4 0 1
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{
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T 400 1600 5 10 1 1 0 1 1 1
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pinnumber=cs
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T 400 1600 5 10 0 1 0 1 1 1
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pinseq=8
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}
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P 300 1800 0 1800 4 0 1
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{
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T 400 1800 5 10 1 1 0 1 1 1
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pinnumber=clk
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T 400 1800 5 10 0 1 0 1 1 1
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pinseq=9
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}
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P 2800 200 3100 200 10 1 1
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{
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T 2700 200 5  10 1 1 0 7 1 1
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pinnumber=rdata[7:0]
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T 2700 200 5  10 0 1 0 7 1 1
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pinseq=10
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}
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P 2800 400 3100 400 4 0 1
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{
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T 2700 400 5  10 1 1 0 7 1 1
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pinnumber=nmi_out
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T 2800 400 5  10 0 1 0 7 1 1
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pinseq=11
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}
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P 2800 600 3100 600 4 0 1
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{
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T 2700 600 5  10 1 1 0 7 1 1
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pinnumber=irq_out
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T 2800 600 5  10 0 1 0 7 1 1
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pinseq=12
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}

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