URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_utimer/] [componentCfg.xml] - Blame information for rev 135

Details | Compare with Previous | View Log





xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
 
opencores.org
io
io_utimer
 
2
_
_
_
VARIANT
 

  
   TestBenches
   sim
   testbenches
   testbench
   version
  
  
   Fpgas
   syn
   ise
   chip
   variant
  

 
 
 

 
/doc
 

 

 

default
def
def_lint

FREQ25



 
 
 

 
 
io_utimer/sim
 
 
 
 
 
 

 
 
 

io_utimer_def_lint
def_lint

  rtl_check


 
 

 
 
 
 
 
 


default
io_utimer_def_lint


 
 
 
 
 

 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
5
6	135	jt_eaton	`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
7	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
8			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`
9
10			`opencores.org`
11			`io`
12			`io_utimer`
13
14			`2`
15			`_`
16			`_`
17			`_`
18			`VARIANT`
19
20	135	jt_eaton
21
22			`TestBenches`
23			`sim`
24			`testbenches`
25			`testbench`
26			`version`
27
28
29			`Fpgas`
30			`syn`
31			`ise`
32			`chip`
33			`variant`
34
35
36	131	jt_eaton
37	135	jt_eaton
38
39	131	jt_eaton
40
41			`/doc`
42
43
44
45	134	jt_eaton
46	131	jt_eaton
47	134	jt_eaton
48			`default`
49			`def`
50			`def_lint`
51
52	135	jt_eaton	`FREQ25`
53	134	jt_eaton
54
55
56	131	jt_eaton
57
58	134	jt_eaton
59	131	jt_eaton
60
61
62			`io_utimer/sim`
63
64
65
66
67
68
69
70
71
72
73
74			`io_utimer_def_lint`
75			`def_lint`
76
77			`rtl_check`
78
79
80
81
82
83
84
85
86
87
88
89
90
91			`default`
92			`io_utimer_def_lint`
93
94
95
96
97
98
99
100
101
102
103

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_utimer/] [componentCfg.xml] - Blame information for rev 135