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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_vic/] [sim/] [testbenches/] [xml/] [io_vic_def_lint.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
io
io_vic
def_lint
 
 
 
 
 
 
 

 
       
 
              
              Dut
              
              
                                   ipxact:library="io"
                                   ipxact:name="io_vic"
                                   ipxact:version="def_dut.params"/>
              
              
 
 
              
              lint
              :*Lint:*
              Verilog
              fs-lint
              
 
 
              
              rtl_check
              
              
                                   ipxact:library="Testbench"
                                   ipxact:name="toolflow"
                                   ipxact:version="rtl_check"/>
              
              
 
      
 
 
 

 
 
 
 
 
 
  
 
 
 
    
      fs-lint
 
      
        
        ../verilog/lint/io_vic_def_lint
        verilogSource
        module
      
 
 
    
 
 
 
  
 
 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
30	135	jt_eaton
31			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
32	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
35			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
36	131	jt_eaton
37	135	jt_eaton	`opencores.org`
38			`io`
39			`io_vic`
40			`def_lint`
41	131	jt_eaton
42
43
44
45
46
47
48	135	jt_eaton
49	131	jt_eaton
50	135	jt_eaton
51	131	jt_eaton
52	135	jt_eaton
53			`Dut`
54
55
56			`ipxact:library="io"`
57			`ipxact:name="io_vic"`
58			`ipxact:version="def_dut.params"/>`
59
60
61	131	jt_eaton
62
63	135	jt_eaton
64			`lint`
65			`:Lint:`
66			`Verilog`
67			`fs-lint`
68
69	131	jt_eaton
70
71	135	jt_eaton
72			`rtl_check`
73
74
75			`ipxact:library="Testbench"`
76			`ipxact:name="toolflow"`
77			`ipxact:version="rtl_check"/>`
78
79
80	131	jt_eaton
81	135	jt_eaton
82	131	jt_eaton
83
84
85	135	jt_eaton
86	131	jt_eaton
87
88
89
90
91
92	135	jt_eaton
93	131	jt_eaton
94
95
96	135	jt_eaton
97			`fs-lint`
98	131	jt_eaton
99	135	jt_eaton
100
101			`../verilog/lint/io_vic_def_lint`
102			`verilogSource`
103			`module`
104
105	131	jt_eaton
106
107	135	jt_eaton
108	131	jt_eaton
109
110
111	135	jt_eaton
112	131	jt_eaton
113
114
115	135	jt_eaton

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_vic/] [sim/] [testbenches/] [xml/] [io_vic_def_lint.xml] - Blame information for rev 135