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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [spi_interface/] [rtl/] [verilog/] [top.body] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton
 
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 spi_slave spi(.clk   ( clk              ),
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               .reset ( reset            ),
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               .SCK   ( spi_clk_pad_in   ),
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               .MOSI  ( spi_mosi_pad_in  ),
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               .MISO  ( spi_miso_pad_out ),
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               .SSEL  ( spi_sel_n_pad_in ),
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               .rx_data  ( rx_data       ),
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               .tx_data  ( tx_data       )
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             );
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