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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [doc/] [sym/] [wb_uart16550_bus16_big.sym] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton
v 20100214 1
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B 300 0  3200 2900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
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T 400 3050   5 10 1 1 0 0 1 1
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device=wb_uart16550_bus16_big
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T 400 3250 5 10 1 1 0 0 1 1
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refdes=U?
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T 400 3400    0 10 0 1 0 0 1 1
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vendor=opencores.org
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T 400 3400    0 10 0 1 0 0 1 1
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library=wishbone
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T 400 3400    0 10 0 1 0 0 1 1
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component=wb_uart16550
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T 400 3400    0 10 0 1 0 0 1 1
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version=bus16_big
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P 300 200 0 200 10 1 1
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{
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T 400 200 5 10 1 1 0 1 1 1
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pinnumber=wb_sel_i[1:0]
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T 400 200 5 10 0 1 0 1 1 1
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pinseq=1
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}
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P 300 400 0 400 10 1 1
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{
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T 400 400 5 10 1 1 0 1 1 1
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pinnumber=wb_dat_i[15:0]
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T 400 400 5 10 0 1 0 1 1 1
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pinseq=2
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}
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P 300 600 0 600 10 1 1
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{
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T 400 600 5 10 1 1 0 1 1 1
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pinnumber=wb_adr_i[7:1]
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T 400 600 5 10 0 1 0 1 1 1
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pinseq=3
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}
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P 300 800 0 800 4 0 1
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{
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T 400 800 5 10 1 1 0 1 1 1
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pinnumber=wb_we_i
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T 400 800 5 10 0 1 0 1 1 1
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pinseq=4
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}
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P 300 1000 0 1000 4 0 1
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{
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T 400 1000 5 10 1 1 0 1 1 1
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pinnumber=wb_stb_i
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T 400 1000 5 10 0 1 0 1 1 1
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pinseq=5
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}
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P 300 1200 0 1200 4 0 1
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{
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T 400 1200 5 10 1 1 0 1 1 1
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pinnumber=wb_rst_i
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T 400 1200 5 10 0 1 0 1 1 1
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pinseq=6
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}
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P 300 1400 0 1400 4 0 1
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{
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T 400 1400 5 10 1 1 0 1 1 1
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pinnumber=wb_cyc_i
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T 400 1400 5 10 0 1 0 1 1 1
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pinseq=7
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}
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P 300 1600 0 1600 4 0 1
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{
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T 400 1600 5 10 1 1 0 1 1 1
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pinnumber=wb_clk_i
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T 400 1600 5 10 0 1 0 1 1 1
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pinseq=8
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}
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P 300 1800 0 1800 4 0 1
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{
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T 400 1800 5 10 1 1 0 1 1 1
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pinnumber=srx_pad_i
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T 400 1800 5 10 0 1 0 1 1 1
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pinseq=9
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}
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P 300 2000 0 2000 4 0 1
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{
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T 400 2000 5 10 1 1 0 1 1 1
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pinnumber=ri_pad_i
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T 400 2000 5 10 0 1 0 1 1 1
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pinseq=10
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}
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P 300 2200 0 2200 4 0 1
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{
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T 400 2200 5 10 1 1 0 1 1 1
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pinnumber=dsr_pad_i
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T 400 2200 5 10 0 1 0 1 1 1
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pinseq=11
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}
92
P 300 2400 0 2400 4 0 1
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{
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T 400 2400 5 10 1 1 0 1 1 1
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pinnumber=dcd_pad_i
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T 400 2400 5 10 0 1 0 1 1 1
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pinseq=12
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}
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P 300 2600 0 2600 4 0 1
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{
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T 400 2600 5 10 1 1 0 1 1 1
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pinnumber=cts_pad_i
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T 400 2600 5 10 0 1 0 1 1 1
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pinseq=13
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}
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P 3500 200 3800 200 10 1 1
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{
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T 3400 200 5  10 1 1 0 7 1 1
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pinnumber=wb_dat_o[15:0]
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T 3400 200 5  10 0 1 0 7 1 1
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pinseq=14
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}
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P 3500 400 3800 400 4 0 1
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{
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T 3400 400 5  10 1 1 0 7 1 1
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pinnumber=wb_ack_o
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T 3500 400 5  10 0 1 0 7 1 1
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pinseq=15
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}
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P 3500 600 3800 600 4 0 1
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{
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T 3400 600 5  10 1 1 0 7 1 1
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pinnumber=stx_pad_o
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T 3500 600 5  10 0 1 0 7 1 1
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pinseq=16
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}
127
P 3500 800 3800 800 4 0 1
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{
129
T 3400 800 5  10 1 1 0 7 1 1
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pinnumber=rts_pad_o
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T 3500 800 5  10 0 1 0 7 1 1
132
pinseq=17
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}
134
P 3500 1000 3800 1000 4 0 1
135
{
136
T 3400 1000 5  10 1 1 0 7 1 1
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pinnumber=int_o
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T 3500 1000 5  10 0 1 0 7 1 1
139
pinseq=18
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}
141
P 3500 1200 3800 1200 4 0 1
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{
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T 3400 1200 5  10 1 1 0 7 1 1
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pinnumber=dtr_pad_o
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T 3500 1200 5  10 0 1 0 7 1 1
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pinseq=19
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}
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P 3500 1400 3800 1400 4 0 1
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{
150
T 3400 1400 5  10 1 1 0 7 1 1
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pinnumber=baud_o
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T 3500 1400 5  10 0 1 0 7 1 1
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pinseq=20
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}

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