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[/] [socgen/] [trunk/] [Projects/] [valentfx.com/] [fpgas/] [ip/] [logipi_T6502/] [sim/] [testbenches/] [xml/] [logipi_T6502_default_duth.design.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
valentfx.com
fpgas
logipi_T6502
default_duth.design

 

A_CLK



 

BTN



 

JTAG_TCK



 

JTAG_TDI



 

JTAG_TDO



 

JTAG_TMS



 

JTAG_TRESET_N



 

LED



 

PMOD1



 

PMOD2



 

PMOD3



 

PMOD4



 

RP_SPI_CE0N



 

SW



 

SYS_SPI_MISO



 

SYS_SPI_MOSI



 

SYS_SPI_SCK



 
 


 

dut


 CLOCK_FREQ
 CLOCK_PLL_DIV
 CLOCK_PLL_MULT
 CLOCK_PLL_SIZE
 CLOCK_SRC
 JTAG_USER1_RESET
 JTAG_USER1_WIDTH
 JTAG_USER2_RESET
 JTAG_USER2_WIDTH
 RESET_SENSE





Line No.	Rev	Author	Line
1	135	jt_eaton
2
9
10			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
11			`xmlns:socgen="http://opencores.org"`
12			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
13			`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
14			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
15			`valentfx.com`
16			`fpgas`
17			`logipi_T6502`
18			`default_duth.design`
19
20
21
22			`A_CLK`
23
24
25
26
27
28			`BTN`
29
30
31
32
33
34			`JTAG_TCK`
35
36
37
38
39
40			`JTAG_TDI`
41
42
43
44
45
46			`JTAG_TDO`
47
48
49
50
51
52			`JTAG_TMS`
53
54
55
56
57
58			`JTAG_TRESET_N`
59
60
61
62
63
64			`LED`
65
66
67
68
69
70			`PMOD1`
71
72
73
74
75
76			`PMOD2`
77
78
79
80
81
82			`PMOD3`
83
84
85
86
87
88			`PMOD4`
89
90
91
92
93
94			`RP_SPI_CE0N`
95
96
97
98
99
100			`SW`
101
102
103
104
105
106			`SYS_SPI_MISO`
107
108
109
110
111
112			`SYS_SPI_MOSI`
113
114
115
116
117
118			`SYS_SPI_SCK`
119
120
121
122
123
124
125
126
127
128			`dut`
129
130
131			`CLOCK_FREQ`
132			`CLOCK_PLL_DIV`
133			`CLOCK_PLL_MULT`
134			`CLOCK_PLL_SIZE`
135			`CLOCK_SRC`
136			`JTAG_USER1_RESET`
137			`JTAG_USER1_WIDTH`
138			`JTAG_USER2_RESET`
139			`JTAG_USER2_WIDTH`
140			`RESET_SENSE`
141
142
143
144

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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [valentfx.com/] [fpgas/] [ip/] [logipi_T6502/] [sim/] [testbenches/] [xml/] [logipi_T6502_default_duth.design.xml] - Blame information for rev 135