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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [doc/] [sym/] [io_host_model_def.sym] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton 
v 20100214 1
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B 300 0  4900 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
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T 400 1650   5 10 1 1 0 0 1 1
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device=io_host_model_def
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T 400 1850 5 10 1 1 0 0 1 1
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refdes=U?
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T 400 2000    0 10 0 1 0 0 1 1
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vendor=opencores.org
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T 400 2000    0 10 0 1 0 0 1 1
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library=Testbench
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T 400 2000    0 10 0 1 0 0 1 1
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component=io_host_model
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T 400 2000    0 10 0 1 0 0 1 1
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version=def
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P 300 200 0 200 10 1 1
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{
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T 400 200 5 10 1 1 0 1 1 1
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pinnumber=io_host_out_bits[15:0]
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T 400 200 5 10 0 1 0 1 1 1
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pinseq=1
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}
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P 300 400 0 400 4 0 1
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{
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T 400 400 5 10 1 1 0 1 1 1
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pinnumber=reset
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T 400 400 5 10 0 1 0 1 1 1
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pinseq=2
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}
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P 300 600 0 600 4 0 1
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{
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T 400 600 5 10 1 1 0 1 1 1
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pinnumber=io_host_out_valid
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T 400 600 5 10 0 1 0 1 1 1
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pinseq=3
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}
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P 300 800 0 800 4 0 1
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{
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T 400 800 5 10 1 1 0 1 1 1
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pinnumber=io_host_in_ready
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T 400 800 5 10 0 1 0 1 1 1
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pinseq=4
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}
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P 300 1000 0 1000 4 0 1
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{
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T 400 1000 5 10 1 1 0 1 1 1
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pinnumber=clk
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T 400 1000 5 10 0 1 0 1 1 1
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pinseq=5
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}
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P 5200 200 5500 200 10 1 1
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{
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T 5100 200 5  10 1 1 0 7 1 1
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pinnumber=io_host_in_bits[15:0]
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T 5100 200 5  10 0 1 0 7 1 1
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pinseq=6
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}
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P 5200 400 5500 400 4 0 1
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{
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T 5100 400 5  10 1 1 0 7 1 1
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pinnumber=io_host_out_ready
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T 5200 400 5  10 0 1 0 7 1 1
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pinseq=7
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}
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P 5200 600 5500 600 4 0 1
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{
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T 5100 600 5  10 1 1 0 7 1 1
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pinnumber=io_host_in_valid
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T 5200 600 5  10 0 1 0 7 1 1
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pinseq=8
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}
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P 5200 800 5500 800 4 0 1
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{
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T 5100 800 5  10 1 1 0 7 1 1
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pinnumber=io_host_debug_stats_pcr
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T 5200 800 5  10 0 1 0 7 1 1
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pinseq=9
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}
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P 5200 1000 5500 1000 4 0 1
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{
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T 5100 1000 5  10 1 1 0 7 1 1
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pinnumber=io_host_clk_edge
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T 5200 1000 5  10 0 1 0 7 1 1
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pinseq=10
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}
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P 5200 1200 5500 1200 4 0 1
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{
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T 5100 1200 5  10 1 1 0 7 1 1
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pinnumber=io_host_clk
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T 5200 1200 5  10 0 1 0 7 1 1
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pinseq=11
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}

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