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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [doc/] [sym/] [micro_bus16_model_def.sym] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton 
v 20100214 1
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T 400 1850   5 10 1 1 0 0 1 1
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device=micro_bus16_model_def
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T 400 2050 5 10 1 1 0 0 1 1
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refdes=U?
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T 400 2200    0 10 0 1 0 0 1 1
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vendor=opencores.org
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T 400 2200    0 10 0 1 0 0 1 1
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library=Testbench
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T 400 2200    0 10 0 1 0 0 1 1
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component=micro_bus16_model
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T 400 2200    0 10 0 1 0 0 1 1
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version=def
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P 300 200 0 200 10 1 1
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{
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T 400 200 5 10 1 1 0 1 1 1
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pinnumber=rdata[15:0]
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T 400 200 5 10 0 1 0 1 1 1
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pinseq=1
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{
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T 400 400 5 10 1 1 0 1 1 1
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T 400 400 5 10 0 1 0 1 1 1
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pinseq=2
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}
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P 300 600 0 600 4 0 1
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{
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T 400 600 5 10 1 1 0 1 1 1
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pinnumber=clk
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T 400 600 5 10 0 1 0 1 1 1
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pinseq=3
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}
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T 2800 200 5  10 0 1 0 7 1 1
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P 2900 400 3200 400 10 1 1
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{
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T 2800 400 5  10 1 1 0 7 1 1
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T 2800 400 5  10 0 1 0 7 1 1
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{
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T 2800 600 5  10 1 1 0 7 1 1
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T 2800 600 5  10 0 1 0 7 1 1
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{
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T 2800 800 5  10 1 1 0 7 1 1
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T 2900 800 5  10 0 1 0 7 1 1
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pinseq=7
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P 2900 1000 3200 1000 4 0 1
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{
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T 2800 1000 5  10 1 1 0 7 1 1
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T 2900 1000 5  10 0 1 0 7 1 1
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pinseq=8
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P 2900 1200 3200 1200 4 0 1
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T 2800 1200 5  10 1 1 0 7 1 1
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T 2900 1200 5  10 0 1 0 7 1 1
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}
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{
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T 2800 1400 5  10 1 1 0 7 1 1
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T 2900 1400 5  10 0 1 0 7 1 1
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pinseq=10
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}

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