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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [sim/] [testbenches/] [xml/] [serial_xmit_dutg.design.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
opencores.org
cde
serial
xmit_dutg.design

 

buffer_empty



 

clk



 

data



 

edge_enable



 

load



 

parity_enable



 

parity_force



 

parity_type



 

reset



 

ser_out



 

start_value



 

stop_value



 
 


 

dut


 WIDTH
 SIZE





Line No.	Rev	Author	Line
1	131	jt_eaton
2
9	135	jt_eaton
10			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
11	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
12			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
13	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
14			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
15			`opencores.org`
16			`cde`
17			`serial`
18			`xmit_dutg.design`
19
20	131	jt_eaton
21	135	jt_eaton
22			`buffer_empty`
23
24
25
26	131	jt_eaton
27	135	jt_eaton
28			`clk`
29
30
31
32	131	jt_eaton
33	135	jt_eaton
34			`data`
35
36
37
38	131	jt_eaton
39	135	jt_eaton
40			`edge_enable`
41
42
43
44	131	jt_eaton
45	135	jt_eaton
46			`load`
47
48
49
50	131	jt_eaton
51	135	jt_eaton
52			`parity_enable`
53
54
55
56	131	jt_eaton
57	135	jt_eaton
58			`parity_force`
59
60
61
62	131	jt_eaton
63	135	jt_eaton
64			`parity_type`
65
66
67
68	131	jt_eaton
69	135	jt_eaton
70			`reset`
71
72
73
74	131	jt_eaton
75	135	jt_eaton
76			`ser_out`
77
78
79
80	131	jt_eaton
81	135	jt_eaton
82			`start_value`
83
84
85
86	131	jt_eaton
87	135	jt_eaton
88			`stop_value`
89
90
91
92	131	jt_eaton
93
94	135	jt_eaton
95
96	131	jt_eaton
97	135	jt_eaton
98			`dut`
99
100
101			`WIDTH`
102			`SIZE`
103
104
105
106

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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [sim/] [testbenches/] [xml/] [serial_xmit_dutg.design.xml] - Blame information for rev 135