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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [sram/] [doc/] [sch/] [cde_sram_byte.sch] - Blame information for rev 135

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Line No. Rev Author Line
1 135 jt_eaton
v 20100214 1
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C 1600 300 1 0 0 in_port_vector.sym
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{
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T 1600 300 5 10 1 1 0 6 1 1
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refdes=wdata[7:0]
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}
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C 1600 700 1 0 0 in_port_vector.sym
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{
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T 1600 700 5 10 1 1 0 6 1 1
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refdes=addr[ADDR-1:0]
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}
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C 1600 1100 1 0 0 in_port.sym
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{
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T 1600 1100 5 10 1 1 0 6 1 1
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refdes=wr
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}
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C 1600 1500 1 0 0 in_port.sym
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{
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T 1600 1500 5 10 1 1 0 6 1 1
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refdes=rd
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}
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C 1600 1900 1 0 0 in_port.sym
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{
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T 1600 1900 5 10 1 1 0 6 1 1
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refdes=cs
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}
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C 1600 2300 1 0 0 in_port.sym
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{
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T 1600 2300 5 10 1 1 0 6 1 1
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refdes=clk
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}
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C 1600 2700 1 0 0 in_port.sym
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{
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T 1600 2700 5 10 1 1 0 6 1 1
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refdes=be
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}
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C 3900 300  1 0  0 out_port_vector.sym
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{
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T 4900 300 5  10 1 1 0 0 1 1
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refdes=rdata[7:0]
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}

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