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[/] [threeaesc/] [trunk/] [key_schedule/] [scripts/] [sim.do] - Blame information for rev 2

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1 2 entactogen 
# script general de simulacion
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# questa v6
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vlib work
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# libs
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vcom -explicit  -93 "src/dual_mem.vhd"
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vcom -explicit  -93 "src/key_schedule.vhd"
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vcom -explicit  -93 "src/tb_key_schedule.vhd"
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# Sim
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vsim -lib work -t 1ps tb_key_schedule
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view wave
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view source
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view structure
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view signals
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add wave *
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mem load -infile mem/s_box.mem -format hex tb_key_schedule/uut/s_box_dual_1
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mem load -infile mem/s_box.mem -format hex tb_key_schedule/uut/s_box_dual_2
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add wave \
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{sim:/tb_key_schedule/uut/count_5 }
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add wave \
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{sim:/tb_key_schedule/uut/count_10 }
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add wave \
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{sim:/tb_key_schedule/uut/g_sub_0_s }
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add wave \
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{sim:/tb_key_schedule/uut/g_sub_1_s }
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add wave \
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{sim:/tb_key_schedule/uut/g_sub_2_s }
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add wave \
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{sim:/tb_key_schedule/uut/g_sub_3_s }
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run 10 us

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