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[/] [tiny_tate_bilinear_pairing/] [trunk/] [group_size_is_151_bits/] [testbench/] [test_pairing.v] - Blame information for rev 14

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Line No. Rev Author Line
1 5 homer.hsin
`timescale 1ns / 1ps
2
`define P 20 // clock period 
3
 
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module test_pairing;
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        // Inputs
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        reg clk;
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        reg reset;
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        reg sel;
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        reg [5:0] addr;
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        reg w;
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    reg update;
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    reg ready;
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    reg i;
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        // Outputs
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        wire done;
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    wire o;
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    // Buffers
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        reg [197:0] out;
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        // Instantiate the Unit Under Test (UUT)
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        pairing uut (
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        .clk(clk),
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        .reset(reset),
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        .sel(sel),
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        .addr(addr),
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        .w(w),
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        .update(update),
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        .ready(ready),
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        .i(i),
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        .o(o),
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        .done(done)
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        );
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        initial begin
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                // Initialize Inputs
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                clk = 0;
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                reset = 0;
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                sel = 0;
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                addr = 0;
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                w = 0;
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        update = 0;
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        ready = 0;
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        i = 0;
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        out = 0;
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                // Wait 100 ns for global reset to finish
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                #100;
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                // Add stimulus here
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        /* keep FSM silent */
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        reset = 1;
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            /* init xp, yp, xq, yq */
56 14 homer.hsin
            write(3, 194'h21181940120548aa020568aa65a5989609251595a89a44598);
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            write(5, 194'h0a905590506a8a845592a09644a2095291422910a968a5048);
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            write(6, 194'h21181940120548aa020568aa65a5989609251595a89a44598);
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            write(7, 194'h0a905590506a8a845592a09644a2095291422910a968a5048);
60 5 homer.hsin
            /* read back. uncomment me if error happens */
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            /* read(3);
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            $display("xp = %h", out);
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            read(5);
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            $display("yp = %h", out);
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            read(6);
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            $display("xq = %h", out);
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            read(7);
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            $display("yq = %h", out);*/
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        reset = 0;
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        sel = 0; w = 0;
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        @(posedge done);
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        @(negedge clk);
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            read(3);
75 14 homer.hsin
            check(194'h21181940120548aa020568aa65a5989609251595a89a44599);
76 5 homer.hsin
            read(5);
77 14 homer.hsin
            check(194'h0560aa60a0954548aa615069885106a16281162056945a084);
78 5 homer.hsin
            read(6);
79 14 homer.hsin
            check(194'h21181940120548aa020568aa65a5989609251595a89a44598);
80 5 homer.hsin
            read(7);
81 14 homer.hsin
            check(194'h0a905590506a8a845592a09644a2095291422910a968a5048);
82 5 homer.hsin
            read(9);
83 14 homer.hsin
            check(194'h09a49266428495042842965645266a2164a1268408a669866);
84 5 homer.hsin
            read(10);
85 14 homer.hsin
            check(194'h204446152452400968480544296829199a169a2562a908520);
86 5 homer.hsin
            read(11);
87 14 homer.hsin
            check(194'h1699142918666651a156954a80544689590a5094624610281);
88 5 homer.hsin
            read(12);
89 14 homer.hsin
            check(194'h2461998924145511611291626a4a295888569280285884661);
90 5 homer.hsin
            read(13);
91 14 homer.hsin
            check(194'h1040525045a404150a1881aa91a99156660a1658a090a1091);
92 5 homer.hsin
            read(14);
93 14 homer.hsin
            check(194'h2400a94249694808254880924a06494816081900811198925);
94 5 homer.hsin
            $display("Good");
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        $finish;
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        end
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    initial #100 forever #(`P/2) clk = ~clk;
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    task write;
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        input [5:0] adr;
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        input [197:0] dat;
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        integer j;
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        begin
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            sel = 1;
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            w = 0;
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            addr = adr;
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            update = 1;
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            #`P;
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            update = 0;
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            ready = 1;
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            for(j=0;j<198;j=j+1)
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               begin
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               i = dat[j];
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               #`P;
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               end
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            ready = 0;
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            w = 1; #`P; w = 0;
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        end
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    endtask
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    task read;
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        input [5:0] adr;
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        integer j;
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        begin
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            sel = 1;
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            w = 0;
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            addr = adr;
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            #`P;
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            update = 1;
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            #`P;
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            update = 0;
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            out = 0;
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            ready = 1;
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            for(j=0;j<198;j=j+1)
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               begin
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               out = {o, out[197:1]};
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               #`P;
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               end
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        end
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    endtask
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    task check;
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        input [197:0] wish;
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        begin
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            if (out !== wish)
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                begin $display("Error!"); $finish; end
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        end
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    endtask
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endmodule
151
 

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